OpenWrt/xiaomi-ax3600
1
0
Fork 0
mirror of https://github.com/immortalwrt/immortalwrt.git synced 2025-08-11 06:11:53 +08:00
Code Issues Packages Projects Releases Wiki Activity

Merge Official Source

Browse Source 
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
2025-02-02 19:47:57 +08:00
parent b3b143104a c1d5de0c59
commit 9a0aa64a03
32 changed files with 486 additions and 304 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
package/libs/wolfssl/Makefile
View File

@ -8,12 +8,15 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=wolfssl
PKG_VERSION:=5.7.2-stable
PKG_VERSION:=5.7.6
PKG_REAL_VERSION:=$(PKG_VERSION)-stable
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
PKG_HASH:=0f2ed82e345b833242705bbc4b08a2a2037a33f7bf9c610efae6464f6b10e305
PKG_SOURCE:=$(PKG_NAME)-$(PKG_REAL_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_REAL_VERSION)
PKG_HASH:=52b1e439e30d1ed8162a16308a8525a862183b67aa30373b11166ecbab000d63
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_REAL_VERSION)
PKG_FIXUP:=libtool libtool-abiver
PKG_INSTALL:=1
@ -40,7 +43,7 @@ PKG_CONFIG_DEPENDS:=\
CONFIG_WOLFSSL_HAS_TLSV13 \
CONFIG_WOLFSSL_HAS_WPAS
PKG_ABI_VERSION:=$(patsubst %-stable,%,$(PKG_VERSION)).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
PKG_ABI_VERSION:=$(PKG_VERSION).$(call version_abbrev,$(call confvar,$(PKG_CONFIG_DEPENDS)))
PKG_CONFIG_DEPENDS+=\
CONFIG_PACKAGE_libwolfssl-benchmark \

2
package/libs/wolfssl/patches/100-disable-hardening-check.patch
View File

@ -1,6 +1,6 @@
--- a/wolfssl/wolfcrypt/settings.h
+++ b/wolfssl/wolfcrypt/settings.h
@@ -3046,7 +3046,7 @@ extern void uITRON4_free(void *p) ;
@@ -3722,7 +3722,7 @@ extern void uITRON4_free(void *p) ;
/* warning for not using harden build options (default with ./configure) */
/* do not warn if big integer support is disabled */

2
package/network/services/dnsmasq/Makefile
View File

@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=dnsmasq
PKG_UPSTREAM_VERSION:=2.90
PKG_VERSION:=$(subst test,~~test,$(subst rc,~rc,$(PKG_UPSTREAM_VERSION)))
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_UPSTREAM_VERSION).tar.xz
PKG_SOURCE_URL:=https://thekelleys.org.uk/dnsmasq/

98
package/network/services/dnsmasq/patches/0003-Handle-DS-queries-to-auth-zones.patch Normal file
View File

@ -0,0 +1,98 @@
From 8ce27433f8b2e17c557cb55e4f16941d309deeac Mon Sep 17 00:00:00 2001
From: Simon Kelley <simon@thekelleys.org.uk>
Date: Fri, 17 Jan 2025 17:49:29 +0000
Subject: [PATCH] Handle DS queries to auth zones.
Origin: upstream, v2.91test8
When dnsmasq is configured to act as an authoritative server and has
an authoritative zone configured, and recieves a query for
that zone _as_forwarder_ it answers the query directly rather
than forwarding it. This doesn't affect the answer, but it
saves dnsmasq forwarding the query to the recusor upstream,
whch then bounces it back to dnsmasq in auth mode. The
exception should be when the query is for the root of zone, for a DS
RR. The answer to that has to come from the parent, via the
recursor, and will typically be a proof-of-nonexistence since
dnsmasq doesn't support signed zones. This patch suppresses
local answers and forces forwarding to the upstream recursor
for such queries. It stops breakage when a DNSSEC validating
client makes queries to dnsmasq acting as forwarder for a zone
for which it is authoritative.
[ukleinek: drop changes to CHANGELOG to prevent conflicts]
---
src/forward.c | 52 +++++++++++++++++++++++++++++++++++++--------------
1 file changed, 38 insertions(+), 14 deletions(-)
--- a/src/forward.c
+++ b/src/forward.c
@@ -1744,15 +1744,27 @@ void receive_query(struct listener *list
#endif
#ifdef HAVE_AUTH
- /* find queries for zones we're authoritative for, and answer them directly */
+ /* Find queries for zones we're authoritative for, and answer them directly.
+ The exception to this is DS queries for the zone route. They
+ have to come from the parent zone. Since dnsmasq's auth server
+ can't do DNSSEC, the zone will be unsigned, and anything using
+ dnsmasq as a forwarder and doing validation will be expecting to
+ see the proof of non-existence from the parent. */
if (!auth_dns && !option_bool(OPT_LOCALISE))
for (zone = daemon->auth_zones; zone; zone = zone->next)
- if (in_zone(zone, daemon->namebuff, NULL))
- {
- auth_dns = 1;
- local_auth = 1;
- break;
- }
+ {
+ char *cut;
+
+ if (in_zone(zone, daemon->namebuff, &cut))
+ {
+ if (type != T_DS || cut)
+ {
+ auth_dns = 1;
+ local_auth = 1;
+ }
+ break;
+ }
+ }
#endif
#ifdef HAVE_LOOP
@@ -2268,15 +2280,27 @@ unsigned char *tcp_request(int confd, ti
&peer_addr, auth_dns ? "auth" : "query", qtype);
#ifdef HAVE_AUTH
- /* find queries for zones we're authoritative for, and answer them directly */
+ /* Find queries for zones we're authoritative for, and answer them directly.
+ The exception to this is DS queries for the zone route. They
+ have to come from the parent zone. Since dnsmasq's auth server
+ can't do DNSSEC, the zone will be unsigned, and anything using
+ dnsmasq as a forwarder and doing validation will be expecting to
+ see the proof of non-existence from the parent. */
if (!auth_dns && !option_bool(OPT_LOCALISE))
for (zone = daemon->auth_zones; zone; zone = zone->next)
- if (in_zone(zone, daemon->namebuff, NULL))
- {
- auth_dns = 1;
- local_auth = 1;
- break;
- }
+ {
+ char *cut;
+
+ if (in_zone(zone, daemon->namebuff, &cut))
+ {
+ if (qtype != T_DS || cut)
+ {
+ auth_dns = 1;
+ local_auth = 1;
+ }
+ break;
+ }
+ }
#endif
}
}

2
target/linux/airoha/an7581/config-6.6
View File

@ -496,6 +496,8 @@ CONFIG_RATIONAL=y
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RELOCATABLE=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y

3
target/linux/airoha/dts/an7581-evb-emmc.dts
View File

@ -100,8 +100,9 @@
};
&mmc0 {
pinctrl-names = "default";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc_pins>;
pinctrl-1 = <&mmc_pins>;
status = "okay";
#address-cells = <1>;

23
target/linux/airoha/dts/an7581.dtsi
View File

@ -332,6 +332,21 @@
};
};
clk25m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
clock-output-names = "clkxtal";
};
vmmc_3v3: regulator-vmmc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
@ -535,13 +550,15 @@
};
mmc0: mmc@1fa0e000 {
compatible = "airoha,an7581-mmc";
compatible = "mediatek,mt7622-mmc";
reg = <0x0 0x1fa0e000 0x0 0x1000>,
<0x0 0x1fa0c000 0x0 0x60>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scuclk EN7581_CLK_EMMC>;
clock-names = "source"; bus-width = <4>;
clocks = <&scuclk EN7581_CLK_EMMC>, <&clk25m>;
clock-names = "source", "hclk";
bus-width = <4>;
max-frequency = <52000000>;
vmmc-supply = <&vmmc_3v3>;
disable-wp;
cap-mmc-highspeed;
non-removable;

13
target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch → target/linux/airoha/patches-6.6/041-01-v6.14-clk-en7523-Rework-clock-handling-for-different-clock.patch
View File

@ -1,6 +1,6 @@
From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
From e4a9748e7103c47e575459db2b6a77d14f34da2b Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 18 Dec 2024 10:03:45 +0100
Date: Tue, 14 Jan 2025 00:10:02 +0100
Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
numbers
@ -12,6 +12,8 @@ clocks number in match_data and alloca clk_data based on the compatible
match_data.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/clk-en7523.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
@ -44,7 +46,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
}
static int en7523_reset_update(struct reset_controller_dev *rcdev,
@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
@@ -702,13 +699,15 @@ static int en7523_clk_probe(struct platf
struct clk_hw_onecell_data *clk_data;
int r;
@ -58,12 +60,11 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
return -ENOMEM;
- soc_data = device_get_match_data(&pdev->dev);
+ clk_data->num = soc_data->num_clocks;
r = soc_data->hw_init(pdev, clk_data);
if (r)
return r;
+ clk_data->num = soc_data->num_clocks;
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
@@ -717,6 +716,7 @@ static int en7523_clk_probe(struct platf
}
static const struct en_clk_soc_data en7523_data = {

7
target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch → target/linux/airoha/patches-6.6/041-02-v6.14-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch
View File

@ -1,6 +1,6 @@
From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
From 02d3b7557ce28c373ea1e925ae16ab5988284313 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Thu, 19 Dec 2024 13:13:37 +0100
Date: Tue, 14 Jan 2025 00:10:03 +0100
Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
@ -8,6 +8,9 @@ should not be placed here. Value is derived internally in the user
driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250113231030.6735-3-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
include/dt-bindings/clock/en7523-clk.h | 2 --
1 file changed, 2 deletions(-)

6
target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch → target/linux/airoha/patches-6.6/041-03-v6.14-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch
View File

@ -1,6 +1,6 @@
From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
From 82108ad3285f58f314ad41398f44017c7dbe44de Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 11 Dec 2024 12:22:37 +0100
Date: Tue, 14 Jan 2025 00:10:04 +0100
Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
Add ID for eMMC for EN7581. This is to control clock selection of eMMC
@ -8,6 +8,8 @@ between 200MHz and 150MHz.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250113231030.6735-4-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
include/dt-bindings/clock/en7523-clk.h | 2 ++
1 file changed, 2 insertions(+)

6
target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch → target/linux/airoha/patches-6.6/041-04-v6.14-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch
View File

@ -1,12 +1,14 @@
From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
From bfe257f9780d8f77045a7da6ec959ee0659d2f98 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 11 Dec 2024 12:22:38 +0100
Date: Tue, 14 Jan 2025 00:10:05 +0100
Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
Add clock for eMMC for EN7581. This is used to give info of the current
eMMC source clock and to switch it from 200MHz or 150MHz.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250113231030.6735-5-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/clk-en7523.c | 10 ++++++++++
1 file changed, 10 insertions(+)

136
target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch
View File

@ -1,136 +0,0 @@
From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Wed, 11 Dec 2024 11:27:10 +0100
Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
Add support for AN7581 MMC Host. The MMC Host controller is based on
mt7622 with the difference of not having regulator supply and state_uhs
pins and hclk clock.
Some minor fixes are applied to check if the state_uhs pins are defined
and make hclk optional for the new airoha compatible.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
1 file changed, 46 insertions(+), 9 deletions(-)
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
.stop_clk_fix = true,
};
+static const struct mtk_mmc_compatible an7581_compat = {
+ .clk_div_bits = 12,
+ .recheck_sdio_irq = true,
+ .hs400_tune = false,
+ .pad_tune_reg = MSDC_PAD_TUNE0,
+ .async_fifo = true,
+ .data_tune = true,
+ .busy_check = true,
+ .stop_clk_fix = true,
+ .enhance_rx = true,
+ .support_64g = false,
+};
+
static const struct of_device_id msdc_of_ids[] = {
{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
-
+ { .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
{}
};
MODULE_DEVICE_TABLE(of, msdc_of_ids);
@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
struct msdc_host *host = mmc_priv(mmc);
int ret;
+ /* Skip setting supply if not supported */
+ if (!mmc->supply.vqmmc)
+ return 0;
+
if (!IS_ERR(mmc->supply.vqmmc)) {
if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
}
- pinctrl_select_state(host->pinctrl, host->pins_uhs);
+ /* Skip setting uhs pins if not supported */
+ if (host->pins_uhs)
+ pinctrl_select_state(host->pinctrl, host->pins_uhs);
} else {
dev_pm_clear_wake_irq(host->dev);
}
@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
msdc_set_buswidth(host, ios->bus_width);
+ /* Skip regulator if not supported */
+ if (!mmc->supply.vmmc)
+ goto skip_regulator;
+
/* Suspend/Resume will do power off/on */
switch (ios->power_mode) {
case MMC_POWER_UP:
@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
break;
}
+skip_regulator:
if (host->mclk != ios->clock || host->timing != ios->timing)
msdc_set_mclk(host, ios->timing, ios->clock);
}
@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
if (IS_ERR(host->src_clk))
return PTR_ERR(host->src_clk);
- host->h_clk = devm_clk_get(&pdev->dev, "hclk");
- if (IS_ERR(host->h_clk))
- return PTR_ERR(host->h_clk);
+ /* AN7581 SoC doesn't have hclk */
+ if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
+ host->h_clk = devm_clk_get(&pdev->dev, "hclk");
+ if (IS_ERR(host->h_clk))
+ return PTR_ERR(host->h_clk);
+ }
host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
if (IS_ERR(host->bus_clk))
@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
return PTR_ERR(host->pins_default);
}
- host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
- if (IS_ERR(host->pins_uhs)) {
- dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
- return PTR_ERR(host->pins_uhs);
+ /* AN7581 doesn't have state_uhs pins */
+ if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
+ host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
+ if (IS_ERR(host->pins_uhs)) {
+ dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
+ return PTR_ERR(host->pins_uhs);
+ }
}
/* Support for SDIO eint irq ? */
@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
dev_err(&pdev->dev, "Cannot ungate clocks!\n");
goto release_clk;
}
+
+ /* AN7581 without regulator require tune to OCR values */
+ if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
+ !mmc->ocr_avail)
+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+
msdc_init_hw(host);
if (mmc->caps2 & MMC_CAP2_CQE) {

6
target/linux/apm821xx/image/nand.mk
View File

@ -89,9 +89,6 @@ endef
TARGET_DEVICES += netgear_wndap660
define Device/netgear_wndr4700
DEVICE_COMPAT_VERSION := 3.0
DEVICE_COMPAT_MESSAGE := Network swconfig configuration cannot be upgraded to DSA. \
Upgrade via sysupgrade mechanism is not possible.
DEVICE_VENDOR := NETGEAR
DEVICE_MODEL := Centria N900 WNDR4700
DEVICE_ALT0_VENDOR := NETGEAR
@ -123,8 +120,9 @@ define Device/netgear_wndr4700
NETGEAR_HW_ID := 29763875+128+256
UBINIZE_OPTS := -E 5
SUPPORTED_DEVICES += wndr4700
DEVICE_COMPAT_VERSION := 2.0
DEVICE_COMPAT_VERSION := 3.0
DEVICE_COMPAT_MESSAGE := kernel and ubi partitions had to be resized. \
Network swconfig configuration cannot be upgraded to DSA. \
Upgrade via sysupgrade mechanism is not possible.
endef
TARGET_DEVICES += netgear_wndr4700

2
target/linux/bmips/dts/bcm63168-sercomm-shg2500.dts
View File

@ -68,6 +68,8 @@
status = "okay";
led-controller@1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "sercomm,msp430-leds";
reg = <1>;
spi-max-frequency = <500000>;

104
target/linux/generic/pending-6.6/720-04-net-phy-realtek-introduce-rtl822x_aldps_probe.patch
View File

@ -1,104 +0,0 @@
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 22 Apr 2023 03:26:01 +0100
Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -1207,6 +1211,25 @@ static int rtl8251b_c45_match_phy_device
return rtlgen_is_c45_match(phydev, RTL_8251B, true);
}
+static int rtl822x_aldps_probe(struct phy_device *phydev)
+{
+ struct device *dev = &phydev->mdio.dev;
+ int val;
+
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1);
+ if (val < 0)
+ return val;
+
+ if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
+ val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
+ else
+ val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+
+ phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1, val);
+
+ return rtl822x_probe(phydev);
+}
+
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
@@ -1478,6 +1501,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
+ .probe = rtl822x_aldps_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1489,6 +1513,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
+ .probe = rtl822x_aldps_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1503,7 +1528,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1517,7 +1542,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
@@ -1529,7 +1554,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1543,7 +1568,7 @@ static struct phy_driver realtek_drvs[]
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
.soft_reset = genphy_soft_reset,
- .probe = rtl822x_probe,
+ .probe = rtl822x_aldps_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,

42
target/linux/generic/pending-6.6/720-04-net-phy-realtek-setup-aldps.patch Normal file
View File

@ -0,0 +1,42 @@
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 22 Apr 2023 03:26:01 +0100
Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
Setup Link Down Power Saving Mode according the DTS property
just like for RTL821x 1GE PHYs.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
+ if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
+ ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ else
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
+ if (ret < 0)
+ return ret;
+
/* Disable SGMII AN */
ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
if (ret < 0)

2
target/linux/generic/pending-6.6/720-05-net-phy-realtek-detect-early-version-of-RTL8221B.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1157,10 +1157,32 @@ static int rtl8226_match_phy_device(stru
@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{

18
target/linux/generic/pending-6.6/720-06-net-phy-realtek-support-interrupt-of-RTL8221B.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1387,6 +1387,51 @@ static irqreturn_t rtl9000a_handle_inter
@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
@ -64,39 +64,39 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -1549,6 +1594,8 @@ static struct phy_driver realtek_drvs[]
@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
@@ -1563,6 +1610,8 @@ static struct phy_driver realtek_drvs[]
@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
@@ -1575,6 +1624,8 @@ static struct phy_driver realtek_drvs[]
@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
@@ -1589,6 +1640,8 @@ static struct phy_driver realtek_drvs[]
@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
+ .config_intr = rtl8221b_config_intr,
+ .handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_aldps_probe,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,

2
target/linux/generic/pending-6.6/720-07-net-phy-realtek-mark-existing-MMDs-as-present.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -1034,6 +1034,9 @@ static int rtl822x_c45_get_features(stru
@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);

58
target/linux/generic/pending-6.6/720-08-net-phy-realtek-work-around-broken-serdes.patch Normal file
View File

@ -0,0 +1,58 @@
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 Jan 2025 05:33:12 +0000
Subject: [PATCH] net: phy: realtek: work around broken SerDes
For still unknown reasons the SerDes init sequence may sometimes
time out because a self-clearing bit never clears, indicating the
PHY has entered an unrecoverable error state.
Work-around the issue by triggering a hardware reset and retry the
setup sequence while warning the user that this has happened.
This is really more of a work-around than a fix, and should be
replaced by a better actual fix in future (hopefully).
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
return 0;
}
+static int rtl822xb_config_init_war(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = rtl822xb_config_init(phydev);
+
+ if (ret == -ETIMEDOUT) {
+ phydev_warn(phydev, "SerDes setup timed out, retrying\n");
+ phy_device_reset(phydev, 1);
+ phy_device_reset(phydev, 0);
+ ret = rtl822xb_config_init(phydev);
+ }
+
+ return ret;
+}
+
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
phy_interface_t iface)
{
@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
- .config_init = rtl822xb_config_init,
+ .config_init = rtl822xb_config_init_war,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
- .config_init = rtl822xb_config_init,
+ .config_init = rtl822xb_config_init_war,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,

27
target/linux/generic/pending-6.6/720-09-net-phy-realtek-disable-MDIO-broadcast.patch Normal file
View File

@ -0,0 +1,27 @@
From: Daniel Golle <daniel@makrotopia.org>
Date: Thu, 30 Jan 2025 05:38:31 +0000
Subject: [PATCH] net: phy: realtek: disable MDIO broadcast
RealTek's PHYs by default also listen on MDIO address 0 which is defined
as broadcast address. This can lead to problems if there is an actual PHY
(such as MT7981 built-in PHY) present at this address, as accessing that
PHY may then confuse the RealTek PHY.
Disabled listening on the MDIO broadcast address to avoid such problems.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
phydev->host_interfaces) ||
phydev->interface == PHY_INTERFACE_MODE_SGMII;
+ /* disable listening on MDIO broadcast address (0) */
+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, 0xa430, BIT(13));
+ if (ret < 0)
+ return ret;
+
/* fill in possible interfaces */
__assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
has_2500);

33
target/linux/mediatek/patches-6.6/115-Revert-arm64-dts-mediatek-fix-t-phy-unit-name.patch Normal file
View File

@ -0,0 +1,33 @@
From 4c4baed29b168e9bf39545a945a9523ea280cb44 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sat, 1 Feb 2025 04:24:17 +0000
Subject: [PATCH 1/2] Revert "arm64: dts: mediatek: fix t-phy unit name"
This reverts commit 963c3b0c47ec29b4c49c9f45965cd066f419d17f.
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -908,7 +908,7 @@
status = "disabled";
};
- sata_phy: t-phy {
+ sata_phy: t-phy@1a243000 {
compatible = "mediatek,mt7622-tphy",
"mediatek,generic-tphy-v1";
#address-cells = <2>;
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -428,7 +428,7 @@
};
};
- pcie_phy: t-phy {
+ pcie_phy: t-phy@11c00000 {
compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2";
ranges;

33
target/linux/mediatek/patches-6.6/116-arm64-dts-mediatek-mt7622-readd-syscon-to-pciesys-no.patch Normal file
View File

@ -0,0 +1,33 @@
From 98bc223d174c7f544e8f6c4f0caa8fa144f2f4dc Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Fri, 28 Jun 2024 12:55:40 +0200
Subject: [PATCH 2/2] arm64: dts: mediatek: mt7622: readd syscon to pciesys
node
Sata node reference the pciesys with the property mediatek,phy-node
and that is used as a syscon to access the pciesys regs.
Readd the syscon compatible to pciesys node to restore correct
functionality of the SATA interface.
Fixes: 3ba5a6159434 ("arm64: dts: mediatek: mt7622: fix clock controllers")
Reported-by: Frank Wunderlich <frank-w@public-files.de>
Co-developed-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -798,7 +798,7 @@
};
pciesys: clock-controller@1a100800 {
- compatible = "mediatek,mt7622-pciesys";
+ compatible = "mediatek,mt7622-pciesys", "syscon";
reg = <0 0x1a100800 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;

4
target/linux/mediatek/patches-6.6/790-net-phy-realtek-add-led-link-select-for-RTL8221.patch
View File

@ -77,7 +77,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@@ -911,7 +956,7 @@ static int rtl822xb_config_init(struct p
@@ -925,7 +970,7 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
@ -85,4 +85,4 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
+ return rtl8221b_config_led(phydev);
}
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
static int rtl822xb_config_init_war(struct phy_device *phydev)

18
target/linux/ramips/dts/mt7621_ubnt_usw-flex.dts
View File

@ -64,19 +64,6 @@
label = "dsa";
};
&gmac1 {
status = "okay";
label = "lan1";
phy-handle = <&ethphy4>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
};
&ethphy4 {
/delete-property/ interrupts;
};
&switch0 {
ports {
port@0 {
@ -98,6 +85,11 @@
status = "okay";
label = "lan2";
};
port@4 {
status = "okay";
label = "lan1";
};
};
};

105
target/linux/ramips/patches-6.6/809-pinctrl-mtmips-allow-mux-SDXC-pins-for-mt76x8.patch Normal file
View File

@ -0,0 +1,105 @@
From: Shiji Yang <yangshiji66@outlook.com>
Date: Wed, 1 Jan 2025 13:30:11 +0800
Subject: [PATCH] pinctrl: mtmips: allow mux SDXC pins for mt76x8
This is a hack to supprot two types of mt76x8 SDXC pinmaps:
a) Use ethernet phy pins as SDXC IO.
&pinctrl {
ephy-digital;
sdxc_iot_mode: sdxc_iot_mode {
esd {
groups = "esd";
function = "iot";
};
sdxc {
groups = "sdmode";
function = "sdxc";
};
};
};
b) Use I2S/I2C/GPIO0/UART1 pins as SDXC IO.
&pinctrl {
ephy-analog;
sdxc_router_mode: sdxc_router_mode {
groups = "esd", "gpio", "i2c", "i2s", "sdmode", "uart1";
function = "gpio";
};
};
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
---
drivers/pinctrl/mediatek/pinctrl-mt76x8.c | 24 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
--- a/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt76x8.c
@@ -1,10 +1,13 @@
// SPDX-License-Identifier: GPL-2.0-only
+#include <asm/mach-ralink/ralink_regs.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include "pinctrl-mtmips.h"
+#define SYSC_REG_AGPIO_CFG 0x3c
+
#define MT76X8_GPIO_MODE_MASK 0x3
#define MT76X8_GPIO_MODE_P4LED_KN 58
@@ -26,6 +29,7 @@
#define MT76X8_GPIO_MODE_I2C 20
#define MT76X8_GPIO_MODE_REFCLK 18
#define MT76X8_GPIO_MODE_PERST 16
+#define MT76X8_GPIO_MODE_ESD 15
#define MT76X8_GPIO_MODE_WDT 14
#define MT76X8_GPIO_MODE_SPI 12
#define MT76X8_GPIO_MODE_SDMODE 10
@@ -74,6 +78,12 @@ static struct mtmips_pmx_func refclk_grp
static struct mtmips_pmx_func perst_grp[] = { FUNC("perst", 0, 36, 1) };
static struct mtmips_pmx_func wdt_grp[] = { FUNC("wdt", 0, 38, 1) };
static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 7, 4) };
+/*
+ * "esd" (Ethernet SDXC) group supports two mode:
+ * "gpio" - SDXC mux to I2S/I2C/GPIO0/UART1 pins with "gpio" mode
+ * "iot" - SDXC mux to EPHY pins, eth p1-p4 pad must be set to "digital"
+ */
+static struct mtmips_pmx_func esd_grp[] = { FUNC("iot", 0, 47, 1) };
static struct mtmips_pmx_func sd_mode_grp[] = {
FUNC("jtag", 3, 22, 8),
@@ -216,6 +226,7 @@ static struct mtmips_pmx_group mt76x8_pi
GRP("perst", perst_grp, 1, MT76X8_GPIO_MODE_PERST),
GRP("wdt", wdt_grp, 1, MT76X8_GPIO_MODE_WDT),
GRP("spi", spi_grp, 1, MT76X8_GPIO_MODE_SPI),
+ GRP("esd", esd_grp, 1, MT76X8_GPIO_MODE_ESD),
GRP_G("sdmode", sd_mode_grp, MT76X8_GPIO_MODE_MASK,
1, MT76X8_GPIO_MODE_SDMODE),
GRP_G("uart0", uart0_grp, MT76X8_GPIO_MODE_MASK,
@@ -257,7 +268,18 @@ static struct mtmips_pmx_group mt76x8_pi
static int mt76x8_pinctrl_probe(struct platform_device *pdev)
{
- return mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
+ int ret;
+
+ ret = mtmips_pinctrl_init(pdev, mt76x8_pinmux_data);
+ if (ret)
+ return ret;
+
+ if (of_property_present(pdev->dev.of_node, "ephy-analog"))
+ rt_sysc_m32(0xf << 17, 0, SYSC_REG_AGPIO_CFG);
+ else if (of_property_present(pdev->dev.of_node, "ephy-digital"))
+ rt_sysc_m32(0xf << 17, 0xf << 17, SYSC_REG_AGPIO_CFG);
+
+ return ret;
}
static const struct of_device_id mt76x8_pinctrl_match[] = {

12
target/linux/rockchip/patches-6.6/034-21-v6.8-drm-sched-Add-drm_sched_wqueue_-helpers.patch
View File

@ -92,7 +92,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4652,7 +4652,7 @@ bool amdgpu_device_has_job_running(struc
@@ -4615,7 +4615,7 @@ bool amdgpu_device_has_job_running(struc
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
@ -101,7 +101,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
spin_lock(&ring->sched.job_list_lock);
@@ -4794,7 +4794,7 @@ int amdgpu_device_pre_asic_reset(struct
@@ -4757,7 +4757,7 @@ int amdgpu_device_pre_asic_reset(struct
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
@ -110,7 +110,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
/* Clear job fence from fence drv to avoid force_completion
@@ -5338,7 +5338,7 @@ int amdgpu_device_gpu_recover(struct amd
@@ -5297,7 +5297,7 @@ int amdgpu_device_gpu_recover(struct amd
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = tmp_adev->rings[i];
@ -119,7 +119,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
drm_sched_stop(&ring->sched, job ? &job->base : NULL);
@@ -5413,7 +5413,7 @@ skip_hw_reset:
@@ -5372,7 +5372,7 @@ skip_hw_reset:
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = tmp_adev->rings[i];
@ -128,7 +128,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
drm_sched_start(&ring->sched, true);
@@ -5739,7 +5739,7 @@ pci_ers_result_t amdgpu_pci_error_detect
@@ -5698,7 +5698,7 @@ pci_ers_result_t amdgpu_pci_error_detect
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
@ -137,7 +137,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
continue;
drm_sched_stop(&ring->sched, NULL);
@@ -5867,7 +5867,7 @@ void amdgpu_pci_resume(struct pci_dev *p
@@ -5826,7 +5826,7 @@ void amdgpu_pci_resume(struct pci_dev *p
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];

4
target/linux/rockchip/patches-6.6/602-net-ethernet-r8169-add-devname-configuration-from-OF.patch
View File

@ -8,7 +8,7 @@
#include <linux/tcp.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
@@ -5355,6 +5356,7 @@ static int rtl_init_one(struct pci_dev *
@@ -5381,6 +5382,7 @@ static int rtl_init_one(struct pci_dev *
int jumbo_max, region, rc;
enum mac_version chipset;
struct net_device *dev;
@ -16,7 +16,7 @@
u32 txconfig;
u16 xid;
@@ -5362,6 +5364,9 @@ static int rtl_init_one(struct pci_dev *
@@ -5388,6 +5390,9 @@ static int rtl_init_one(struct pci_dev *
if (!dev)
return -ENOMEM;

1
target/linux/stm32/stm32mp1/config-6.6
View File

@ -423,6 +423,7 @@ CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SMSC_PHY=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y

3
target/linux/x86/image/64.mk
View File

@ -3,7 +3,8 @@ define Device/generic
DEVICE_MODEL := x86/64
DEVICE_PACKAGES += \
kmod-amazon-ena kmod-amd-xgbe kmod-bnx2 kmod-e1000 \
kmod-dwmac-intel kmod-forcedeth kmod-fs-vfat kmod-tg3
kmod-dwmac-intel kmod-forcedeth kmod-fs-vfat kmod-tg3 \
kmod-drm-i915
GRUB2_VARIANT := generic
endef
TARGET_DEVICES += generic

2
target/linux/x86/image/generic.mk
View File

@ -3,7 +3,7 @@ define Device/generic
DEVICE_MODEL := x86
DEVICE_PACKAGES += kmod-3c59x kmod-e100 kmod-e1000 kmod-natsemi \
kmod-ne2k-pci kmod-pcnet32 kmod-sis900 kmod-tg3 kmod-via-rhine \
kmod-via-velocity kmod-forcedeth kmod-fs-vfat
kmod-via-velocity kmod-forcedeth kmod-fs-vfat kmod-drm-i915
GRUB2_VARIANT := generic
endef
TARGET_DEVICES += generic

3
target/linux/x86/image/legacy.mk
View File

@ -3,7 +3,8 @@ define Device/generic
DEVICE_MODEL := x86/legacy
DEVICE_PACKAGES += kmod-3c59x kmod-e100 kmod-e1000 \
kmod-natsemi kmod-ne2k-pci kmod-pcnet32 kmod-sis900 \
kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth
kmod-tg3 kmod-via-rhine kmod-via-velocity kmod-forcedeth \
kmod-drm-i915
GRUB2_VARIANT := legacy
endef
TARGET_DEVICES += generic