bindings: update after the last header fix
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@ -776,17 +776,6 @@ public class Arm64_const {
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public static final int ARM64_SYSREG_ZCR_EL3 = 0xF090;
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public static final int ARM64_SYSREG_ZCR_EL12 = 0xE890;
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public static final int ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90;
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public static final int ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828;
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public static final int ARM64_SYSREG_OSLAR_EL1 = 0x8084;
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public static final int ARM64_SYSREG_PMSWINC_EL0 = 0xdce4;
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public static final int ARM64_SYSREG_TRCOSLAR = 0x8884;
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public static final int ARM64_SYSREG_TRCLAR = 0x8be6;
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public static final int ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661;
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public static final int ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641;
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public static final int ARM64_SYSREG_ICC_DIR_EL1 = 0xc659;
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public static final int ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d;
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public static final int ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e;
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public static final int ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f;
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public static final int ARM64_PSTATE_INVALID = 0;
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public static final int ARM64_PSTATE_SPSEL = 0x05;
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@ -773,17 +773,6 @@ let _ARM64_SYSREG_ZCR_EL2 = 0xE090;;
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let _ARM64_SYSREG_ZCR_EL3 = 0xF090;;
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let _ARM64_SYSREG_ZCR_EL12 = 0xE890;;
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let _ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90;;
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let _ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828;;
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let _ARM64_SYSREG_OSLAR_EL1 = 0x8084;;
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let _ARM64_SYSREG_PMSWINC_EL0 = 0xdce4;;
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let _ARM64_SYSREG_TRCOSLAR = 0x8884;;
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let _ARM64_SYSREG_TRCLAR = 0x8be6;;
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let _ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661;;
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let _ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641;;
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let _ARM64_SYSREG_ICC_DIR_EL1 = 0xc659;;
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let _ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d;;
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let _ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e;;
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let _ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f;;
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let _ARM64_PSTATE_INVALID = 0;;
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let _ARM64_PSTATE_SPSEL = 0x05;;
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@ -773,17 +773,6 @@ ARM64_SYSREG_ZCR_EL2 = 0xE090
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ARM64_SYSREG_ZCR_EL3 = 0xF090
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ARM64_SYSREG_ZCR_EL12 = 0xE890
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ARM64_SYSREG_CPM_IOACC_CTL_EL3 = 0xFF90
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ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828
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ARM64_SYSREG_OSLAR_EL1 = 0x8084
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ARM64_SYSREG_PMSWINC_EL0 = 0xdce4
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ARM64_SYSREG_TRCOSLAR = 0x8884
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ARM64_SYSREG_TRCLAR = 0x8be6
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ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661
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ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641
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ARM64_SYSREG_ICC_DIR_EL1 = 0xc659
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ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d
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ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e
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ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f
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ARM64_PSTATE_INVALID = 0
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ARM64_PSTATE_SPSEL = 0x05
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