1caeee48aa
sparc: absolute address for Bxx instructions. issue reported by @pancake
2014-11-10 23:38:48 +08:00
e16813d8e8
sparc: get absolute address for CALL. issue reported by @pancake
2014-11-10 22:20:00 +08:00
63ec7c5e50
Merge branch 'next' of https://github.com/aquynh/capstone into next
2014-11-10 21:52:23 +08:00
2ac5d79353
arm: print floating point number in %e format
2014-11-10 21:46:34 +08:00
6ee95188b5
arm64: print immediate in hexa for binary bitwise arith instructions: AND/ORR/EOR/TST
2014-11-10 21:43:02 +08:00
4f99ed2a88
x86: more friendly disassembly for jmp16i (in the form segment:offset). issue reported by @pancake
2014-11-10 21:19:04 +08:00
6acaaa5e44
arm: printAddrMode5Operand() is wrong on calculating subtracted variable
2014-11-10 17:41:05 +08:00
4e17eefc57
arm: lowercase for apsr_nzcv
2014-11-10 17:02:32 +08:00
d865f39a68
arm: use lowercase for special registers
2014-11-10 16:38:17 +08:00
2593e22932
arm: support V8 as a mode for A32 encodings
2014-11-10 16:35:38 +08:00
05bd294920
mips: Mips64 does not go with Mips32R6. this fixes some 64bit instructions
2014-11-10 15:20:49 +08:00
4e20e8e24d
x86: 0x66 & 0x67 cannot be anywhere. this fixes CRC32 instruction
2014-11-10 07:43:49 +08:00
248519efea
mips: properly handle Mips32R6 mode. bug reported by Jay Oster
2014-11-09 14:07:07 +08:00
0157ba1ebe
arm64: add missing commas in SBFIZ/UBFIZ/SBFX/UBFX instructions
2014-11-08 14:33:16 +08:00
c109e8eef3
arm64: print shifter in decimal mode. this is to be consistent with ARM engine
2014-11-08 13:58:50 +08:00
19c63bcf1f
x86: hacky temporarily fix for FEMMS instruction (3DNow). bug reported by Ben Nagy
2014-11-07 12:29:50 +08:00
9cc87876ea
x86: RET imm16 comes with positive number
2014-11-04 11:04:16 +08:00
ff7bba3d6d
x86: print out immediate as positive number for logic arithmetic operations: AND, OR, XOR. only works for x86 Intel syntax so far. issue reported by Pancake
2014-11-03 16:32:06 +08:00
b87f855281
x86: print negative number in memory reference address (more friendly). issue reported by @pancake
2014-11-02 23:38:35 +08:00
c2ea812ea7
fix cs_group_name() after the change on generic group ids
2014-10-31 15:36:19 +08:00
c58e704517
do not need to explicitly assign values for operand types in the last commit
2014-10-31 13:55:18 +08:00
21ac056728
use common operand types across all architectures. this adds cs_op_type to capstone.h. suggestion by @zneak
2014-10-31 13:08:28 +08:00
1084f3afda
mips: properly support modes MIPS32R6 & CS_MODE_MIPSGP64
2014-10-29 22:20:38 +08:00
d91f964d40
* Fixed bug in Thumb2 pop caused by me incorrectly assuming that
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ARM_SP == 13, ARM_LR == 14, and ARM_PC == 15, which is not the case
* updated CMakeLists to include building arm regression test
* added explicit casts for 64 bit visual studio 2012 build to get around
truncation warnings from size_t conversion
2014-10-23 12:04:23 -04:00
11f8e7c596
arm: B, BL, BX, BLX, BXJ belong to ARM_GRP_JUMP group. issue reported by @nanomad
2014-10-21 17:35:34 +08:00
85cfb1839c
x86: get rid of redundant X86_INS_LOCK/REP/RENE. issue reported by Pancake
2014-10-18 05:53:32 +08:00
5c0d9a4ade
Add '4*cri+cond' to operand list
2014-10-17 14:52:03 +02:00
79e253c516
Remove CS_MODE_N64
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- This mode is for the so-called MIPS "N64" ABI; it has nothing to do with the Nintendo 64 game platform.
- N64, O64, et al. are just different ABIs for the 64-bit MIPS architecture, so we replace CS_MODE_N64 with the existing CS_MODE_64
2014-10-12 16:03:12 -07:00
c64d6292fc
mips: remove MIPS_REG_PC register. reviewed by Jay Oster
2014-10-10 21:11:50 +08:00
8bf5fa60ad
arm: remove dead code
2014-10-07 07:56:01 +08:00
b0cc71da59
bindings: update java/ocaml/python after the last change in Arm's core
2014-10-06 21:01:32 +08:00
8fb2eab459
arm: some operands can get subtracted from base register, thus have '-' sign associated. this adds subtracted field into cs_arm_op to provide this info. issue reported by Yegor Derevenets
2014-10-06 20:27:25 +08:00
f2b699a716
Don't add cr0 to the operand list as it's not displayed by the disassembly
2014-10-02 20:53:55 +02:00
e96935ed68
ppc: remove duplicate op_addReg() in printAliasInstrEx()
2014-10-02 17:09:22 +08:00
a90b047d9f
x86: simplify printPCRelImm() in calculating absolute address. also fix the issue on AT&T syntax
2014-10-02 12:04:35 +08:00
ea3c089591
some simple optimizations for speed. this improves performance about 5%
2014-10-02 10:17:55 +08:00
a92d2cba1d
x86: properly calculate absolute addresses of relative CALL & JMP. thanks Pedro for valuable helps
2014-10-01 22:10:22 +08:00
df92a7f346
mips: BC0F is relative branch instruction. bug reported by Pancake
2014-10-01 21:25:18 +08:00
48eb13c33c
ppc: add detail for alias instructions introduced in the latest change by @kratolp
2014-10-01 21:18:55 +08:00
6b731a097f
fix conflicts when merging
2014-10-01 21:05:51 +08:00
630bcd6d4e
ppc: c99
2014-10-01 21:02:30 +08:00
70fa90fbfe
ppc: coding style
2014-10-01 18:21:02 +08:00
73835104a4
Merge branch 'next' of https://github.com/aquynh/capstone into next
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Conflicts:
arch/PowerPC/PPCInstPrinter.c
2014-10-01 11:54:14 +02:00
a3f0aef79a
PPC: Fix absolute/relative offset for branch instruction
...
PPC: Fix non handling of bc instruction that uses the CTR
2014-10-01 11:39:15 +02:00
c96f1b06b2
x86: fix Out-of-bounds read error in is16BitEquivalent(). issue reported by Coverity
2014-10-01 14:35:29 +08:00
9bf1b87a66
mips: fix out-of-bounds read error in Mips_reg_name(). issue reported by Coverity
2014-10-01 14:32:15 +08:00
e135056f17
fix a negative array index read in PPC_alias_insn(). issue reported by Coverity
2014-10-01 14:23:35 +08:00
9d54544288
mips: verify if RegDecoder can get NULL value. issue reported by Coverity
2014-10-01 14:16:07 +08:00
7e644f0fea
ppc: initialize needComma to false. issue reported by Coverity
2014-10-01 14:13:48 +08:00
9235fdc504
arm: The Thumb2 ldrexd and strexd instructions are not defined for M-class architectures
2014-09-30 07:44:50 +08:00
Nguyen Anh Quynh