6d2c587536
Patch for issue #842
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The SETEND instruction is a 16 bit Thumb instruction which is included
in T variants of ARMv6 and above, but is not available in M-Class cores
(see ARM Compiler toolchain Assembler Reference Ver 5.0).
To be consistent with other similar instructions its group flags have
been updated to be:
{ARM_GRP_THUMB, ARM_GRP_V6, ARM_GRP_NOTMCLASS,0}
2017-01-18 17:35:42 +00:00
db0a00f2c0
Fix classification of ARM jump instructions
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All jump instructions have been classified based on the direct
and indirect_branch flags instead of explicitly stating ARM_GRP_JUMP.
2015-12-17 12:36:48 +01:00
5c48bb22f9
arm: remove ASRS, LSRS, SUBS & MOVS from mapping table insns[]. backported from the 'next' branch, but do not really remove these 'dead' instructions for compatibility reason
2015-05-08 15:08:35 +08:00
accd198468
arm: BLX should read PC & modify LR registers. bug reported by Zach Riggle
2015-05-08 15:04:09 +08:00
f2157deacc
arm: in Thumb mode, ADC & SBC do not update flags. bug reported by @jabba2989
2015-01-13 22:18:05 +08:00
07526e989b
arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP.
2014-12-30 10:47:04 +08:00
db684b2398
arm: BL & BLX do not read SP, but PC register. issue reported by Der Rek
2014-12-27 16:26:42 +08:00
c2ea812ea7
fix cs_group_name() after the change on generic group ids
2014-10-31 15:36:19 +08:00
11f8e7c596
arm: B, BL, BX, BLX, BXJ belong to ARM_GRP_JUMP group. issue reported by @nanomad
2014-10-21 17:35:34 +08:00
9235fdc504
arm: The Thumb2 ldrexd and strexd instructions are not defined for M-class architectures
2014-09-30 07:44:50 +08:00
d7e42b7d36
rename all the constants marking ending from _MAX to _ENDING. this also updates Java/Python/Ocaml bindings accordingly
2014-09-29 17:15:25 +08:00
d442fbc06e
arm: t2BXJ also belongs to groups ARM_GRP_NOTMCLASS & ARM_GRP_PREV8
2014-09-26 10:38:29 +08:00
04d9f8ee17
arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes
2014-09-01 23:27:24 +08:00
b52f11f636
arm: update core. this added a new instruction UDF. also updated Python+Java bindings accordingly
2014-08-13 22:38:15 +08:00
26dfbc6677
fix indentation introduced by the latest merge. also move test_arm_regression.c into suite/arm/ and add Makefile for it
2014-07-31 18:24:51 +08:00
5d8067822b
Merge branch 'next' of https://github.com/flyingsymbols/capstone into arm
2014-07-31 15:36:13 +08:00
298d413bbc
* added a test file to suite for testing invalid and valid instruction sequences
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* fixed and added a test for a thumb-2 invalid sequence that was incorrectly allowed before these changes (pop.w with sp argument included)
* fixed and added a test for a blx from thumb to ARM that had its immediate argument incorrect (misaligned)
* eliminated some warnings by explicitly casting so I could turn on
treat warnings as errors locally
General notes:
* probably worth turning on treat all warnings as errors in the msvc project files, had a subtle bug that resulted from a missing declaration causing differences in dll and static compilation modes
( code was working incorrectly in dll form because of missing declaration in arch/ARM/ARMMapping.h for new function ARM_blx_to_arm_mode. Something about the linking was confusing ld when making the dll, and the resulting offsets were wonky (e.g. the added ble test would show up as #0x1fc instead of #0x1fe like it should have )
* the invalid pop was being treated as a soft fail which then gets coerced
to a success because it is != MCDisassembler_Fail in Thumb_getInstruction
what are the semantics of a soft fail? Maybe we should be able to set up
whether or not we want a soft fail to be a real fail in the csh struct?
2014-07-15 04:33:40 -04:00
650f96ce43
add new API cs_group_name() to return group name in string, given the group id
2014-07-08 08:59:27 +08:00
73bbbb3800
arm: add ASRS, LSRS, VCLE, VCLT instructions. update Python & Java bindings at the same time
2014-06-17 13:29:54 +08:00
04f2ec6d0f
cleanup redundant headers included
2014-05-27 10:39:04 +08:00
8598a219f3
enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up
2014-05-14 11:26:41 +08:00
d27b0155ef
arm: add BLX_pred into the list of relative branch instructions
2014-05-09 17:34:54 +08:00
bc80b3dc24
arm: fix some more Thumb relative branch instructions. bug reported by Giovanni Nanomad Condello
2014-05-09 17:31:41 +08:00
d43187d4f9
arm: BLXi is another relative branch instruction to be fixed. bug reported by Giovanni Nanomad Condello
2014-05-09 07:02:51 +08:00
49a1cb374c
arm: fix another relative jump issue. bug reported by Giovanni Nanomad Condello
2014-05-08 23:42:06 +08:00
79e1dcb5f1
arm: update target branch having relative offset. issue reported by Giovanni Condello
2014-05-07 14:12:50 +08:00
40f72fde6f
arm: do not update target branch with relative offset
2014-03-31 22:07:40 +08:00
43befa06a3
arm: no longer rely on information from @groups to verify relative instructions
2014-02-25 16:26:56 +08:00
fc83a439e5
add diet compile option (CAPSTONE_DIET option in config.mk). This reduces binary size by around 40%
2014-02-22 23:26:27 +08:00
585018f831
ppc & arm: remove functions *_get_insn_id2()
2014-02-18 00:13:34 +08:00
46018db884
Initial set of changes to support building with MSVC 2013. Right now there's a bunch fo assumptions in the .vcxproj file and some things are not as clean as they should be, but it does build a full build and works (at least the x86 side). The point of this initial checkpoint is to make sure that nothing breaks on the GCC side, that everyone is ok with the changes to the source (or if better fixes/typing can be done).
2014-01-22 09:45:00 -08:00
3732725342
rename mapping.c, mapping.h, module.c to have arch prefix. suggested by Alex Ionescu
2014-01-20 09:52:05 +08:00
JustEnuff2BDangerous