Commit Graph

39 Commits

Author SHA1 Message Date
Stephen Eckels dce7da98f8 Merges encoding to next (#1194)
* merge encoding branch into next branch

* added python bindings and updated test to support encoding

* fix python import

* fix py binding fields

* fix disp size printing

* fixed py binding, again

* Update CREDITS.TXT

* fixed formatting and a cast

* Changed param from int to uint8_t, fixed warnings
2018-07-04 22:47:55 +08:00
smart-rabbit 881f9201d9 retrieve and print "status register updates" info (#995)
is equal to the code in https://github.com/aquynh/capstone/blob/next/tests/test_x86.c
2017-09-06 20:37:21 +07:00
Niels Boehm 32b6346c2c Use and test syntax against None in all_tests.
Comparing against 0 or just testing the truthiness is suboptimal, as you
lose the ability to explicitly set the syntax to CS_OPT_SYNTAX_DEFAULT
or 0.

Also, using None to mean "don't change" or other "here is no value"
interpretations is much more pythonic than the C-idiomatic 0.
2016-06-13 12:25:24 +02:00
Nguyen Anh Quynh 7114a6258e binding: remove cx_x86_op::fp following the change in the core 2016-04-24 00:16:08 +08:00
Nguyen Anh Quynh 95d4e9fd00 python: fix access info of test_x86.py (CS_AC_READ|CS_AC_WRITE) 2015-03-26 00:27:19 +08:00
Nguyen Anh Quynh 10647aef58 bindings: update java/ocaml/python after the latest changes in the core for the new API 2015-03-25 17:35:59 +08:00
Nguyen Anh Quynh debaa2eefc bindings: support newly added field @xop_cc in the last commit (Java, Ocaml, Python) 2015-03-07 13:46:21 +08:00
Nguyen Anh Quynh 9f6ed7155a x86: add @rex to cs_x86 struct. updated python & java binding for this change 2014-07-01 10:13:28 +08:00
Nguyen Anh Quynh 1a66fecdbc x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change 2014-06-26 12:09:15 +08:00
Nguyen Anh Quynh 7de200afee python & java: update after the last change in the core on avx_zero_opmask 2014-06-26 11:31:36 +08:00
Nguyen Anh Quynh 92a3d4c079 x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change 2014-06-25 23:10:39 +08:00
Nguyen Anh Quynh f1ec52628e x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions 2014-06-25 22:03:18 +08:00
Nguyen Anh Quynh 4c5eabc32b x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings 2014-06-24 23:50:41 +08:00
Nguyen Anh Quynh 0d716450fc x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding 2014-06-24 22:51:56 +08:00
Nguyen Anh Quynh 14ba46bfab x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan. 2014-06-24 14:32:01 +08:00
Nguyen Anh Quynh 83800cdc31 python & java: add comments on operand's size 2014-06-18 14:21:36 +08:00
Nguyen Anh Quynh e792451cce python: update after the last change in x86 core 2014-06-18 12:27:54 +08:00
Nguyen Anh Quynh e96e34df9a python: test_x86.py print prefixes with a space between consecutive bytes 2014-05-22 12:33:29 +08:00
Nguyen Anh Quynh f260c2023e fix some conflicts when merging msvc2 into next 2014-05-19 11:32:55 +08:00
Nguyen Anh Quynh cb2c4f90bf test_x86: output sib_base, sib_index, sib_scale separately 2014-05-17 13:12:29 +08:00
Nguyen Anh Quynh 688efe3018 python: properly handle SIB's registers on irrelevant cases (zero value) of test_x86.py 2014-05-17 11:08:08 +08:00
Nguyen Anh Quynh 1098329f40 python: refactor tests, so it is possible to reuse print_insn_detail() of all archs 2014-05-17 09:51:15 +08:00
danghvu cdf6b8222c Fix mismatch tests' output of python binding 2014-05-14 02:36:45 -05:00
Nguyen Anh Quynh 749046bbdc python: initial Python3 support 2014-04-12 01:15:10 +08:00
fenuks 110ab1debd Python 3 support 2014-04-11 11:00:33 +02:00
Nguyen Anh Quynh 49f8f22984 python: handle SKIPDATA mode properly in test code 2014-04-10 17:40:10 +08:00
Nguyen Anh Quynh 428fdcdfda python: update following the change to detail mode in the core 2014-01-07 23:39:40 +08:00
Nguyen Anh Quynh e06b2d0868 python: simplify access to operand's information thanks to some getters for <ARCH>Ops classes 2014-01-01 22:30:53 +08:00
Nguyen Anh Quynh 572afeed7c python: code style: replace tab with 4 spaces 2013-12-16 11:19:24 +08:00
Nguyen Anh Quynh dcde7e7e70 python: replace op_index() with op_find(), which straightly returns the desired operand rather than its cumbersome index 2013-12-06 21:33:58 +08:00
Nguyen Anh Quynh f1618bc2ee python: add error message to CsError and modify all tests to use CsError exception 2013-12-06 20:58:04 +08:00
Nguyen Anh Quynh cdf41b017d python: delete dead code 2013-12-06 18:09:40 +08:00
Nguyen Anh Quynh e099ede6c5 Fix Python bindings:
- No more use generator to return instruction list
- Delete redundant Mips consts in mips.py
- Revert the last wrong change on ctypes prototype of cs_disasm_dyn(): it is wrong to use c_char_p
2013-12-06 18:06:11 +08:00
Nguyen Anh Quynh 520c3615b6 rename python classes and using exception for error
- rename class cs to Cs, cs_insn to CsInsn
- throw CsError exception to handle cs_errno()
- fix all test*.py code to reflect above changes
2013-12-06 15:26:07 +08:00
Nguyen Anh Quynh 4649071e2d python: add ERR_OPTION, and use @syntax setter/getter rather than option() method to set X86 syntax 2013-12-06 00:44:44 +08:00
Nguyen Anh Quynh c618db4473 change option names for cs_option(), and update python binding accordingly to support new cs_option() 2013-12-04 00:05:04 +08:00
Nguyen Anh Quynh daaed13cc1 python: update to the newly added cs_option() API 2013-12-03 22:18:28 +08:00
danghvu 1a7c449a72 Fix python test output, same as core test 2013-11-27 22:51:11 -06:00
Nguyen Anh Quynh 26ee41aa67 initial import 2013-11-27 12:11:31 +08:00