Travis Finkenauer
8998a3a1d5
ppc: fix endian check ( #1029 )
...
* Remove `big_endian` field of `cs_struct`
Added a helper macro `MODE_IS_BIG_ENDIAN()` to check if
`CS_MODE_BIG_ENDIAN` is set.
Refactored `cs_open()` check for valid mode out of arch-specific code
into arch-independent code. Also added a valid mode check to
`cs_option()`. The checks use a new global array
`arch_disallowed_mode_mask[]`, which is initialized in the arch-specific
`*_enable()` functions.
Fixes bug where endianness could not be set for ppc.
* Fix Mac OS brew for Travis CI
2017-10-20 23:33:24 +08:00
Mitchell Johnson
da38d99d51
Use the correct mapping for 32-bit Thumb Big-Endian insns
2016-11-13 23:18:13 -05:00
Nguyen Anh Quynh
b158b93a7d
remove myinttypes.h
2016-04-26 09:47:30 +08:00
Nikolay Igotti
4fcb31c9d3
Fix Thumb disassembler memory corruption with IT sequence (issue #385 )
2015-06-03 15:38:45 +02:00
Cr4sh
9d60607645
inttypes.h fix
2015-03-29 18:29:06 +08:00
pzread
61cbeabb44
Remove incorrect ITBlock.size = 0
2015-02-15 01:40:58 +09:00
Nguyen Anh Quynh
e19490e8f7
arm: some load/store instructions writeback without bang letter. bug reported by @jabba2989
2015-01-21 20:03:21 +08:00
Nguyen Anh Quynh
c00bc2efb6
fix the left-over C89 issues introduced by Pedro
2014-11-21 19:29:47 +08:00
reverser
68197d9a5e
Make it C89 compatible.
2014-11-20 13:45:43 +00:00
reverser
202da41980
Fix compiler warnings about different sizes and sign.
2014-11-20 12:13:19 +00:00
Nguyen Anh Quynh
2593e22932
arm: support V8 as a mode for A32 encodings
2014-11-10 16:35:38 +08:00
flyingsymbols
d91f964d40
* Fixed bug in Thumb2 pop caused by me incorrectly assuming that
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ARM_SP == 13, ARM_LR == 14, and ARM_PC == 15, which is not the case
* updated CMakeLists to include building arm regression test
* added explicit casts for 64 bit visual studio 2012 build to get around
truncation warnings from size_t conversion
2014-10-23 12:04:23 -04:00
Yegor Derevenets
ced9d24e35
Workaround missing <inttypes.h> on MSVC 2010
2014-09-21 17:27:11 +02:00
Nguyen Anh Quynh
04d9f8ee17
arm: update core with a lot more details provided in detail mode now. update Python & Java bindings to reflect the core's changes
2014-09-01 23:27:24 +08:00
Nguyen Anh Quynh
7c089fd6c6
arm: add new mode CS_MODE_MCLASS for Cortex-M series. updated Python & Java bindings accordingly
2014-08-13 23:08:40 +08:00
Nguyen Anh Quynh
b52f11f636
arm: update core. this added a new instruction UDF. also updated Python+Java bindings accordingly
2014-08-13 22:38:15 +08:00
Nguyen Anh Quynh
590f23af54
arm: do not need to initialize local variable opcode in DecodeRegListOperand()
2014-07-31 21:23:51 +08:00
Nguyen Anh Quynh
26dfbc6677
fix indentation introduced by the latest merge. also move test_arm_regression.c into suite/arm/ and add Makefile for it
2014-07-31 18:24:51 +08:00
flyingsymbols
298d413bbc
* added a test file to suite for testing invalid and valid instruction sequences
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* fixed and added a test for a thumb-2 invalid sequence that was incorrectly allowed before these changes (pop.w with sp argument included)
* fixed and added a test for a blx from thumb to ARM that had its immediate argument incorrect (misaligned)
* eliminated some warnings by explicitly casting so I could turn on
treat warnings as errors locally
General notes:
* probably worth turning on treat all warnings as errors in the msvc project files, had a subtle bug that resulted from a missing declaration causing differences in dll and static compilation modes
( code was working incorrectly in dll form because of missing declaration in arch/ARM/ARMMapping.h for new function ARM_blx_to_arm_mode. Something about the linking was confusing ld when making the dll, and the resulting offsets were wonky (e.g. the added ble test would show up as #0x1fc instead of #0x1fe like it should have )
* the invalid pop was being treated as a soft fail which then gets coerced
to a success because it is != MCDisassembler_Fail in Thumb_getInstruction
what are the semantics of a soft fail? Maybe we should be able to set up
whether or not we want a soft fail to be a real fail in the csh struct?
2014-07-15 04:33:40 -04:00
Nguyen Anh Quynh
2a461ed422
arm: zeroout a whole cs_arm struct in *getInstruction(). this makes sure operand of REG type has shift type = 0 by default
2014-06-17 13:27:38 +08:00
Nguyen Anh Quynh
0f648ea3e8
arm: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free to improve performance
2014-06-10 01:01:23 +07:00
Nguyen Anh Quynh
69582d71ae
initialize cs_insn.detail by properly zero-out right members for each arch
2014-06-09 17:50:01 +07:00
Nguyen Anh Quynh
8598a219f3
enable arch code from source with CAPSTONE_HAS_* for MSVC to pick up
2014-05-14 11:26:41 +08:00
Nguyen Anh Quynh
bb0744df5d
do not initialize some local vars unnecessarily. this problem was introduced when we fixed C89 issues for MSVC
2014-05-12 13:41:49 +08:00
Nguyen Anh Quynh
42706a39e2
indentation with tab
2014-05-09 07:33:35 +08:00
Axel 0vercl0k Souchet
779d4c75d9
first changes to get a successfully compiled version of capstone on VS2012
2014-05-08 23:44:49 +01:00
Nguyen Anh Quynh
958927eb56
clean up after the last removal of SubtargetFeature.h
2014-05-08 22:59:28 +08:00
Nguyen Anh Quynh
a5ffdc3a80
x86: properly handle LOCK/REP in the core, so remove buch of hacks
2014-05-07 08:25:24 +08:00
Giovanni Condello
7c78778cfc
Make capstone library compile with arm-none-eabi-gcc 4.8
2014-05-02 20:15:53 +02:00
Nguyen Anh Quynh
2cff6f61fc
x86: handle instructions with LOCK/REP/REPNE prefix after other prefixes. bear with this until we have a better approach
2014-04-28 11:19:44 +08:00
Nguyen Anh Quynh
cbaf913d68
arm: fix a bug in getting data from input buffer of Thumb: bail out if not enough data
2014-03-06 21:50:45 +08:00
Nguyen Anh Quynh
aa078a1c4a
more fixes on C coding style
2014-01-23 22:29:04 +08:00
Alex Ionescu
b8a57fe285
Additional MSVC fixes, including to fixed tables (temporary so Quynh can see what to do).
2014-01-22 18:12:01 -08:00
Alex Ionescu
46018db884
Initial set of changes to support building with MSVC 2013. Right now there's a bunch fo assumptions in the .vcxproj file and some things are not as clean as they should be, but it does build a full build and works (at least the x86 side). The point of this initial checkpoint is to make sure that nothing breaks on the GCC side, that everyone is ok with the changes to the source (or if better fixes/typing can be done).
2014-01-22 09:45:00 -08:00
Nguyen Anh Quynh
9cc56a3322
arm: update core
2014-01-15 16:01:55 +08:00
Nguyen Anh Quynh
a768c9eb2c
arm: support big-endian. issue reported by Pancake
2014-01-09 09:05:27 +08:00
Nguyen Anh Quynh
04ac9c3725
arm,arm64,mips,x86: rename PPC_getFeatureBits() to getFeatureBits()
2013-12-31 18:15:12 +08:00
pancake
f0e4eed89d
Use const on all read-only buffers
2013-12-11 22:14:42 +01:00
Nguyen Anh Quynh
10fd59eacf
cleanup & remove dead code in arm, arm64 & mips. dead code was reported by Pancake
2013-12-11 20:37:42 +08:00
Nguyen Anh Quynh
462f291b9f
ARM: Fix bunch of issues
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- Bugs
- start switching to more friendly asm: for number under 10, print without hex in front
2013-12-11 17:35:27 +08:00
Nguyen Anh Quynh
723fa80890
arm: some hardware features must be mutually exclusive
2013-12-10 12:13:05 +08:00
pancake
c04f873791
Use uint64_t instead of size_t for addresses
2013-12-03 02:51:46 +01:00
Nguyen Anh Quynh
7c7a8bc523
arm: move static variable ITBlock to cs_struct, so make arm code truly thread-safe
2013-12-02 13:16:44 +08:00
Nguyen Anh Quynh
5ef8b2a7de
arm: fix param of MCRegisterInfo_InitMCRegisterInfo() in ARM_init()
2013-12-01 23:13:30 +08:00
Nguyen Anh Quynh
173ed2b1cb
arm: upgrade core engine
2013-12-01 22:19:27 +08:00
Nguyen Anh Quynh
b42a657873
change cs_disasm() and cs_disasm_dyn() to be portable API. fix related code using these API
2013-11-29 17:40:07 +08:00
Nguyen Anh Quynh
26ee41aa67
initial import
2013-11-27 12:11:31 +08:00