Commit Graph

101 Commits

Author SHA1 Message Date
Martin bd89989f5d readDisplacement fix (#1200) 2018-07-11 22:18:38 +07:00
Stephen Eckels e9861a1192 Merges encoding to next (#1194)
* merge encoding branch into next branch

* added python bindings and updated test to support encoding

* fix python import

* fix py binding fields

* fix disp size printing

* fixed py binding, again

* Update CREDITS.TXT

* fixed formatting and a cast

* Changed param from int to uint8_t, fixed warnings
2018-07-04 22:47:55 +08:00
Catena cyber 950476606b Initialize X86 necessaryPrefixLocation (#1179)
* Initialize X86 necessaryPrefixLocation

* necessaryPrefixLocation initialization to -1

* Revert "necessaryPrefixLocation initialization to -1"

This reverts commit 04fc4b6702ad839d87ee4f73695b9dfc632fb698.
2018-06-25 19:46:58 +08:00
vit9696 f8eae0ac15 Refactor confusing if for xacquire/xrelease (#1173)
Sync with https://github.com/llvm-mirror/llvm/blob/7cdce81/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp#L362
2018-06-13 22:14:53 +08:00
Richard Henderson edb0cc57ac Fix pp field in readPrefix for VEX3 and EVEX (#1015) (#1016) 2017-09-19 08:46:59 +08:00
Nguyen Anh Quynh b7f9e75c3b x86: handle f2/f3 prefix for 16bit. see issue #452 2017-05-07 14:30:06 +08:00
Nguyen Anh Quynh 27eb3b2c3a x86: lock nop is a valid instruction. #915 2017-05-03 20:06:15 +08:00
el2ro 0951668a46 fix merged conflicts 2017-04-15 10:39:06 +08:00
Ole André Vadla Ravnås de995b0edd Fix use of uninitialized value for some instructions
Caught by Valgrind:

    Conditional jump or move depends on uninitialised value(s)
       at 0xD5BB6F: readModRM (X86DisassemblerDecoder.c:1528)
       by 0xD5BF02: getIDWithAttrMask (X86DisassemblerDecoder.c:1101)
       by 0xD5CC5E: getID (X86DisassemblerDecoder.c:1249)
       by 0xD5CC5E: decodeInstruction (X86DisassemblerDecoder.c:2335)
       by 0xD52009: X86_getInstruction (X86Disassembler.c:822)
       by 0xD51781: cs_disasm (cs.c:503)
2016-09-27 08:51:16 +08:00
Nguyen Anh Quynh 63c195d218 Merge pull request #657 from davidcarne/fix-uninit
x86: initialize eaDisplacement in 16-bit mode.  Fixes #656
2016-07-18 23:26:25 +08:00
tandasat d4ef430b33 port Windows driver support 2016-05-11 21:48:32 -07:00
David Carne 7be7f63216 x86: initialize eaDisplacement in 16-bit mode. Fixes #656 2016-04-28 20:05:55 -07:00
Nguyen Anh Quynh 475e04da00 x86: fix the leftover prefixPresent[] 2015-10-08 15:58:52 +08:00
Nguyen Anh Quynh 29ff43fd6b x86: coding style 2015-10-08 15:53:44 +08:00
bughoho 7138044052 x86: add dedicated variables such as prefix2e, prefix36, prefix66, prefix67, etc 2015-10-08 15:53:17 +08:00
Nguyen Anh Quynh 0e9da8736a x86: treat prefix-only sequences of bytes as invalid code. this fixes a NDP reported by @felixgr 2015-06-16 11:57:22 +08:00
Ole André Vadla Ravnås a4f9da920f Fix handling of cmpxchg16b with lock prefix
This was discovered when Frida's Stalker encountered the following
x86-64 instruction while tracing code in ntdll: `f0 49 0f c7 0a`.
2015-04-23 12:42:03 +02:00
reverser 160e198584 Add support to embed Capstone 3.x branch into OS X kernel extensions. 2015-04-09 18:28:19 +01:00
Nguyen Anh Quynh 7289f15a5d x86: tighter check on return of consumeByte() & lookAtByte(). this fixes the segfault on the sole input of 0xf3 reported by windhl 2015-04-08 12:17:12 +08:00
Nguyen Anh Quynh fce28ce159 x86: revert the old change that check prefix location more strictly 2015-04-03 00:10:31 +08:00
Nguyen Anh Quynh 9239967dd7 x86: fix instruction 66f20f59ff reported by @maijin 2015-04-02 12:41:41 +08:00
Nguyen Anh Quynh 6a4d27706a x86: fix the pause instruction reported by @maijin in issue #298 2015-04-02 12:32:33 +08:00
Nguyen Anh Quynh 09218a2dfd x86: remove unsed field @prefixLocations of InternalInstruction struct 2015-03-11 11:29:33 +08:00
Nguyen Anh Quynh bcb75a2194 x86: F2 can be a part of instruction encoding, but not a prefix 2015-03-11 11:15:27 +08:00
Nguyen Anh Quynh 54d5071288 x86: update core. also update all the bindings Java, Ocaml & Python 2015-03-06 00:52:49 +08:00
Nguyen Anh Quynh bfcaba5851 2015 2015-03-04 17:45:23 +08:00
Félix Cloutier 6d2c6a7a97 Silencing Clang warning about losing precision 2015-03-04 11:26:49 +08:00
Nguyen Anh Quynh e84d2cd523 x86: allow prefixes to be positioned anywhere. this should fix the bug reported by Gabriel Quadros 2015-02-25 17:04:23 +08:00
Nguyen Anh Quynh dfa396e6ff x86: add the missing X86 instructions in X86_REDUCE mode in X86DisassemblerDecoder.c. bug reported by Julian Stecklina 2015-02-12 09:02:42 +08:00
Michael Cohen f601fddc53 Merge branch 'next' of https://github.com/aquynh/capstone into python 2015-01-26 17:33:21 +01:00
Nguyen Anh Quynh e95a76611c x86: remove some instructions unsupported in 3.x version 2015-01-13 14:35:43 +08:00
Nguyen Anh Quynh 25525fb20c x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() 2015-01-13 12:14:46 +08:00
Nguyen Anh Quynh 08482e106d x86: remove some instructions irrelevant for LOCK prefix in invalidPrefix() 2015-01-13 12:14:19 +08:00
Andrew Wesie 29f41da4c2 x86: add more valid instructions for LOCK prefix 2015-01-13 12:04:12 +08:00
Nguyen Anh Quynh 5323128ed2 x86: check for invalid instructions with LOCK prefix 2015-01-13 12:04:02 +08:00
Andrew Wesie 5de09479a6 x86: add more valid instructions for LOCK prefix 2015-01-05 18:26:41 -06:00
Nguyen Anh Quynh beb3248c26 x86: check for invalid instructions with LOCK prefix 2015-01-05 22:18:00 +07:00
Nguyen Anh Quynh 599b559455 x86: fix some compilation issues about missing instructions on CAPSTONE_X86_REDUCE setup 2014-12-31 10:42:16 +08:00
Nguyen Anh Quynh 3c27827a25 x86: handle 0x82 opcode for CAPSTONE_X86_REDUCE setup 2014-12-30 15:43:19 +08:00
Nguyen Anh Quynh 3410b63a4e x86: handle 0x82 opcode. bug reported by Anton Kochkov 2014-12-30 13:16:44 +08:00
Nguyen Anh Quynh c51e04fa97 x86: support CR9-CR15 registers 2014-12-27 23:56:14 +08:00
Nguyen Anh Quynh 08390775b5 x86: support CR9-CR15 registers 2014-12-27 23:55:08 +08:00
Nguyen Anh Quynh 1038fdb038 x86: add new registers DR8-DR15 2014-12-27 15:33:12 +08:00
Nguyen Anh Quynh 9f694cc934 x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions 2014-12-26 17:54:11 +08:00
Nguyen Anh Quynh 2ac7941227 x86: handle REX properly for segment related instructions by ignoring REX.r entirely 2014-12-24 16:16:51 +08:00
Nguyen Anh Quynh 80959c9a25 code style 2014-12-24 16:03:10 +08:00
Nguyen Anh Quynh 094811415c x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely 2014-12-24 16:02:44 +08:00
Nguyen Anh Quynh 51754231b9 x86: check instruction size <=15 as soon as possible 2014-12-18 00:20:07 +08:00
Nguyen Anh Quynh 3539595183 x86: instruction length must be <= 15 2014-12-17 23:53:32 +08:00
Nguyen Anh Quynh a3d689de51 x86: allow to mix REX & legacy prefix repeatedly in any order 2014-12-16 22:36:16 +08:00