Nguyen Anh Quynh 10ecdaef31 x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP		2014-12-16 22:04:07 +08:00
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AArch64	arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake	2014-12-12 22:06:06 +08:00
ARM	arm: alias LDR instruction with operands '[sp], 4' to POP. suggested by Pancake	2014-11-27 14:34:40 +08:00
Mips	mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons	2014-11-17 22:59:24 +08:00
PowerPC	Populate PowerPC slwi/srwi instruction details with SH operand.	2014-11-23 00:15:19 +00:00
Sparc	sparc: add missing ICC/XCC registers in operands[] for some alias instructions. bug reported by @pancake	2014-11-11 07:02:13 +08:00
SystemZ	fix cs_group_name() after the change on generic group ids	2014-10-31 15:36:19 +08:00
X86	x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP	2014-12-16 22:04:07 +08:00
XCore	mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons	2014-11-17 22:59:24 +08:00