capstone/arch/X86
Nguyen Anh Quynh 10ecdaef31 x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
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X86ATTInstPrinter.c x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie 2014-12-12 11:51:35 +08:00
X86BaseInfo.h x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
X86Disassembler.c x86: print out immediate as positive number for logic arithmetic operations: AND, OR, XOR. only works for x86 Intel syntax so far. issue reported by Pancake 2014-11-03 16:32:06 +08:00
X86Disassembler.h x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
X86DisassemblerDecoder.c x86: only eliminate REX prefixes if next byte is not a legacy prefix 2014-12-13 10:27:56 +08:00
X86DisassemblerDecoder.h x86: 0x66 & 0x67 cannot be anywhere. this fixes CRC32 instruction 2014-11-10 07:43:49 +08:00
X86DisassemblerDecoderCommon.h x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
X86GenAsmWriter.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenAsmWriter1.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenAsmWriter1_reduce.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenAsmWriter_reduce.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenDisassemblerTables.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenDisassemblerTables_reduce.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenInstrInfo.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenInstrInfo_reduce.inc x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86GenRegisterInfo.inc x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change 2014-08-13 13:01:50 +08:00
X86InstPrinter.h Disassembler -> Disassembly 2014-05-27 10:45:58 +08:00
X86IntelInstPrinter.c x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie 2014-12-12 11:51:35 +08:00
X86Mapping.c x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP 2014-12-16 22:04:07 +08:00
X86Mapping.h x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie 2014-12-12 11:25:12 +08:00
X86Module.c some simple optimizations for speed. this improves performance about 5% 2014-10-02 10:17:55 +08:00