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* arm64: handling of system registers added in ARMv8.2 This commit adds handling of system registers added in ARMv8.2. Those registers are accessed by mrs and msr instructions. Changes based on https://static.docs.arm.com/ddi0487/b/DDI0487B_a_armv8_arm.pdf, chapters D7.2-5. List of added registers: id_mmfr4_el1 id_aa64mmfr2_el1 sctlr_el12 cpacr_el12 ttbr0_el12 ttbr1_el12 ttbr1_el2 tcr_el12 spsr_el12 elr_el12 afsr0_el12 afsr1_el12 esr_el12 far_el12 mair_el12 amair_el12 vbar_el12 cntkctl_el12 cnthv_ctl_el2 cnthv_cval_el2 cnthv_tval_el2 cntp_tval_el02 cntp_cval_el02 cntv_ctl_el02 ntv_cval_el02 cntv_tval_el02 lorid_el1 lorc_el1 lorea_el1 lorn_el1 lorsa_el1 contextidr_el12 sign-of: Michalina Oleksy (https://github.com/layika) * arm64: handling of system registers added in ARMv8.1/2 v8.1: PAN (https://static.docs.arm.com/ddi0487/b/DDI0487B_a_armv8_arm.pdf, page 358) PAN (as pstate field) contextdir_el2 v8.2: UAO (https://static.docs.arm.com/ddi0487/b/DDI0487B_a_armv8_arm.pdf, page 403) UAO (as pstate field) * arm64: handling of system registers for statistical profiling Added handling of system registers for statistical profiling extension based on https://static.docs.arm.com/ddi0586/a/DDI0586A_Statistical_Profiling_Extension.pdf * Update AArch64BaseInfo.h * arm64: An attempt to fix indentation |
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| AArch64 | ||
| ARM | ||
| Mips | ||
| PowerPC | ||
| Sparc | ||
| SystemZ | ||
| X86 | ||
| XCore | ||