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MdePkg: Remove ARM32 Support from CompilerIntrinsicsLib
edk2 is dropping support for the ARM32 architecture. This commit removes ARM32 code from CompilerIntrinsicsLib. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
This commit is contained in:
Oliver Smith-Denny
committed by
mergify[bot]
mergify[bot]
parent
49b3eb5907
commit
bc31103006
@ -1,27 +0,0 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroLib.h>
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ASM_FUNC(__ashldi3)
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cmp r2, #31
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bls L2
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cmp r2, #63
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subls r2, r2, #32
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movls r2, r0, asl r2
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movhi r2, #0
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mov r1, r2
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mov r0, #0
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bx lr
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L2:
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cmp r2, #0
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rsbne r3, r2, #32
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movne r3, r0, lsr r3
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movne r0, r0, asl r2
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orrne r1, r3, r1, asl r2
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bx lr
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@ -1,28 +0,0 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroLib.h>
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ASM_FUNC(__ashrdi3)
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cmp r2, #31
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bls L2
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cmp r2, #63
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subls r2, r2, #32
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mov ip, r1, asr #31
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movls r2, r1, asr r2
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movhi r2, ip
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mov r0, r2
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mov r1, ip
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bx lr
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L2:
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cmp r2, #0
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rsbne r3, r2, #32
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movne r3, r1, asl r3
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movne r1, r1, asr r2
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orrne r0, r3, r0, lsr r2
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bx lr
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@ -1,49 +0,0 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroLib.h>
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ASM_FUNC(__clzsi2)
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@ frame_needed = 1, uses_anonymous_args = 0
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stmfd sp!, {r7, lr}
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add r7, sp, #0
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movs r3, r0, lsr #16
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movne r3, #16
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moveq r3, #0
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movne r9, #0
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moveq r9, #16
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mov r3, r0, lsr r3
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tst r3, #65280
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movne r0, #8
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moveq r0, #0
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movne lr, #0
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moveq lr, #8
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mov r3, r3, lsr r0
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tst r3, #240
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movne r0, #4
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moveq r0, #0
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movne ip, #0
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moveq ip, #4
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mov r3, r3, lsr r0
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tst r3, #12
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movne r0, #2
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moveq r0, #0
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movne r1, #0
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moveq r1, #2
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mov r2, r3, lsr r0
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add r3, lr, r9
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add r0, r3, ip
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add r1, r0, r1
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mov r0, r2, lsr #1
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eor r0, r0, #1
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ands r0, r0, #1
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mvnne r0, #0
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rsb r3, r2, #2
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and r0, r0, r3
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add r0, r1, r0
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ldmfd sp!, {r7, pc}
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@ -1,41 +0,0 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#include <AsmMacroLib.h>
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ASM_FUNC(__ctzsi2)
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uxth r3, r0
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cmp r3, #0
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moveq ip, #16
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movne ip, #0
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@ lr needed for prologue
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mov r0, r0, lsr ip
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tst r0, #255
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movne r3, #0
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moveq r3, #8
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mov r0, r0, lsr r3
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tst r0, #15
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movne r1, #0
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moveq r1, #4
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add r3, r3, ip
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mov r0, r0, lsr r1
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tst r0, #3
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movne r2, #0
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moveq r2, #2
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add r3, r3, r1
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mov r0, r0, lsr r2
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and r0, r0, #3
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add r2, r3, r2
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eor r3, r0, #1
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mov r0, r0, lsr #1
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ands r3, r3, #1
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mvnne r3, #0
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rsb r0, r0, #2
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and r0, r3, r0
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add r0, r2, r0
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bx lr
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@ -1,147 +0,0 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2011, ARM. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT(__aeabi_uidiv)
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GCC_ASM_EXPORT(__aeabi_uidivmod)
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GCC_ASM_EXPORT(__aeabi_idiv)
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GCC_ASM_EXPORT(__aeabi_idivmod)
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# AREA Math, CODE, READONLY
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#
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#UINT32
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#EFIAPI
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#__aeabi_uidivmode (
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# IN UINT32 Dividen
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# IN UINT32 Divisor
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# );
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#
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ASM_PFX(__aeabi_uidiv):
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ASM_PFX(__aeabi_uidivmod):
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rsbs r12, r1, r0, LSR #4
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mov r2, #0
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bcc ASM_PFX(__arm_div4)
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rsbs r12, r1, r0, LSR #8
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bcc ASM_PFX(__arm_div8)
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mov r3, #0
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b ASM_PFX(__arm_div_large)
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#
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#INT32
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#EFIAPI
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#__aeabi_idivmode (
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# IN INT32 Dividen
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# IN INT32 Divisor
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# );
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#
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ASM_PFX(__aeabi_idiv):
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ASM_PFX(__aeabi_idivmod):
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orrs r12, r0, r1
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bmi ASM_PFX(__arm_div_negative)
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rsbs r12, r1, r0, LSR #1
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mov r2, #0
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bcc ASM_PFX(__arm_div1)
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rsbs r12, r1, r0, LSR #4
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bcc ASM_PFX(__arm_div4)
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rsbs r12, r1, r0, LSR #8
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bcc ASM_PFX(__arm_div8)
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mov r3, #0
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b ASM_PFX(__arm_div_large)
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ASM_PFX(__arm_div8):
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rsbs r12, r1, r0, LSR #7
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subcs r0, r0, r1, LSL #7
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adc r2, r2, r2
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rsbs r12, r1, r0,LSR #6
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subcs r0, r0, r1, LSL #6
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #5
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subcs r0, r0, r1, LSL #5
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #4
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subcs r0, r0, r1, LSL #4
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adc r2, r2, r2
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ASM_PFX(__arm_div4):
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rsbs r12, r1, r0, LSR #3
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subcs r0, r0, r1, LSL #3
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #2
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subcs r0, r0, r1, LSL #2
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adcs r2, r2, r2
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rsbs r12, r1, r0, LSR #1
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subcs r0, r0, r1, LSL #1
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adc r2, r2, r2
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ASM_PFX(__arm_div1):
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subs r1, r0, r1
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movcc r1, r0
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adc r0, r2, r2
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bx r14
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ASM_PFX(__arm_div_negative):
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ands r2, r1, #0x80000000
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rsbmi r1, r1, #0
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eors r3, r2, r0, ASR #32
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rsbcs r0, r0, #0
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rsbs r12, r1, r0, LSR #4
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bcc label1
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rsbs r12, r1, r0, LSR #8
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bcc label2
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ASM_PFX(__arm_div_large):
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lsl r1, r1, #6
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rsbs r12, r1, r0, LSR #8
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orr r2, r2, #0xfc000000
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bcc label2
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lsl r1, r1, #6
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rsbs r12, r1, r0, LSR #8
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orr r2, r2, #0x3f00000
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bcc label2
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lsl r1, r1, #6
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rsbs r12, r1, r0, LSR #8
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orr r2, r2, #0xfc000
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orrcs r2, r2, #0x3f00
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lslcs r1, r1, #6
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rsbs r12, r1, #0
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bcs ASM_PFX(__aeabi_idiv0)
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label3:
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lsrcs r1, r1, #6
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label2:
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rsbs r12, r1, r0, LSR #7
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subcs r0, r0, r1, LSL #7
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #6
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subcs r0, r0, r1, LSL #6
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #5
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subcs r0, r0, r1, LSL #5
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #4
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subcs r0, r0, r1, LSL #4
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adc r2, r2, r2
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label1:
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rsbs r12, r1, r0, LSR #3
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subcs r0, r0, r1, LSL #3
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adc r2, r2, r2
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rsbs r12, r1, r0, LSR #2
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subcs r0, r0, r1, LSL #2
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adcs r2, r2, r2
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bcs label3
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rsbs r12, r1, r0, LSR #1
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subcs r0, r0, r1, LSL #1
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adc r2, r2, r2
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subs r1, r0, r1
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movcc r1, r0
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adc r0, r2, r2
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asrs r3, r3, #31
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rsbmi r0, r0, #0
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rsbcs r1, r1, #0
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bx r14
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@ What to do about division by zero? For now, just return.
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ASM_PFX(__aeabi_idiv0):
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bx r14
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@ -1,180 +0,0 @@
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//------------------------------------------------------------------------------
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//
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
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//
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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//------------------------------------------------------------------------------
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EXPORT __aeabi_uidiv
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EXPORT __aeabi_uidivmod
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EXPORT __aeabi_idiv
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EXPORT __aeabi_idivmod
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EXPORT __rt_udiv
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EXPORT __rt_sdiv
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AREA Math, CODE, READONLY
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;
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;UINT32
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;EFIAPI
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;__aeabi_uidivmod (
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; IN UINT32 Dividend
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; IN UINT32 Divisor
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; );
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;
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__aeabi_uidiv
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__aeabi_uidivmod
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RSBS r12, r1, r0, LSR #4
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MOV r2, #0
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BCC __arm_div4
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RSBS r12, r1, r0, LSR #8
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BCC __arm_div8
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MOV r3, #0
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B __arm_div_large
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;
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;UINT64
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;EFIAPI
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;__rt_udiv (
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; IN UINT32 Divisor,
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; IN UINT32 Dividend
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; );
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;
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__rt_udiv
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; Swap R0 and R1
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MOV r12, r0
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MOV r0, r1
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MOV r1, r12
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B __aeabi_uidivmod
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;
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;UINT64
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;EFIAPI
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;__rt_sdiv (
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; IN INT32 Divisor,
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; IN INT32 Dividend
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; );
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;
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__rt_sdiv
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; Swap R0 and R1
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MOV r12, r0
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MOV r0, r1
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MOV r1, r12
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B __aeabi_idivmod
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;
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;INT32
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;EFIAPI
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;__aeabi_idivmod (
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; IN INT32 Dividend
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; IN INT32 Divisor
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; );
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;
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__aeabi_idiv
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__aeabi_idivmod
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ORRS r12, r0, r1
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BMI __arm_div_negative
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RSBS r12, r1, r0, LSR #1
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MOV r2, #0
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BCC __arm_div1
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RSBS r12, r1, r0, LSR #4
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BCC __arm_div4
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RSBS r12, r1, r0, LSR #8
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BCC __arm_div8
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MOV r3, #0
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B __arm_div_large
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__arm_div8
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RSBS r12, r1, r0, LSR #7
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SUBCS r0, r0, r1, LSL #7
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ADC r2, r2, r2
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RSBS r12, r1, r0,LSR #6
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SUBCS r0, r0, r1, LSL #6
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #5
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SUBCS r0, r0, r1, LSL #5
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #4
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SUBCS r0, r0, r1, LSL #4
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ADC r2, r2, r2
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__arm_div4
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RSBS r12, r1, r0, LSR #3
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SUBCS r0, r0, r1, LSL #3
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #2
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SUBCS r0, r0, r1, LSL #2
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ADCS r2, r2, r2
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RSBS r12, r1, r0, LSR #1
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SUBCS r0, r0, r1, LSL #1
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ADC r2, r2, r2
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__arm_div1
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SUBS r1, r0, r1
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MOVCC r1, r0
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ADC r0, r2, r2
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BX r14
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__arm_div_negative
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ANDS r2, r1, #0x80000000
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RSBMI r1, r1, #0
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EORS r3, r2, r0, ASR #32
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RSBCS r0, r0, #0
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RSBS r12, r1, r0, LSR #4
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BCC label1
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RSBS r12, r1, r0, LSR #8
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BCC label2
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__arm_div_large
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LSL r1, r1, #6
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RSBS r12, r1, r0, LSR #8
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ORR r2, r2, #0xfc000000
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BCC label2
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LSL r1, r1, #6
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RSBS r12, r1, r0, LSR #8
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ORR r2, r2, #0x3f00000
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BCC label2
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LSL r1, r1, #6
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RSBS r12, r1, r0, LSR #8
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ORR r2, r2, #0xfc000
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ORRCS r2, r2, #0x3f00
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LSLCS r1, r1, #6
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RSBS r12, r1, #0
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BCS __aeabi_idiv0
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label3
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LSRCS r1, r1, #6
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label2
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RSBS r12, r1, r0, LSR #7
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SUBCS r0, r0, r1, LSL #7
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #6
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SUBCS r0, r0, r1, LSL #6
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #5
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SUBCS r0, r0, r1, LSL #5
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #4
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SUBCS r0, r0, r1, LSL #4
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ADC r2, r2, r2
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label1
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RSBS r12, r1, r0, LSR #3
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SUBCS r0, r0, r1, LSL #3
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ADC r2, r2, r2
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RSBS r12, r1, r0, LSR #2
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SUBCS r0, r0, r1, LSL #2
|
||||
ADCS r2, r2, r2
|
||||
BCS label3
|
||||
RSBS r12, r1, r0, LSR #1
|
||||
SUBCS r0, r0, r1, LSL #1
|
||||
ADC r2, r2, r2
|
||||
SUBS r1, r0, r1
|
||||
MOVCC r1, r0
|
||||
ADC r0, r2, r2
|
||||
ASRS r3, r3, #31
|
||||
RSBMI r0, r0, #0
|
||||
RSBCS r1, r1, #0
|
||||
BX r14
|
||||
|
||||
; What to do about division by zero? For now, just return.
|
||||
__aeabi_idiv0
|
||||
BX r14
|
||||
|
||||
END
|
||||
@ -1,41 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__divdi3)
|
||||
@ args = 0, pretend = 0, frame = 0
|
||||
@ frame_needed = 1, uses_anonymous_args = 0
|
||||
stmfd sp!, {r4, r5, r7, lr}
|
||||
mov r4, r3, asr #31
|
||||
add r7, sp, #8
|
||||
stmfd sp!, {r10, r11}
|
||||
mov r10, r1, asr #31
|
||||
sub sp, sp, #8
|
||||
mov r11, r10
|
||||
mov r5, r4
|
||||
eor r0, r0, r10
|
||||
eor r1, r1, r10
|
||||
eor r2, r2, r4
|
||||
eor r3, r3, r4
|
||||
subs r2, r2, r4
|
||||
sbc r3, r3, r5
|
||||
mov ip, #0
|
||||
subs r0, r0, r10
|
||||
sbc r1, r1, r11
|
||||
str ip, [sp, #0]
|
||||
bl ASM_PFX(__udivmoddi4)
|
||||
eor r2, r10, r4
|
||||
eor r3, r10, r4
|
||||
eor r0, r0, r2
|
||||
eor r1, r1, r3
|
||||
subs r0, r0, r2
|
||||
sbc r1, r1, r3
|
||||
sub sp, r7, #16
|
||||
ldmfd sp!, {r10, r11}
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
@ -1,24 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__divsi3)
|
||||
eor r3, r0, r0, asr #31
|
||||
eor r2, r1, r1, asr #31
|
||||
stmfd sp!, {r4, r5, r7, lr}
|
||||
mov r5, r0, asr #31
|
||||
add r7, sp, #8
|
||||
mov r4, r1, asr #31
|
||||
sub r0, r3, r0, asr #31
|
||||
sub r1, r2, r1, asr #31
|
||||
bl ASM_PFX(__udivsi3)
|
||||
eor r1, r5, r4
|
||||
eor r0, r0, r1
|
||||
rsb r0, r1, r0
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
@ -1,30 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
#
|
||||
#UINT64
|
||||
#EFIAPI
|
||||
#__aeabi_lasr (
|
||||
# IN UINT64 Value
|
||||
# IN UINT32 Shift
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_lasr)
|
||||
subs r3,r2,#0x20
|
||||
bpl L_Test
|
||||
rsb r3,r2,#0x20
|
||||
lsr r0,r0,r2
|
||||
orr r0,r0,r1,LSL r3
|
||||
asr r1,r1,r2
|
||||
bx lr
|
||||
L_Test:
|
||||
asr r0,r1,r3
|
||||
asr r1,r1,#31
|
||||
bx lr
|
||||
@ -1,50 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
//
|
||||
// A pair of (unsigned) long longs is returned in {{r0, r1}, {r2, r3}},
|
||||
// the quotient in {r0, r1}, and the remainder in {r2, r3}.
|
||||
//
|
||||
//__value_in_regs lldiv_t
|
||||
//EFIAPI
|
||||
//__aeabi_ldivmod (
|
||||
// IN UINT64 Dividen
|
||||
// IN UINT64 Divisor
|
||||
// )//
|
||||
//
|
||||
|
||||
ASM_FUNC(__aeabi_ldivmod)
|
||||
push {r4,lr}
|
||||
asrs r4,r1,#1
|
||||
eor r4,r4,r3,LSR #1
|
||||
bpl L_Test1
|
||||
rsbs r0,r0,#0
|
||||
rsc r1,r1,#0
|
||||
L_Test1:
|
||||
tst r3,r3
|
||||
bpl L_Test2
|
||||
rsbs r2,r2,#0
|
||||
rsc r3,r3,#0
|
||||
L_Test2:
|
||||
bl ASM_PFX(__aeabi_uldivmod)
|
||||
tst r4,#0x40000000
|
||||
beq L_Test3
|
||||
rsbs r0,r0,#0
|
||||
rsc r1,r1,#0
|
||||
L_Test3:
|
||||
tst r4,#0x80000000
|
||||
beq L_Exit
|
||||
rsbs r2,r2,#0
|
||||
rsc r3,r3,#0
|
||||
L_Exit:
|
||||
pop {r4,pc}
|
||||
|
||||
|
||||
|
||||
@ -1,71 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
IMPORT __aeabi_uldivmod
|
||||
EXPORT __aeabi_ldivmod
|
||||
EXPORT __rt_sdiv64
|
||||
|
||||
AREA s___aeabi_ldivmod, CODE, READONLY, ARM
|
||||
|
||||
ARM
|
||||
|
||||
;
|
||||
;INT64
|
||||
;EFIAPI
|
||||
;__rt_sdiv64 (
|
||||
; IN INT64 Divisor
|
||||
; IN INT64 Dividend
|
||||
; );
|
||||
;
|
||||
__rt_sdiv64
|
||||
; Swap r0-r1 and r2-r3
|
||||
MOV r12, r0
|
||||
MOV r0, r2
|
||||
MOV r2, r12
|
||||
MOV r12, r1
|
||||
MOV r1, r3
|
||||
MOV r3, r12
|
||||
B __aeabi_ldivmod
|
||||
|
||||
;
|
||||
;INT64
|
||||
;EFIAPI
|
||||
;__aeabi_ldivmod (
|
||||
; IN INT64 Dividend
|
||||
; IN INT64 Divisor
|
||||
; );
|
||||
;
|
||||
__aeabi_ldivmod
|
||||
PUSH {r4,lr}
|
||||
ASRS r4,r1,#1
|
||||
EOR r4,r4,r3,LSR #1
|
||||
BPL L_Test1
|
||||
RSBS r0,r0,#0
|
||||
RSC r1,r1,#0
|
||||
L_Test1
|
||||
TST r3,r3
|
||||
BPL L_Test2
|
||||
RSBS r2,r2,#0
|
||||
RSC r3,r3,#0
|
||||
L_Test2
|
||||
BL __aeabi_uldivmod
|
||||
TST r4,#0x40000000
|
||||
BEQ L_Test3
|
||||
RSBS r0,r0,#0
|
||||
RSC r1,r1,#0
|
||||
L_Test3
|
||||
TST r4,#0x80000000
|
||||
BEQ L_Exit
|
||||
RSBS r2,r2,#0
|
||||
RSC r3,r3,#0
|
||||
L_Exit
|
||||
POP {r4,pc}
|
||||
|
||||
END
|
||||
@ -1,31 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2013, ARM. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
#
|
||||
#VOID
|
||||
#EFIAPI
|
||||
#__aeabi_llsl (
|
||||
# IN VOID *Destination,
|
||||
# IN VOID *Source,
|
||||
# IN UINT32 Size
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_llsl)
|
||||
subs r3,r2,#0x20
|
||||
bpl 1f
|
||||
rsb r3,r2,#0x20
|
||||
lsl r1,r1,r2
|
||||
orr r1,r1,r0,lsr r3
|
||||
lsl r0,r0,r2
|
||||
bx lr
|
||||
1:
|
||||
lsl r1,r0,r3
|
||||
mov r0,#0
|
||||
bx lr
|
||||
@ -1,30 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2013, ARM. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
#VOID
|
||||
#EFIAPI
|
||||
#__aeabi_llsr (
|
||||
# IN VOID *Destination,
|
||||
# IN VOID *Source,
|
||||
# IN UINT32 Size
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_llsr)
|
||||
subs r3,r2,#0x20
|
||||
bpl 1f
|
||||
rsb r3,r2,#0x20
|
||||
lsr r0,r0,r2
|
||||
orr r0,r0,r1,lsl r3
|
||||
lsr r1,r1,r2
|
||||
bx lr
|
||||
1:
|
||||
lsr r0,r1,r3
|
||||
mov r1,#0
|
||||
bx lr
|
||||
@ -1,39 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
EXPORT __aeabi_llsr
|
||||
EXPORT __rt_srsh
|
||||
|
||||
AREA s___aeabi_llsr, CODE, READONLY, ARM
|
||||
|
||||
ARM
|
||||
|
||||
;
|
||||
;VOID
|
||||
;EFIAPI
|
||||
;__aeabi_llsr (
|
||||
; IN UINT64 Value,
|
||||
; IN UINT32 Shift
|
||||
;)
|
||||
;
|
||||
__aeabi_llsr
|
||||
__rt_srsh
|
||||
SUBS r3,r2,#0x20
|
||||
BPL __aeabi_llsr_label1
|
||||
RSB r3,r2,#0x20
|
||||
LSR r0,r0,r2
|
||||
ORR r0,r0,r1,LSL r3
|
||||
LSR r1,r1,r2
|
||||
BX lr
|
||||
__aeabi_llsr_label1
|
||||
LSR r0,r1,r3
|
||||
MOV r1,#0
|
||||
BX lr
|
||||
|
||||
END
|
||||
@ -1,27 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__lshrdi3)
|
||||
cmp r2, #31
|
||||
bls L2
|
||||
cmp r2, #63
|
||||
subls r2, r2, #32
|
||||
movls r2, r1, lsr r2
|
||||
movhi r2, #0
|
||||
mov r0, r2
|
||||
mov r1, #0
|
||||
bx lr
|
||||
L2:
|
||||
cmp r2, #0
|
||||
rsbne r3, r2, #32
|
||||
movne r3, r1, asl r3
|
||||
movne r1, r1, lsr r2
|
||||
orrne r0, r3, r0, lsr r2
|
||||
bx lr
|
||||
@ -1,40 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
# VOID
|
||||
# EFIAPI
|
||||
# memmove (
|
||||
# IN VOID *Destination,
|
||||
# IN CONST VOID *Source,
|
||||
# IN UINT32 Size
|
||||
# );
|
||||
ASM_FUNC(memmove)
|
||||
CMP r2, #0
|
||||
BXEQ lr
|
||||
CMP r0, r1
|
||||
BXEQ lr
|
||||
BHI memmove_backward
|
||||
|
||||
memmove_forward:
|
||||
LDRB r3, [r1], #1
|
||||
STRB r3, [r0], #1
|
||||
SUBS r2, r2, #1
|
||||
BXEQ lr
|
||||
B memmove_forward
|
||||
|
||||
memmove_backward:
|
||||
add r0, r2
|
||||
add r1, r2
|
||||
memmove_backward_loop:
|
||||
LDRB r3, [r1, #-1]!
|
||||
STRB r3, [r0, #-1]!
|
||||
SUBS r2, r2, #1
|
||||
BXEQ lr
|
||||
B memmove_backward_loop
|
||||
@ -1,38 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__moddi3)
|
||||
stmfd sp!, {r4, r5, r7, lr}
|
||||
mov r4, r1, asr #31
|
||||
add r7, sp, #8
|
||||
stmfd sp!, {r10, r11}
|
||||
mov r10, r3, asr #31
|
||||
sub sp, sp, #16
|
||||
mov r5, r4
|
||||
mov r11, r10
|
||||
eor r0, r0, r4
|
||||
eor r1, r1, r4
|
||||
eor r2, r2, r10
|
||||
eor r3, r3, r10
|
||||
add ip, sp, #8
|
||||
subs r0, r0, r4
|
||||
sbc r1, r1, r5
|
||||
subs r2, r2, r10
|
||||
sbc r3, r3, r11
|
||||
str ip, [sp, #0]
|
||||
bl ASM_PFX(__udivmoddi4)
|
||||
ldrd r0, [sp, #8]
|
||||
eor r0, r0, r4
|
||||
eor r1, r1, r4
|
||||
subs r0, r0, r4
|
||||
sbc r1, r1, r5
|
||||
sub sp, r7, #16
|
||||
ldmfd sp!, {r10, r11}
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
@ -1,19 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__modsi3)
|
||||
stmfd sp!, {r4, r5, r7, lr}
|
||||
add r7, sp, #8
|
||||
mov r5, r0
|
||||
mov r4, r1
|
||||
bl ASM_PFX(__divsi3)
|
||||
mul r0, r4, r0
|
||||
rsb r0, r0, r5
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
@ -1,50 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__muldi3)
|
||||
stmfd sp!, {r4, r5, r6, r7, lr}
|
||||
add r7, sp, #12
|
||||
stmfd sp!, {r8, r10, r11}
|
||||
ldr r11, L4
|
||||
mov r4, r0, lsr #16
|
||||
and r8, r0, r11
|
||||
and ip, r2, r11
|
||||
mul lr, ip, r8
|
||||
mul ip, r4, ip
|
||||
sub sp, sp, #8
|
||||
add r10, ip, lr, lsr #16
|
||||
and ip, r10, r11
|
||||
and lr, lr, r11
|
||||
mov r6, r2, lsr #16
|
||||
str r4, [sp, #4]
|
||||
add r4, lr, ip, asl #16
|
||||
mul ip, r8, r6
|
||||
mov r5, r10, lsr #16
|
||||
add r10, ip, r4, lsr #16
|
||||
and ip, r10, r11
|
||||
and lr, r4, r11
|
||||
add r4, lr, ip, asl #16
|
||||
mul r0, r3, r0
|
||||
add ip, r5, r10, lsr #16
|
||||
ldr r5, [sp, #4]
|
||||
mla r0, r2, r1, r0
|
||||
mla r5, r6, r5, ip
|
||||
mov r10, r4
|
||||
add r11, r0, r5
|
||||
mov r1, r11
|
||||
mov r0, r4
|
||||
sub sp, r7, #24
|
||||
ldmfd sp!, {r8, r10, r11}
|
||||
ldmfd sp!, {r4, r5, r6, r7, pc}
|
||||
.p2align 2
|
||||
L5:
|
||||
.align 2
|
||||
L4:
|
||||
.long 65535
|
||||
@ -1,38 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
.text
|
||||
|
||||
GCC_ASM_EXPORT(__ARM_ll_mullu)
|
||||
GCC_ASM_EXPORT(__aeabi_lmul)
|
||||
#
|
||||
#INT64
|
||||
#EFIAPI
|
||||
#__aeabi_lmul (
|
||||
# IN INT64 Multiplicand
|
||||
# IN INT32 Multiplier
|
||||
# );
|
||||
#
|
||||
ASM_PFX(__ARM_ll_mullu):
|
||||
mov r3, #0
|
||||
# Make upper part of INT64 Multiplier 0 and use __aeabi_lmul
|
||||
|
||||
#
|
||||
#INT64
|
||||
#EFIAPI
|
||||
#__aeabi_lmul (
|
||||
# IN INT64 Multiplicand
|
||||
# IN INT64 Multiplier
|
||||
# );
|
||||
#
|
||||
ASM_PFX(__aeabi_lmul):
|
||||
stmdb sp!, {lr}
|
||||
mov lr, r0
|
||||
umull r0, ip, r2, lr
|
||||
mla r1, r2, r1, ip
|
||||
mla r1, r3, lr, r1
|
||||
ldmia sp!, {pc}
|
||||
@ -1,49 +0,0 @@
|
||||
#------s------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
|
||||
.text
|
||||
.align 2
|
||||
GCC_ASM_EXPORT(__aeabi_ulcmp)
|
||||
|
||||
ASM_PFX(__aeabi_ulcmp):
|
||||
stmfd sp!, {r4, r5, r8}
|
||||
cmp r3, r1
|
||||
mov r8, r0
|
||||
mov r9, r1
|
||||
mov r4, r2
|
||||
mov r5, r3
|
||||
bls L16
|
||||
L2:
|
||||
mvn r0, #0
|
||||
L1:
|
||||
ldmfd sp!, {r4, r5, r8}
|
||||
bx lr
|
||||
L16:
|
||||
beq L17
|
||||
L4:
|
||||
cmp r9, r5
|
||||
bhi L7
|
||||
beq L18
|
||||
cmp r8, r4
|
||||
L14:
|
||||
cmpeq r9, r5
|
||||
moveq r0, #0
|
||||
beq L1
|
||||
b L1
|
||||
L18:
|
||||
cmp r8, r4
|
||||
bls L14
|
||||
L7:
|
||||
mov r0, #1
|
||||
b L1
|
||||
L17:
|
||||
cmp r2, r0
|
||||
bhi L2
|
||||
b L4
|
||||
|
||||
@ -1,24 +0,0 @@
|
||||
#/** @file
|
||||
# Compiler intrinsic for ARM compiler
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#**/
|
||||
#
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ASM_FUNC(__switch16)
|
||||
ldrh ip, [lr, #-1]
|
||||
cmp r0, ip
|
||||
add r0, lr, r0, lsl #1
|
||||
ldrshcc r0, [r0, #1]
|
||||
add ip, lr, ip, lsl #1
|
||||
ldrshcs r0, [ip, #1]
|
||||
add ip, lr, r0, lsl #1
|
||||
bx ip
|
||||
|
||||
|
||||
@ -1,23 +0,0 @@
|
||||
#/** @file
|
||||
# Compiler intrinsic for ARM compiler
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#**/
|
||||
#
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ASM_FUNC(__switch32)
|
||||
ldr ip, [lr, #-1]
|
||||
cmp r0, ip
|
||||
add r0, lr, r0, lsl #2
|
||||
ldrcc r0, [r0, #3]
|
||||
add ip, lr, ip, lsl #2
|
||||
ldrcs r0, [ip, #3]
|
||||
add ip, lr, r0
|
||||
bx ip
|
||||
|
||||
@ -1,21 +0,0 @@
|
||||
#/** @file
|
||||
# Compiler intrinsic for ARM compiler
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#**/
|
||||
#
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ASM_FUNC(__switch8)
|
||||
ldrb ip, [lr, #-1]
|
||||
cmp r0, ip
|
||||
ldrsbcc r0, [lr, r0]
|
||||
ldrsbcs r0, [lr, ip]
|
||||
add ip, lr, r0, lsl #1
|
||||
bx ip
|
||||
|
||||
@ -1,21 +0,0 @@
|
||||
#/** @file
|
||||
# Compiler intrinsic for ARM compiler
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#**/
|
||||
#
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ASM_FUNC(__switchu8)
|
||||
ldrb ip,[lr,#-1]
|
||||
cmp r0,ip
|
||||
ldrbcc r0,[lr,r0]
|
||||
ldrbcs r0,[lr,ip]
|
||||
add ip,lr,r0,LSL #1
|
||||
bx ip
|
||||
|
||||
@ -1,30 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__ucmpdi2)
|
||||
stmfd sp!, {r4, r5, r8, lr}
|
||||
cmp r1, r3
|
||||
mov r8, r0
|
||||
mov r4, r2
|
||||
mov r5, r3
|
||||
bcc L2
|
||||
bhi L4
|
||||
cmp r0, r2
|
||||
bcc L2
|
||||
movls r0, #1
|
||||
bls L8
|
||||
b L4
|
||||
L2:
|
||||
mov r0, #0
|
||||
b L8
|
||||
L4:
|
||||
mov r0, #2
|
||||
L8:
|
||||
ldmfd sp!, {r4, r5, r8, pc}
|
||||
@ -1,19 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__udivdi3)
|
||||
stmfd sp!, {r7, lr}
|
||||
add r7, sp, #0
|
||||
sub sp, sp, #8
|
||||
mov ip, #0
|
||||
str ip, [sp, #0]
|
||||
bl ASM_PFX(__udivmoddi4)
|
||||
sub sp, r7, #0
|
||||
ldmfd sp!, {r7, pc}
|
||||
@ -1,236 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ASM_FUNC(__udivmoddi4)
|
||||
stmfd sp!, {r4, r5, r6, r7, lr}
|
||||
add r7, sp, #12
|
||||
stmfd sp!, {r10, r11}
|
||||
sub sp, sp, #20
|
||||
stmia sp, {r2-r3}
|
||||
ldr r6, [sp, #48]
|
||||
orrs r2, r2, r3
|
||||
mov r10, r0
|
||||
mov r11, r1
|
||||
beq L2
|
||||
subs ip, r1, #0
|
||||
bne L4
|
||||
cmp r3, #0
|
||||
bne L6
|
||||
cmp r6, #0
|
||||
beq L8
|
||||
mov r1, r2
|
||||
bl ASM_PFX(__umodsi3)
|
||||
mov r1, #0
|
||||
stmia r6, {r0-r1}
|
||||
L8:
|
||||
ldr r1, [sp, #0]
|
||||
mov r0, r10
|
||||
b L45
|
||||
L6:
|
||||
cmp r6, #0
|
||||
movne r1, #0
|
||||
stmiane r6, {r0-r1}
|
||||
b L2
|
||||
L4:
|
||||
ldr r1, [sp, #0]
|
||||
cmp r1, #0
|
||||
bne L12
|
||||
ldr r2, [sp, #4]
|
||||
cmp r2, #0
|
||||
bne L14
|
||||
cmp r6, #0
|
||||
beq L16
|
||||
mov r1, r2
|
||||
mov r0, r11
|
||||
bl ASM_PFX(__umodsi3)
|
||||
mov r1, #0
|
||||
stmia r6, {r0-r1}
|
||||
L16:
|
||||
ldr r1, [sp, #4]
|
||||
mov r0, r11
|
||||
L45:
|
||||
bl ASM_PFX(__udivsi3)
|
||||
L46:
|
||||
mov r10, r0
|
||||
mov r11, #0
|
||||
b L10
|
||||
L14:
|
||||
subs r1, r0, #0
|
||||
bne L18
|
||||
cmp r6, #0
|
||||
beq L16
|
||||
ldr r1, [sp, #4]
|
||||
mov r0, r11
|
||||
bl ASM_PFX(__umodsi3)
|
||||
mov r4, r10
|
||||
mov r5, r0
|
||||
stmia r6, {r4-r5}
|
||||
b L16
|
||||
L18:
|
||||
sub r3, r2, #1
|
||||
tst r2, r3
|
||||
bne L22
|
||||
cmp r6, #0
|
||||
movne r4, r0
|
||||
andne r5, ip, r3
|
||||
stmiane r6, {r4-r5}
|
||||
L24:
|
||||
rsb r3, r2, #0
|
||||
and r3, r2, r3
|
||||
clz r3, r3
|
||||
rsb r3, r3, #31
|
||||
mov r0, ip, lsr r3
|
||||
b L46
|
||||
L22:
|
||||
clz r2, r2
|
||||
clz r3, ip
|
||||
rsb r3, r3, r2
|
||||
cmp r3, #30
|
||||
bhi L48
|
||||
rsb r2, r3, #31
|
||||
add lr, r3, #1
|
||||
mov r3, r1, asl r2
|
||||
str r3, [sp, #12]
|
||||
mov r3, r1, lsr lr
|
||||
ldr r0, [sp, #0]
|
||||
mov r5, ip, lsr lr
|
||||
orr r4, r3, ip, asl r2
|
||||
str r0, [sp, #8]
|
||||
b L29
|
||||
L12:
|
||||
ldr r3, [sp, #4]
|
||||
cmp r3, #0
|
||||
bne L30
|
||||
sub r3, r1, #1
|
||||
tst r1, r3
|
||||
bne L32
|
||||
cmp r6, #0
|
||||
andne r3, r3, r0
|
||||
movne r2, r3
|
||||
movne r3, #0
|
||||
stmiane r6, {r2-r3}
|
||||
L34:
|
||||
cmp r1, #1
|
||||
beq L10
|
||||
rsb r3, r1, #0
|
||||
and r3, r1, r3
|
||||
clz r3, r3
|
||||
rsb r0, r3, #31
|
||||
mov r1, ip, lsr r0
|
||||
rsb r3, r0, #32
|
||||
mov r0, r10, lsr r0
|
||||
orr ip, r0, ip, asl r3
|
||||
str r1, [sp, #12]
|
||||
str ip, [sp, #8]
|
||||
ldrd r10, [sp, #8]
|
||||
b L10
|
||||
L32:
|
||||
clz r2, r1
|
||||
clz r3, ip
|
||||
rsb r3, r3, r2
|
||||
rsb r4, r3, #31
|
||||
mov r2, r0, asl r4
|
||||
mvn r1, r3
|
||||
and r2, r2, r1, asr #31
|
||||
add lr, r3, #33
|
||||
str r2, [sp, #8]
|
||||
add r2, r3, #1
|
||||
mov r3, r3, asr #31
|
||||
and r0, r3, r0, asl r1
|
||||
mov r3, r10, lsr r2
|
||||
orr r3, r3, ip, asl r4
|
||||
and r3, r3, r1, asr #31
|
||||
orr r0, r0, r3
|
||||
mov r3, ip, lsr lr
|
||||
str r0, [sp, #12]
|
||||
mov r0, r10, lsr lr
|
||||
and r5, r3, r2, asr #31
|
||||
rsb r3, lr, #31
|
||||
mov r3, r3, asr #31
|
||||
orr r0, r0, ip, asl r1
|
||||
and r3, r3, ip, lsr r2
|
||||
and r0, r0, r2, asr #31
|
||||
orr r4, r3, r0
|
||||
b L29
|
||||
L30:
|
||||
clz r2, r3
|
||||
clz r3, ip
|
||||
rsb r3, r3, r2
|
||||
cmp r3, #31
|
||||
bls L37
|
||||
L48:
|
||||
cmp r6, #0
|
||||
stmiane r6, {r10-r11}
|
||||
b L2
|
||||
L37:
|
||||
rsb r1, r3, #31
|
||||
mov r0, r0, asl r1
|
||||
add lr, r3, #1
|
||||
mov r2, #0
|
||||
str r0, [sp, #12]
|
||||
mov r0, r10, lsr lr
|
||||
str r2, [sp, #8]
|
||||
sub r2, r3, #31
|
||||
and r0, r0, r2, asr #31
|
||||
mov r3, ip, lsr lr
|
||||
orr r4, r0, ip, asl r1
|
||||
and r5, r3, r2, asr #31
|
||||
L29:
|
||||
mov ip, #0
|
||||
mov r10, ip
|
||||
b L40
|
||||
L41:
|
||||
ldr r1, [sp, #12]
|
||||
ldr r2, [sp, #8]
|
||||
mov r3, r4, lsr #31
|
||||
orr r5, r3, r5, asl #1
|
||||
mov r3, r1, lsr #31
|
||||
orr r4, r3, r4, asl #1
|
||||
mov r3, r2, lsr #31
|
||||
orr r0, r3, r1, asl #1
|
||||
orr r1, ip, r2, asl #1
|
||||
ldmia sp, {r2-r3}
|
||||
str r0, [sp, #12]
|
||||
subs r2, r2, r4
|
||||
sbc r3, r3, r5
|
||||
str r1, [sp, #8]
|
||||
subs r0, r2, #1
|
||||
sbc r1, r3, #0
|
||||
mov r2, r1, asr #31
|
||||
ldmia sp, {r0-r1}
|
||||
mov r3, r2
|
||||
and ip, r2, #1
|
||||
and r3, r3, r1
|
||||
and r2, r2, r0
|
||||
subs r4, r4, r2
|
||||
sbc r5, r5, r3
|
||||
add r10, r10, #1
|
||||
L40:
|
||||
cmp r10, lr
|
||||
bne L41
|
||||
ldrd r0, [sp, #8]
|
||||
adds r0, r0, r0
|
||||
adc r1, r1, r1
|
||||
cmp r6, #0
|
||||
orr r10, r0, ip
|
||||
mov r11, r1
|
||||
stmiane r6, {r4-r5}
|
||||
b L10
|
||||
L2:
|
||||
mov r10, #0
|
||||
mov r11, #0
|
||||
L10:
|
||||
mov r0, r10
|
||||
mov r1, r11
|
||||
sub sp, r7, #20
|
||||
ldmfd sp!, {r10, r11}
|
||||
ldmfd sp!, {r4, r5, r6, r7, pc}
|
||||
@ -1,51 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
.syntax unified
|
||||
|
||||
ASM_FUNC(__udivsi3)
|
||||
cmp r1, #0
|
||||
cmpne r0, #0
|
||||
stmfd sp!, {r4, r5, r7, lr}
|
||||
add r7, sp, #8
|
||||
beq L2
|
||||
clz r2, r1
|
||||
clz r3, r0
|
||||
rsb r3, r3, r2
|
||||
cmp r3, #31
|
||||
bhi L2
|
||||
ldmfdeq sp!, {r4, r5, r7, pc}
|
||||
add r5, r3, #1
|
||||
rsb r3, r3, #31
|
||||
mov lr, #0
|
||||
mov r2, r0, asl r3
|
||||
mov ip, r0, lsr r5
|
||||
mov r4, lr
|
||||
b L8
|
||||
L9:
|
||||
mov r0, r2, lsr #31
|
||||
orr ip, r0, ip, asl #1
|
||||
orr r2, r3, lr
|
||||
rsb r3, ip, r1
|
||||
sub r3, r3, #1
|
||||
and r0, r1, r3, asr #31
|
||||
mov lr, r3, lsr #31
|
||||
rsb ip, r0, ip
|
||||
add r4, r4, #1
|
||||
L8:
|
||||
cmp r4, r5
|
||||
mov r3, r2, asl #1
|
||||
bne L9
|
||||
orr r0, r3, lr
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
L2:
|
||||
mov r0, #0
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
|
||||
@ -1,261 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
|
||||
.text
|
||||
.align 2
|
||||
GCC_ASM_EXPORT(__aeabi_uldivmod)
|
||||
|
||||
//
|
||||
//UINT64
|
||||
//EFIAPI
|
||||
//__aeabi_uldivmod (
|
||||
// IN UINT64 Dividend
|
||||
// IN UINT64 Divisor
|
||||
// )
|
||||
//
|
||||
ASM_PFX(__aeabi_uldivmod):
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r4, r1
|
||||
mov r5, r0
|
||||
mov r6, #0 // 0x0
|
||||
orrs ip, r3, r2, lsr #31
|
||||
bne ASM_PFX(__aeabi_uldivmod_label1)
|
||||
tst r2, r2
|
||||
beq ASM_PFX(_ll_div0)
|
||||
movs ip, r2, lsr #15
|
||||
addeq r6, r6, #16 // 0x10
|
||||
mov ip, r2, lsl r6
|
||||
movs lr, ip, lsr #23
|
||||
moveq ip, ip, lsl #8
|
||||
addeq r6, r6, #8 // 0x8
|
||||
movs lr, ip, lsr #27
|
||||
moveq ip, ip, lsl #4
|
||||
addeq r6, r6, #4 // 0x4
|
||||
movs lr, ip, lsr #29
|
||||
moveq ip, ip, lsl #2
|
||||
addeq r6, r6, #2 // 0x2
|
||||
movs lr, ip, lsr #30
|
||||
moveq ip, ip, lsl #1
|
||||
addeq r6, r6, #1 // 0x1
|
||||
b ASM_PFX(_ll_udiv_small)
|
||||
ASM_PFX(__aeabi_uldivmod_label1):
|
||||
tst r3, #-2147483648 // 0x80000000
|
||||
bne ASM_PFX(__aeabi_uldivmod_label2)
|
||||
movs ip, r3, lsr #15
|
||||
addeq r6, r6, #16 // 0x10
|
||||
mov ip, r3, lsl r6
|
||||
movs lr, ip, lsr #23
|
||||
moveq ip, ip, lsl #8
|
||||
addeq r6, r6, #8 // 0x8
|
||||
movs lr, ip, lsr #27
|
||||
moveq ip, ip, lsl #4
|
||||
addeq r6, r6, #4 // 0x4
|
||||
movs lr, ip, lsr #29
|
||||
moveq ip, ip, lsl #2
|
||||
addeq r6, r6, #2 // 0x2
|
||||
movs lr, ip, lsr #30
|
||||
addeq r6, r6, #1 // 0x1
|
||||
rsb r3, r6, #32 // 0x20
|
||||
moveq ip, ip, lsl #1
|
||||
orr ip, ip, r2, lsr r3
|
||||
mov lr, r2, lsl r6
|
||||
b ASM_PFX(_ll_udiv_big)
|
||||
ASM_PFX(__aeabi_uldivmod_label2):
|
||||
mov ip, r3
|
||||
mov lr, r2
|
||||
b ASM_PFX(_ll_udiv_ginormous)
|
||||
|
||||
ASM_PFX(_ll_udiv_small):
|
||||
cmp r4, ip, lsl #1
|
||||
mov r3, #0 // 0x0
|
||||
subcs r4, r4, ip, lsl #1
|
||||
addcs r3, r3, #2 // 0x2
|
||||
cmp r4, ip
|
||||
subcs r4, r4, ip
|
||||
adcs r3, r3, #0 // 0x0
|
||||
add r2, r6, #32 // 0x20
|
||||
cmp r2, #32 // 0x20
|
||||
rsb ip, ip, #0 // 0x0
|
||||
bcc ASM_PFX(_ll_udiv_small_label1)
|
||||
orrs r0, r4, r5, lsr #30
|
||||
moveq r4, r5
|
||||
moveq r5, #0 // 0x0
|
||||
subeq r2, r2, #32 // 0x20
|
||||
ASM_PFX(_ll_udiv_small_label1):
|
||||
mov r1, #0 // 0x0
|
||||
cmp r2, #16 // 0x10
|
||||
bcc ASM_PFX(_ll_udiv_small_label2)
|
||||
movs r0, r4, lsr #14
|
||||
moveq r4, r4, lsl #16
|
||||
addeq r1, r1, #16 // 0x10
|
||||
ASM_PFX(_ll_udiv_small_label2):
|
||||
sub lr, r2, r1
|
||||
cmp lr, #8 // 0x8
|
||||
bcc ASM_PFX(_ll_udiv_small_label3)
|
||||
movs r0, r4, lsr #22
|
||||
moveq r4, r4, lsl #8
|
||||
addeq r1, r1, #8 // 0x8
|
||||
ASM_PFX(_ll_udiv_small_label3):
|
||||
rsb r0, r1, #32 // 0x20
|
||||
sub r2, r2, r1
|
||||
orr r4, r4, r5, lsr r0
|
||||
mov r5, r5, lsl r1
|
||||
cmp r2, #1 // 0x1
|
||||
bcc ASM_PFX(_ll_udiv_small_label5)
|
||||
sub r2, r2, #1 // 0x1
|
||||
and r0, r2, #7 // 0x7
|
||||
eor r0, r0, #7 // 0x7
|
||||
adds r0, r0, r0, lsl #1
|
||||
add pc, pc, r0, lsl #2
|
||||
nop // (mov r0,r0)
|
||||
ASM_PFX(_ll_udiv_small_label4):
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
sub r2, r2, #8 // 0x8
|
||||
tst r2, r2
|
||||
rsbcc r4, ip, r4
|
||||
bpl ASM_PFX(_ll_udiv_small_label4)
|
||||
ASM_PFX(_ll_udiv_small_label5):
|
||||
mov r2, r4, lsr r6
|
||||
bic r4, r4, r2, lsl r6
|
||||
adcs r0, r5, r5
|
||||
adc r1, r4, r4
|
||||
add r1, r1, r3, lsl r6
|
||||
mov r3, #0 // 0x0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
|
||||
ASM_PFX(_ll_udiv_big):
|
||||
subs r0, r5, lr
|
||||
mov r3, #0 // 0x0
|
||||
sbcs r1, r4, ip
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r3, r3, #0 // 0x0
|
||||
subs r0, r5, lr
|
||||
sbcs r1, r4, ip
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r3, r3, #0 // 0x0
|
||||
subs r0, r5, lr
|
||||
sbcs r1, r4, ip
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r3, r3, #0 // 0x0
|
||||
mov r1, #0 // 0x0
|
||||
rsbs lr, lr, #0 // 0x0
|
||||
rsc ip, ip, #0 // 0x0
|
||||
cmp r6, #16 // 0x10
|
||||
bcc ASM_PFX(_ll_udiv_big_label1)
|
||||
movs r0, r4, lsr #14
|
||||
moveq r4, r4, lsl #16
|
||||
addeq r1, r1, #16 // 0x10
|
||||
ASM_PFX(_ll_udiv_big_label1):
|
||||
sub r2, r6, r1
|
||||
cmp r2, #8 // 0x8
|
||||
bcc ASM_PFX(_ll_udiv_big_label2)
|
||||
movs r0, r4, lsr #22
|
||||
moveq r4, r4, lsl #8
|
||||
addeq r1, r1, #8 // 0x8
|
||||
ASM_PFX(_ll_udiv_big_label2):
|
||||
rsb r0, r1, #32 // 0x20
|
||||
sub r2, r6, r1
|
||||
orr r4, r4, r5, lsr r0
|
||||
mov r5, r5, lsl r1
|
||||
cmp r2, #1 // 0x1
|
||||
bcc ASM_PFX(_ll_udiv_big_label4)
|
||||
sub r2, r2, #1 // 0x1
|
||||
and r0, r2, #3 // 0x3
|
||||
rsb r0, r0, #3 // 0x3
|
||||
adds r0, r0, r0, lsl #1
|
||||
add pc, pc, r0, lsl #3
|
||||
nop // (mov r0,r0)
|
||||
ASM_PFX(_ll_udiv_big_label3):
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
sub r2, r2, #4 // 0x4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
tst r2, r2
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
bpl ASM_PFX(_ll_udiv_big_label3)
|
||||
ASM_PFX(_ll_udiv_big_label4):
|
||||
mov r1, #0 // 0x0
|
||||
mov r2, r5, lsr r6
|
||||
bic r5, r5, r2, lsl r6
|
||||
adcs r0, r5, r5
|
||||
adc r1, r1, #0 // 0x0
|
||||
movs lr, r3, lsl r6
|
||||
mov r3, r4, lsr r6
|
||||
bic r4, r4, r3, lsl r6
|
||||
adc r1, r1, #0 // 0x0
|
||||
adds r0, r0, lr
|
||||
orr r2, r2, r4, ror r6
|
||||
adc r1, r1, #0 // 0x0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
|
||||
ASM_PFX(_ll_udiv_ginormous):
|
||||
subs r2, r5, lr
|
||||
mov r1, #0 // 0x0
|
||||
sbcs r3, r4, ip
|
||||
adc r0, r1, r1
|
||||
movcc r2, r5
|
||||
movcc r3, r4
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
|
||||
ASM_PFX(_ll_div0):
|
||||
ldmia sp!, {r4, r5, r6, lr}
|
||||
mov r0, #0 // 0x0
|
||||
mov r1, #0 // 0x0
|
||||
b ASM_PFX(__aeabi_ldiv0)
|
||||
|
||||
ASM_PFX(__aeabi_ldiv0):
|
||||
bx r14
|
||||
|
||||
|
||||
@ -1,282 +0,0 @@
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
// Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
EXPORT __aeabi_uldivmod
|
||||
EXPORT __rt_udiv64
|
||||
|
||||
AREA s___aeabi_uldivmod, CODE, READONLY, ARM
|
||||
|
||||
ARM
|
||||
|
||||
;
|
||||
;UINT64
|
||||
;EFIAPI
|
||||
;__rt_udiv64 (
|
||||
; IN UINT64 Divisor
|
||||
; IN UINT64 Dividend
|
||||
; )
|
||||
;
|
||||
__rt_udiv64
|
||||
; Swap r0-r1 and r2-r3
|
||||
mov r12, r0
|
||||
mov r0, r2
|
||||
mov r2, r12
|
||||
mov r12, r1
|
||||
mov r1, r3
|
||||
mov r3, r12
|
||||
b __aeabi_uldivmod
|
||||
|
||||
;
|
||||
;UINT64
|
||||
;EFIAPI
|
||||
;__aeabi_uldivmod (
|
||||
; IN UINT64 Dividend
|
||||
; IN UINT64 Divisor
|
||||
; )
|
||||
;
|
||||
__aeabi_uldivmod
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r4, r1
|
||||
mov r5, r0
|
||||
mov r6, #0 ; 0x0
|
||||
orrs ip, r3, r2, lsr #31
|
||||
bne __aeabi_uldivmod_label1
|
||||
tst r2, r2
|
||||
beq _ll_div0
|
||||
movs ip, r2, lsr #15
|
||||
addeq r6, r6, #16 ; 0x10
|
||||
mov ip, r2, lsl r6
|
||||
movs lr, ip, lsr #23
|
||||
moveq ip, ip, lsl #8
|
||||
addeq r6, r6, #8 ; 0x8
|
||||
movs lr, ip, lsr #27
|
||||
moveq ip, ip, lsl #4
|
||||
addeq r6, r6, #4 ; 0x4
|
||||
movs lr, ip, lsr #29
|
||||
moveq ip, ip, lsl #2
|
||||
addeq r6, r6, #2 ; 0x2
|
||||
movs lr, ip, lsr #30
|
||||
moveq ip, ip, lsl #1
|
||||
addeq r6, r6, #1 ; 0x1
|
||||
b _ll_udiv_small
|
||||
__aeabi_uldivmod_label1
|
||||
tst r3, #-2147483648 ; 0x80000000
|
||||
bne __aeabi_uldivmod_label2
|
||||
movs ip, r3, lsr #15
|
||||
addeq r6, r6, #16 ; 0x10
|
||||
mov ip, r3, lsl r6
|
||||
movs lr, ip, lsr #23
|
||||
moveq ip, ip, lsl #8
|
||||
addeq r6, r6, #8 ; 0x8
|
||||
movs lr, ip, lsr #27
|
||||
moveq ip, ip, lsl #4
|
||||
addeq r6, r6, #4 ; 0x4
|
||||
movs lr, ip, lsr #29
|
||||
moveq ip, ip, lsl #2
|
||||
addeq r6, r6, #2 ; 0x2
|
||||
movs lr, ip, lsr #30
|
||||
addeq r6, r6, #1 ; 0x1
|
||||
rsb r3, r6, #32 ; 0x20
|
||||
moveq ip, ip, lsl #1
|
||||
orr ip, ip, r2, lsr r3
|
||||
mov lr, r2, lsl r6
|
||||
b _ll_udiv_big
|
||||
__aeabi_uldivmod_label2
|
||||
mov ip, r3
|
||||
mov lr, r2
|
||||
b _ll_udiv_ginormous
|
||||
|
||||
_ll_udiv_small
|
||||
cmp r4, ip, lsl #1
|
||||
mov r3, #0 ; 0x0
|
||||
subcs r4, r4, ip, lsl #1
|
||||
addcs r3, r3, #2 ; 0x2
|
||||
cmp r4, ip
|
||||
subcs r4, r4, ip
|
||||
adcs r3, r3, #0 ; 0x0
|
||||
add r2, r6, #32 ; 0x20
|
||||
cmp r2, #32 ; 0x20
|
||||
rsb ip, ip, #0 ; 0x0
|
||||
bcc _ll_udiv_small_label1
|
||||
orrs r0, r4, r5, lsr #30
|
||||
moveq r4, r5
|
||||
moveq r5, #0 ; 0x0
|
||||
subeq r2, r2, #32 ; 0x20
|
||||
_ll_udiv_small_label1
|
||||
mov r1, #0 ; 0x0
|
||||
cmp r2, #16 ; 0x10
|
||||
bcc _ll_udiv_small_label2
|
||||
movs r0, r4, lsr #14
|
||||
moveq r4, r4, lsl #16
|
||||
addeq r1, r1, #16 ; 0x10
|
||||
_ll_udiv_small_label2
|
||||
sub lr, r2, r1
|
||||
cmp lr, #8 ; 0x8
|
||||
bcc _ll_udiv_small_label3
|
||||
movs r0, r4, lsr #22
|
||||
moveq r4, r4, lsl #8
|
||||
addeq r1, r1, #8 ; 0x8
|
||||
_ll_udiv_small_label3
|
||||
rsb r0, r1, #32 ; 0x20
|
||||
sub r2, r2, r1
|
||||
orr r4, r4, r5, lsr r0
|
||||
mov r5, r5, lsl r1
|
||||
cmp r2, #1 ; 0x1
|
||||
bcc _ll_udiv_small_label5
|
||||
sub r2, r2, #1 ; 0x1
|
||||
and r0, r2, #7 ; 0x7
|
||||
eor r0, r0, #7 ; 0x7
|
||||
adds r0, r0, r0, lsl #1
|
||||
add pc, pc, r0, lsl #2
|
||||
nop ; (mov r0,r0)
|
||||
_ll_udiv_small_label4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
rsbcc r4, ip, r4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, ip, r4, lsl #1
|
||||
sub r2, r2, #8 ; 0x8
|
||||
tst r2, r2
|
||||
rsbcc r4, ip, r4
|
||||
bpl _ll_udiv_small_label4
|
||||
_ll_udiv_small_label5
|
||||
mov r2, r4, lsr r6
|
||||
bic r4, r4, r2, lsl r6
|
||||
adcs r0, r5, r5
|
||||
adc r1, r4, r4
|
||||
add r1, r1, r3, lsl r6
|
||||
mov r3, #0 ; 0x0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
|
||||
_ll_udiv_big
|
||||
subs r0, r5, lr
|
||||
mov r3, #0 ; 0x0
|
||||
sbcs r1, r4, ip
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r3, r3, #0 ; 0x0
|
||||
subs r0, r5, lr
|
||||
sbcs r1, r4, ip
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r3, r3, #0 ; 0x0
|
||||
subs r0, r5, lr
|
||||
sbcs r1, r4, ip
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r3, r3, #0 ; 0x0
|
||||
mov r1, #0 ; 0x0
|
||||
rsbs lr, lr, #0 ; 0x0
|
||||
rsc ip, ip, #0 ; 0x0
|
||||
cmp r6, #16 ; 0x10
|
||||
bcc _ll_udiv_big_label1
|
||||
movs r0, r4, lsr #14
|
||||
moveq r4, r4, lsl #16
|
||||
addeq r1, r1, #16 ; 0x10
|
||||
_ll_udiv_big_label1
|
||||
sub r2, r6, r1
|
||||
cmp r2, #8 ; 0x8
|
||||
bcc _ll_udiv_big_label2
|
||||
movs r0, r4, lsr #22
|
||||
moveq r4, r4, lsl #8
|
||||
addeq r1, r1, #8 ; 0x8
|
||||
_ll_udiv_big_label2
|
||||
rsb r0, r1, #32 ; 0x20
|
||||
sub r2, r6, r1
|
||||
orr r4, r4, r5, lsr r0
|
||||
mov r5, r5, lsl r1
|
||||
cmp r2, #1 ; 0x1
|
||||
bcc _ll_udiv_big_label4
|
||||
sub r2, r2, #1 ; 0x1
|
||||
and r0, r2, #3 ; 0x3
|
||||
rsb r0, r0, #3 ; 0x3
|
||||
adds r0, r0, r0, lsl #1
|
||||
add pc, pc, r0, lsl #3
|
||||
nop ; (mov r0,r0)
|
||||
_ll_udiv_big_label3
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
sub r2, r2, #4 ; 0x4
|
||||
adcs r5, r5, r5
|
||||
adcs r4, r4, r4
|
||||
adcs r0, lr, r5
|
||||
adcs r1, ip, r4
|
||||
tst r2, r2
|
||||
movcs r5, r0
|
||||
movcs r4, r1
|
||||
bpl _ll_udiv_big_label3
|
||||
_ll_udiv_big_label4
|
||||
mov r1, #0 ; 0x0
|
||||
mov r2, r5, lsr r6
|
||||
bic r5, r5, r2, lsl r6
|
||||
adcs r0, r5, r5
|
||||
adc r1, r1, #0 ; 0x0
|
||||
movs lr, r3, lsl r6
|
||||
mov r3, r4, lsr r6
|
||||
bic r4, r4, r3, lsl r6
|
||||
adc r1, r1, #0 ; 0x0
|
||||
adds r0, r0, lr
|
||||
orr r2, r2, r4, ror r6
|
||||
adc r1, r1, #0 ; 0x0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
|
||||
_ll_udiv_ginormous
|
||||
subs r2, r5, lr
|
||||
mov r1, #0 ; 0x0
|
||||
sbcs r3, r4, ip
|
||||
adc r0, r1, r1
|
||||
movcc r2, r5
|
||||
movcc r3, r4
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
|
||||
_ll_div0
|
||||
ldmia sp!, {r4, r5, r6, lr}
|
||||
mov r0, #0 ; 0x0
|
||||
mov r1, #0 ; 0x0
|
||||
b __aeabi_ldiv0
|
||||
|
||||
__aeabi_ldiv0
|
||||
bx r14
|
||||
|
||||
END
|
||||
@ -1,21 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__umoddi3)
|
||||
stmfd sp!, {r7, lr}
|
||||
add r7, sp, #0
|
||||
sub sp, sp, #16
|
||||
add ip, sp, #8
|
||||
str ip, [sp, #0]
|
||||
bl ASM_PFX(__udivmoddi4)
|
||||
ldrd r0, [sp, #8]
|
||||
sub sp, r7, #0
|
||||
ldmfd sp!, {r7, pc}
|
||||
|
||||
@ -1,20 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
ASM_FUNC(__umodsi3)
|
||||
stmfd sp!, {r4, r5, r7, lr}
|
||||
add r7, sp, #8
|
||||
mov r5, r0
|
||||
mov r4, r1
|
||||
bl ASM_PFX(__udivsi3)
|
||||
mul r0, r4, r0
|
||||
rsb r0, r0, r5
|
||||
ldmfd sp!, {r4, r5, r7, pc}
|
||||
|
||||
@ -1,54 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
#
|
||||
#UINT32
|
||||
#EFIAPI
|
||||
#__aeabi_uread4 (
|
||||
# IN VOID *Pointer
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_uread4)
|
||||
ldrb r1, [r0]
|
||||
ldrb r2, [r0, #1]
|
||||
ldrb r3, [r0, #2]
|
||||
ldrb r0, [r0, #3]
|
||||
orr r1, r1, r2, lsl #8
|
||||
orr r1, r1, r3, lsl #16
|
||||
orr r0, r1, r0, lsl #24
|
||||
bx lr
|
||||
|
||||
#
|
||||
#UINT64
|
||||
#EFIAPI
|
||||
#__aeabi_uread8 (
|
||||
# IN VOID *Pointer
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_uread8)
|
||||
mov r3, r0
|
||||
|
||||
ldrb r1, [r3]
|
||||
ldrb r2, [r3, #1]
|
||||
orr r1, r1, r2, lsl #8
|
||||
ldrb r2, [r3, #2]
|
||||
orr r1, r1, r2, lsl #16
|
||||
ldrb r0, [r3, #3]
|
||||
orr r0, r1, r0, lsl #24
|
||||
|
||||
ldrb r1, [r3, #4]
|
||||
ldrb r2, [r3, #5]
|
||||
orr r1, r1, r2, lsl #8
|
||||
ldrb r2, [r3, #6]
|
||||
orr r1, r1, r2, lsl #16
|
||||
ldrb r2, [r3, #7]
|
||||
orr r1, r1, r2, lsl #24
|
||||
|
||||
bx lr
|
||||
@ -1,53 +0,0 @@
|
||||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
#include <AsmMacroLib.h>
|
||||
|
||||
#
|
||||
#UINT32
|
||||
#EFIAPI
|
||||
#__aeabi_uwrite4 (
|
||||
# IN UINT32 Data,
|
||||
# IN VOID *Pointer
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_uwrite4)
|
||||
mov r2, r0, lsr #8
|
||||
strb r0, [r1]
|
||||
strb r2, [r1, #1]
|
||||
mov r2, r0, lsr #16
|
||||
strb r2, [r1, #2]
|
||||
mov r2, r0, lsr #24
|
||||
strb r2, [r1, #3]
|
||||
bx lr
|
||||
|
||||
#
|
||||
#UINT64
|
||||
#EFIAPI
|
||||
#__aeabi_uwrite8 (
|
||||
# IN UINT64 Data,
|
||||
# IN VOID *Pointer
|
||||
# );
|
||||
#
|
||||
ASM_FUNC(__aeabi_uwrite8)
|
||||
mov r3, r0, lsr #8
|
||||
strb r0, [r2]
|
||||
strb r3, [r2, #1]
|
||||
mov r3, r0, lsr #16
|
||||
strb r3, [r2, #2]
|
||||
mov r3, r0, lsr #24
|
||||
strb r3, [r2, #3]
|
||||
|
||||
mov r3, r1, lsr #8
|
||||
strb r1, [r2, #4]
|
||||
strb r3, [r2, #5]
|
||||
mov r3, r1, lsr #16
|
||||
strb r3, [r2, #6]
|
||||
mov r3, r1, lsr #24
|
||||
strb r3, [r2, #7]
|
||||
bx lr
|
||||
@ -26,44 +26,6 @@
|
||||
memcmp_ms.c | MSFT
|
||||
memmove_ms.c | MSFT
|
||||
|
||||
[Sources.ARM]
|
||||
Arm/ashrdi3.S | GCC
|
||||
Arm/ashldi3.S | GCC
|
||||
Arm/div.S | GCC
|
||||
Arm/divdi3.S | GCC
|
||||
Arm/divsi3.S | GCC
|
||||
Arm/lshrdi3.S | GCC
|
||||
Arm/memmove.S | GCC
|
||||
Arm/modsi3.S | GCC
|
||||
Arm/moddi3.S | GCC
|
||||
Arm/muldi3.S | GCC
|
||||
Arm/mullu.S | GCC
|
||||
Arm/udivsi3.S | GCC
|
||||
Arm/umodsi3.S | GCC
|
||||
Arm/udivdi3.S | GCC
|
||||
Arm/umoddi3.S | GCC
|
||||
Arm/udivmoddi4.S | GCC
|
||||
Arm/clzsi2.S | GCC
|
||||
Arm/ctzsi2.S | GCC
|
||||
Arm/ucmpdi2.S | GCC
|
||||
Arm/switch8.S | GCC
|
||||
Arm/switchu8.S | GCC
|
||||
Arm/switch16.S | GCC
|
||||
Arm/switch32.S | GCC
|
||||
Arm/sourcery.S | GCC
|
||||
Arm/uldiv.S | GCC
|
||||
Arm/ldivmod.S | GCC
|
||||
Arm/lasr.S | GCC
|
||||
Arm/llsr.S | GCC
|
||||
Arm/llsl.S | GCC
|
||||
Arm/uread.S | GCC
|
||||
Arm/uwrite.S | GCC
|
||||
|
||||
Arm/div.asm | MSFT
|
||||
Arm/uldiv.asm | MSFT
|
||||
Arm/ldivmod.asm | MSFT
|
||||
Arm/llsr.asm | MSFT
|
||||
|
||||
[Sources.AARCH64]
|
||||
AArch64/Atomics.S | GCC
|
||||
AArch64/ashlti3.S | GCC
|
||||
@ -73,4 +35,3 @@
|
||||
|
||||
[BuildOptions]
|
||||
MSFT:*_*_*_CC_FLAGS = /GL-
|
||||
MSFT:*_*_ARM_ASM_FLAGS = /oldit
|
||||
|
||||
@ -7,11 +7,7 @@
|
||||
//
|
||||
// ------------------------------------------------------------------------------
|
||||
|
||||
#if defined (_M_ARM64)
|
||||
typedef unsigned __int64 size_t;
|
||||
#else
|
||||
typedef unsigned __int32 size_t;
|
||||
#endif
|
||||
|
||||
int
|
||||
memcmp (
|
||||
|
||||
@ -37,31 +37,3 @@ memcpy (
|
||||
__memcpy (dest, src, n);
|
||||
return dest;
|
||||
}
|
||||
|
||||
#ifdef __arm__
|
||||
|
||||
__attribute__ ((__alias__ ("__memcpy")))
|
||||
void
|
||||
__aeabi_memcpy (
|
||||
void *dest,
|
||||
const void *src,
|
||||
size_t n
|
||||
);
|
||||
|
||||
__attribute__ ((__alias__ ("__memcpy")))
|
||||
void
|
||||
__aeabi_memcpy4 (
|
||||
void *dest,
|
||||
const void *src,
|
||||
size_t n
|
||||
);
|
||||
|
||||
__attribute__ ((__alias__ ("__memcpy")))
|
||||
void
|
||||
__aeabi_memcpy8 (
|
||||
void *dest,
|
||||
const void *src,
|
||||
size_t n
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
@ -7,11 +7,7 @@
|
||||
//
|
||||
// ------------------------------------------------------------------------------
|
||||
|
||||
#if defined (_M_ARM64)
|
||||
typedef unsigned __int64 size_t;
|
||||
#else
|
||||
typedef unsigned __int32 size_t;
|
||||
#endif
|
||||
|
||||
void *
|
||||
memcpy (
|
||||
|
||||
@ -7,11 +7,7 @@
|
||||
//
|
||||
// ------------------------------------------------------------------------------
|
||||
|
||||
#if defined (_M_ARM64)
|
||||
typedef unsigned __int64 size_t;
|
||||
#else
|
||||
typedef unsigned __int32 size_t;
|
||||
#endif
|
||||
|
||||
void *
|
||||
memmove (
|
||||
|
||||
@ -41,56 +41,3 @@ memset (
|
||||
int c,
|
||||
size_t n
|
||||
);
|
||||
|
||||
#ifdef __arm__
|
||||
|
||||
void
|
||||
__aeabi_memset (
|
||||
void *dest,
|
||||
size_t n,
|
||||
int c
|
||||
)
|
||||
{
|
||||
__memset (dest, c, n);
|
||||
}
|
||||
|
||||
__attribute__ ((__alias__ ("__aeabi_memset")))
|
||||
void
|
||||
__aeabi_memset4 (
|
||||
void *dest,
|
||||
size_t n,
|
||||
int c
|
||||
);
|
||||
|
||||
__attribute__ ((__alias__ ("__aeabi_memset")))
|
||||
void
|
||||
__aeabi_memset8 (
|
||||
void *dest,
|
||||
size_t n,
|
||||
int c
|
||||
);
|
||||
|
||||
void
|
||||
__aeabi_memclr (
|
||||
void *dest,
|
||||
size_t n
|
||||
)
|
||||
{
|
||||
__memset (dest, 0, n);
|
||||
}
|
||||
|
||||
__attribute__ ((__alias__ ("__aeabi_memclr")))
|
||||
void
|
||||
__aeabi_memclr4 (
|
||||
void *dest,
|
||||
size_t n
|
||||
);
|
||||
|
||||
__attribute__ ((__alias__ ("__aeabi_memclr")))
|
||||
void
|
||||
__aeabi_memclr8 (
|
||||
void *dest,
|
||||
size_t n
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
@ -7,11 +7,7 @@
|
||||
//
|
||||
// ------------------------------------------------------------------------------
|
||||
|
||||
#if defined (_M_ARM64)
|
||||
typedef unsigned __int64 size_t;
|
||||
#else
|
||||
typedef unsigned __int32 size_t;
|
||||
#endif
|
||||
|
||||
void *
|
||||
memset (
|
||||
|
||||
@ -59,12 +59,12 @@
|
||||
# implements exception handling for SEC and PEI_CORE, it can use StackCheckLib for these phases in its DSC.
|
||||
StackCheckLib|MdePkg/Library/StackCheckLibNull/StackCheckLibNull.inf
|
||||
|
||||
[LibraryClasses.ARM, LibraryClasses.AARCH64]
|
||||
[LibraryClasses.AARCH64]
|
||||
#
|
||||
# It is not possible to prevent the ARM/AARCH64 compilers from inserting generic intrinsic functions.
|
||||
# It is not possible to prevent the AARCH64 compilers from inserting generic intrinsic functions.
|
||||
# This library provides the intrinsic functions generated by these compilers.
|
||||
#
|
||||
# Linking this here as a null library will cause all ARM/AARCH64 files to link against it and have
|
||||
# Linking this here as a null library will cause all AARCH64 files to link against it and have
|
||||
# definitions for the intrinsic functions.
|
||||
#
|
||||
NULL|MdePkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
|
||||
|
||||
Reference in New Issue
Block a user