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UefiCpuPkg/PiSmmCpuDxeSmm: SmmWaitForApArrival first sync check

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Restructured the SmmWaitForApArrival first CPU synchronization
conditional checks and added new IsCpuSyncAlwaysNeeded check to determine
whether the sync should be executed unconditionally when a SMI occurs.

The first CPU synchronization shall executed unconditionally if the new
IsCpuSyncAlwaysNeeded check return TRUE. Otherwise, first CPU
synchronization is not executed unconditionally, and the decision to
synchronize should be based on the system configuration and status.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
This commit is contained in:
Khor Swee Aun
2025-01-20 22:38:47 -08:00
committed by mergify[bot]
parent cbfae3e8a9
commit f6afd87663
1 changed files with 5 additions and 8 deletions
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13
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
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@ -234,10 +234,9 @@ SmmWaitForApArrival (
{
UINT64 Timer;
UINTN Index;
BOOLEAN LmceEn;
BOOLEAN LmceSignal;
UINT32 DelayedCount;
UINT32 BlockedCount;
BOOLEAN SyncNeeded;
PERF_FUNCTION_BEGIN ();
@ -246,11 +245,9 @@ SmmWaitForApArrival (
ASSERT (SmmCpuSyncGetArrivedCpuCount (mSmmMpSyncData->SyncContext) <= mNumberOfCpus);
LmceEn = FALSE;
LmceSignal = FALSE;
if (mMachineCheckSupported) {
LmceEn = IsLmceOsEnabled ();
LmceSignal = IsLmceSignaled ();
SyncNeeded = IsCpuSyncAlwaysNeeded ();
if (!SyncNeeded) {
SyncNeeded = !(mMachineCheckSupported && IsLmceOsEnabled () && IsLmceSignaled ());
}
//
@ -268,7 +265,7 @@ SmmWaitForApArrival (
// Sync with APs 1st timeout
//
for (Timer = StartSyncTimer ();
!IsSyncTimerTimeout (Timer, mTimeoutTicker) && !(LmceEn && LmceSignal);
!IsSyncTimerTimeout (Timer, mTimeoutTicker) && SyncNeeded;
)
{
mSmmMpSyncData->AllApArrivedWithException = AllCpusInSmmExceptBlockedDisabled ();