-25 driver updates

git-svn-id: svn://coreboot.org/openbios/openbios-devel@56 f158a5a8-5612-0410-a976-696ce0be7e32

drivers/iommu.c

@@ -18,6 +18,9 @@
 #include "pgtsrmmu.h"
 #include "iommu.h"
 
+#define IOMMU_REGS  0x300
+#define NCTX_SWIFT  0x100
+
 #define IOPERM        (IOPTE_CACHE | IOPTE_WRITE | IOPTE_VALID)
 #define MKIOPTE(phys) (((((phys)>>4) & IOPTE_PAGE) | IOPERM) & ~IOPTE_WAZ)
 #define LOWMEMSZ 32 * 1024 * 1024
@@ -57,14 +60,14 @@ struct iommu {
 };
 
 struct iommu ciommu;
-
-#define NCTX_SWIFT  0x100
+static struct iommu_regs *regs;
 
 static void iommu_init(struct iommu *t, unsigned long base);
 
 static void
-iommu_invalidate(struct iommu_regs *regs) {
-    regs->tlbflush = 0;
+iommu_invalidate(struct iommu_regs *iregs)
+{
+    iregs->tlbflush = 0;
 }
 
 /*
@@ -233,7 +236,7 @@ ob_init_mmu(unsigned long base)
     PUSH(base);
     fword("encode-int");
     fword("encode+");
-    PUSH(0x300);
+    PUSH(IOMMU_REGS);
     fword("encode-int");
     fword("encode+");
     push_str("reg");
@@ -259,8 +262,16 @@ ob_init_mmu(unsigned long base)
     fword("encode+");
     push_str("available");
     fword("property");
+
+    push_str("/iommu");
+    fword("find-device");
+    PUSH((unsigned long)regs);
+    fword("encode-int");
+    push_str("address");
+    fword("property");
 }
 
+
 /*
  * Switch page tables.
  */
@@ -381,11 +392,11 @@ iommu_init(struct iommu *t, unsigned long base)
 {
     unsigned int *ptab;
     int ptsize;
-    struct iommu_regs *regs =NULL;
     unsigned int impl, vers;
     unsigned int tmp;
 
-    if ((regs = map_io(base, sizeof(struct iommu_regs))) == 0) {
+    regs = map_io(base, IOMMU_REGS);
+    if (regs == 0) {
         DPRINTF("Cannot map IOMMU\n");
         for (;;) { }
     }

drivers/obio.c

@@ -537,6 +537,9 @@ int
 ob_obio_init(unsigned long slavio_base)
 {
 
+    // All devices were integrated to NCR89C105, see
+    // http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
+
     //printk("Initializing OBIO devices...\n");
 #if 0 // XXX
     REGISTER_NAMED_NODE(ob_obio, "/obio");
@@ -544,13 +547,16 @@ ob_obio_init(unsigned long slavio_base)
     ob_set_obio_ranges(slavio_base);
 #endif
 
+    // Zilog Z8530 serial ports, see http://www.zilog.com
     // Must be before zs@0,0 or Linux won't boot
     ob_zs_init(slavio_base, SLAVIO_ZS1, ZS_INTR, 0, 0);
 
     ob_zs_init(slavio_base, SLAVIO_ZS, ZS_INTR, 1, 1);
 
+    // M48T08 NVRAM, see http://www.st.com
     ob_nvram_init(slavio_base, SLAVIO_NVRAM);
 
+    // 82078 FDC
     ob_fd_init(slavio_base, SLAVIO_FD, FD_INTR);
 
     ob_sconfig_init(slavio_base, SLAVIO_SCONFIG);

drivers/sbus.c

@@ -18,6 +18,76 @@
 
 #include "openbios/drivers.h"
 
+#define SBUS_REGS        0x28
+#define SBUS_SLOTS       5
+
+static void
+ob_sbus_node_init(unsigned long base)
+{
+    void *regs;
+
+    push_str("/iommu/sbus");
+    fword("find-device");
+
+    PUSH(0);
+    fword("encode-int");
+    PUSH(base);
+    fword("encode-int");
+    fword("encode+");
+    PUSH(SBUS_REGS);
+    fword("encode-int");
+    fword("encode+");
+    push_str("reg");
+    fword("property");
+
+    regs = map_io(base, SBUS_REGS);
+    PUSH((unsigned long)regs);
+    fword("encode-int");
+    push_str("address");
+    fword("property");
+}
+
+static void
+ob_macio_init(unsigned int slot, unsigned long base)
+{
+    // All devices were integrated to NCR89C100, see
+    // http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
+
+    // NCR 53c9x, aka ESP. See
+    // http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
+#ifdef CONFIG_DRIVER_ESP
+    ob_esp_init(base);
+#endif
+
+    // NCR 92C990, Am7990, Lance. See http://www.amd.com
+    //ob_le_init(base);
+
+    // Parallel port
+    //ob_bpp_init(base);
+
+    // Power management
+    //ob_power_init(base);
+}
+
+static void
+sbus_probe_slot(unsigned int slot, unsigned long base)
+{
+    // OpenBIOS and Qemu don't know how to do Sbus probing
+    switch(slot) {
+    case 2: // SUNW,tcx
+        //ob_tcx_init(slot, base);
+        break;
+    case 3: // SUNW,CS4231
+        //ob_cs4231_init(slot, base);
+        break;
+    case 4: // MACIO: le, esp, bpp, power-management
+        ob_macio_init(slot, base);
+        break;
+    default:
+        break;
+    }
+}
+
 static void
 ob_sbus_open(int *idx)
 {
@@ -43,10 +113,23 @@ NODE_METHODS(ob_sbus_node) = {
 	{ "close",		ob_sbus_close		},
 };
 
+static const unsigned long sbus_offset[SBUS_SLOTS] = {
+    0x30000000,
+    0x40000000,
+    0x50000000,
+    0x60000000,
+    0x70000000,
+};
 
-int ob_sbus_init(void)
+int ob_sbus_init(unsigned long base)
 {
-        //printk("Initializing SBus devices...\n");
-	
-	return 0;
+    unsigned int slot;
+
+    ob_sbus_node_init(base);
+
+    for (slot = 0; slot < SBUS_SLOTS; slot++) {
+        sbus_probe_slot(slot, sbus_offset[slot]);
+    }
+
+    return 0;
 }