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Add SPARCserver 600MP emulation

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git-svn-id: svn://coreboot.org/openbios/openbios-devel@175 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
Blue Swirl
2007-11-11 18:02:11 +00:00
parent e773b85784
commit 65dca7dd37
6 changed files with 98 additions and 18 deletions
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8
arch/sparc32/entry.S
View File

@@ -17,6 +17,8 @@
#define PHYS_SS10_EEPROM 0xf1200000
#define PHYS_SS10_INTR0 0xf1400000
#define SUN_MACHINE_ID 0x1fd9
#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
.globl entry, _entry
@@ -110,9 +112,11 @@ ss10:
cmp %g2, 'U'
bne bad_nvram
! Ok, this is SS-10
mov 0x72, %y
! Ok, this is SS-10 or SS-600MP
! Check if this not the first SMP CPU, if so, bypass PROM entirely
set PHYS_SS10_EEPROM + SUN_MACHINE_ID, %g1
lduba [%g1] ASI_M_CTL, %g2
mov %g2, %y
set PHYS_SS10_EEPROM + 0x2E, %g1
lduba [%g1] ASI_M_CTL, %g2
stba %g0, [%g2] ASI_M_CTL

16
arch/sparc32/openbios.c
View File

@@ -65,6 +65,22 @@ static const struct hwdef hwdefs[] = {
.le_base = 0xef0c00000ULL,
.machine_id = 0x72,
},
/* SS-600MP */
{
.iommu_base = 0xfe0000000ULL,
.tcx_base = 0xe20000000ULL,
.slavio_base = 0xff1000000ULL,
.ms_kb_base = 0xff1000000ULL,
.serial_base = 0xff1100000ULL,
.nvram_base = 0xff1200000ULL,
.fd_offset = -1,
.counter_offset = 0x00300000, // 0xff1300000ULL,
.intr_offset = 0x00400000, // 0xff1400000ULL,
.dma_base = 0xef0081000ULL,
.esp_base = 0xef0080000ULL,
.le_base = 0xef0060000ULL,
.machine_id = 0x71,
},
};
static const struct hwdef *hwdef;

16
drivers/esp.c
View File

@@ -25,9 +25,6 @@
#include "asm/dma.h"
#include "esp.h"
#define MACIO_ESPDMA 0x00400000ULL /* ESP DMA controller */
#define MACIO_ESP 0x00800000ULL /* ESP SCSI */
#define BUFSIZE 4096
#define REGISTER_NAMED_NODE( name, path ) do { \
@@ -318,7 +315,7 @@ static int
espdma_init(unsigned int slot, uint64_t base, unsigned long offset,
struct esp_dma *espdma)
{
espdma->regs = (void *)map_io(base + (uint64_t)offset + MACIO_ESPDMA, 0x10);
espdma->regs = (void *)map_io(base + (uint64_t)offset, 0x10);
if (espdma->regs == 0) {
DPRINTF("espdma_init: cannot map registers\n");
@@ -366,7 +363,7 @@ espdma_init(unsigned int slot, uint64_t base, unsigned long offset,
/* set reg */
PUSH(slot);
fword("encode-int");
PUSH(offset + MACIO_ESPDMA);
PUSH(offset);
fword("encode-int");
fword("encode+");
PUSH(0x00000010);
@@ -430,7 +427,8 @@ add_alias(const char *device, const char *alias)
}
int
ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset)
ob_esp_init(unsigned int slot, uint64_t base, unsigned long espoffset,
unsigned long dmaoffset)
{
int id, diskcount = 0, cdcount = 0, *counter_ptr;
char nodebuff[256], aliasbuff[256];
@@ -446,11 +444,11 @@ ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset)
global_esp = esp;
if (espdma_init(slot, base, offset, &esp->espdma) != 0) {
if (espdma_init(slot, base, dmaoffset, &esp->espdma) != 0) {
return -1;
}
/* Get the IO region */
esp->ll = (void *)map_io(base + (uint64_t)offset + MACIO_ESP,
esp->ll = (void *)map_io(base + (uint64_t)espoffset,
sizeof(struct esp_regs));
if (esp->ll == 0) {
DPRINTF("Can't map ESP registers\n");
@@ -489,7 +487,7 @@ ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset)
fword("find-device");
PUSH(slot);
fword("encode-int");
PUSH(offset + MACIO_ESP);
PUSH(espoffset);
fword("encode-int");
fword("encode+");
PUSH(0x00000010);

13
drivers/obio.c
View File

@@ -736,6 +736,16 @@ ob_nvram_init(uint64_t base, uint64_t offset)
fword("property");
switch (machine_id) {
case 0x71:
push_str("SPARCsystem 600(1 X 390Z55)");
fword("encode-string");
push_str("banner-name");
fword("property");
push_str("SUNW,SPARCsystem-600");
fword("encode-string");
push_str("name");
fword("property");
break;
case 0x72:
push_str("SPARCstation 10 (1 X 390Z55)");
fword("encode-string");
@@ -1204,7 +1214,8 @@ ob_obio_init(uint64_t slavio_base, unsigned long fd_offset,
ob_nvram_init(slavio_base, SLAVIO_NVRAM);
// 82078 FDC
ob_fd_init(slavio_base, fd_offset, FD_INTR);
if (fd_offset != (unsigned long) -1)
ob_fd_init(slavio_base, fd_offset, FD_INTR);
ob_sconfig_init(slavio_base, SLAVIO_SCONFIG);

60
drivers/sbus.c
View File

@@ -24,6 +24,11 @@
#define POWER_OFFSET 0x0a000000ULL
#define CS4231_REGS 0x40
#define CS4231_OFFSET 0x0c000000ULL
#define MACIO_ESPDMA 0x00400000ULL /* ESP DMA controller */
#define MACIO_ESP 0x00800000ULL /* ESP SCSI */
#define SS600MP_ESPDMA 0x00081000ULL
#define SS600MP_ESP 0x00080000ULL
#define SS600MP_LEBUFFER (SS600MP_ESPDMA + 0x10) // XXX should be 0x40000
static void
ob_sbus_node_init(uint64_t base)
@@ -52,13 +57,14 @@ ob_sbus_node_init(uint64_t base)
}
static void
ob_le_init(unsigned int slot, unsigned long base, unsigned long offset)
ob_le_init(unsigned int slot, unsigned long base, unsigned long leoffset,
unsigned long dmaoffset)
{
push_str("/iommu/sbus/ledma");
fword("find-device");
PUSH(slot);
fword("encode-int");
PUSH(offset + 0x00400010);
PUSH(dmaoffset);
fword("encode-int");
fword("encode+");
PUSH(0x00000020);
@@ -71,7 +77,7 @@ ob_le_init(unsigned int slot, unsigned long base, unsigned long offset)
fword("find-device");
PUSH(slot);
fword("encode-int");
PUSH(offset + 0x00c00000);
PUSH(leoffset);
fword("encode-int");
fword("encode+");
PUSH(0x00000004);
@@ -352,11 +358,11 @@ ob_macio_init(unsigned int slot, uint64_t base, unsigned long offset)
// NCR 53c9x, aka ESP. See
// http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
#ifdef CONFIG_DRIVER_ESP
ob_esp_init(slot, base, offset);
ob_esp_init(slot, base, offset + MACIO_ESP, offset + MACIO_ESPDMA);
#endif
// NCR 92C990, Am7990, Lance. See http://www.amd.com
ob_le_init(slot, base, offset);
ob_le_init(slot, base, offset + 0x00c00000, offset + 0x00400010);
// Parallel port
//ob_bpp_init(base);
@@ -400,6 +406,26 @@ sbus_probe_slot_ss10(unsigned int slot, uint64_t base)
}
}
static void
sbus_probe_slot_ss600mp(unsigned int slot, uint64_t base)
{
// OpenBIOS and Qemu don't know how to do Sbus probing
switch(slot) {
case 2: // SUNW,tcx
ob_tcx_init(slot, base);
break;
case 0xf: // le, esp, bpp, power-management
#ifdef CONFIG_DRIVER_ESP
ob_esp_init(slot, base, SS600MP_ESP, SS600MP_ESPDMA);
#endif
// NCR 92C990, Am7990, Lance. See http://www.amd.com
ob_le_init(slot, base, 0x00060000, SS600MP_LEBUFFER);
break;
default:
break;
}
}
static void
ob_sbus_open(int *idx)
{
@@ -440,6 +466,7 @@ static const struct sbus_offset sbus_offsets_ss5[SBUS_SLOTS] = {
{ 5, 0, 0x70000000, 0x10000000,},
};
/* Shared with ss600mp */
static const struct sbus_offset sbus_offsets_ss10[SBUS_SLOTS] = {
{ 0, 0, 0xe00000000ULL, 0x10000000,},
{ 1, 0, 0xe10000000ULL, 0x10000000,},
@@ -515,11 +542,34 @@ ob_sbus_init_ss10(uint64_t base)
return 0;
}
static int
ob_sbus_init_ss600mp(uint64_t base)
{
unsigned int slot;
int notfirst = 0;
for (slot = 0; slot < SBUS_SLOTS; slot++) {
if (sbus_offsets_ss10[slot].size > 0)
ob_add_sbus_range(&sbus_offsets_ss10[slot], notfirst++);
}
push_str("ranges");
fword("property");
for (slot = 0; slot < SBUS_SLOTS; slot++) {
if (sbus_offsets_ss10[slot].size > 0)
sbus_probe_slot_ss600mp(slot, sbus_offsets_ss10[slot].base);
}
return 0;
}
int ob_sbus_init(uint64_t base, int machine_id)
{
ob_sbus_node_init(base);
switch (machine_id) {
case 0x71:
return ob_sbus_init_ss600mp(base);
case 0x72:
return ob_sbus_init_ss10(base);
case 0x80:

3
include/openbios/drivers.h
View File

@@ -21,7 +21,8 @@ int ob_sbus_init(uint64_t base, int machine_id);
int ob_ide_init(void);
#endif
#ifdef CONFIG_DRIVER_ESP
int ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset);
int ob_esp_init(unsigned int slot, uint64_t base, unsigned long espoffset,
unsigned long dmaoffset);
#endif
#ifdef CONFIG_DRIVER_OBIO
int ob_obio_init(uint64_t slavio_base, unsigned long fd_offset,