mirror of
https://gitlab.com/qemu-project/openbios.git
synced 2024-02-13 08:34:06 +08:00
Add SPARCserver 600MP emulation
git-svn-id: svn://coreboot.org/openbios/openbios-devel@175 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
@@ -25,9 +25,6 @@
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#include "asm/dma.h"
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#include "esp.h"
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#define MACIO_ESPDMA 0x00400000ULL /* ESP DMA controller */
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#define MACIO_ESP 0x00800000ULL /* ESP SCSI */
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#define BUFSIZE 4096
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#define REGISTER_NAMED_NODE( name, path ) do { \
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@@ -318,7 +315,7 @@ static int
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espdma_init(unsigned int slot, uint64_t base, unsigned long offset,
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struct esp_dma *espdma)
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{
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espdma->regs = (void *)map_io(base + (uint64_t)offset + MACIO_ESPDMA, 0x10);
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espdma->regs = (void *)map_io(base + (uint64_t)offset, 0x10);
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if (espdma->regs == 0) {
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DPRINTF("espdma_init: cannot map registers\n");
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@@ -366,7 +363,7 @@ espdma_init(unsigned int slot, uint64_t base, unsigned long offset,
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/* set reg */
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PUSH(slot);
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fword("encode-int");
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PUSH(offset + MACIO_ESPDMA);
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PUSH(offset);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000010);
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@@ -430,7 +427,8 @@ add_alias(const char *device, const char *alias)
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}
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int
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ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset)
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ob_esp_init(unsigned int slot, uint64_t base, unsigned long espoffset,
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unsigned long dmaoffset)
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{
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int id, diskcount = 0, cdcount = 0, *counter_ptr;
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char nodebuff[256], aliasbuff[256];
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@@ -446,11 +444,11 @@ ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset)
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global_esp = esp;
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if (espdma_init(slot, base, offset, &esp->espdma) != 0) {
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if (espdma_init(slot, base, dmaoffset, &esp->espdma) != 0) {
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return -1;
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}
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/* Get the IO region */
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esp->ll = (void *)map_io(base + (uint64_t)offset + MACIO_ESP,
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esp->ll = (void *)map_io(base + (uint64_t)espoffset,
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sizeof(struct esp_regs));
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if (esp->ll == 0) {
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DPRINTF("Can't map ESP registers\n");
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@@ -489,7 +487,7 @@ ob_esp_init(unsigned int slot, uint64_t base, unsigned long offset)
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fword("find-device");
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PUSH(slot);
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fword("encode-int");
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PUSH(offset + MACIO_ESP);
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PUSH(espoffset);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000010);
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@@ -736,6 +736,16 @@ ob_nvram_init(uint64_t base, uint64_t offset)
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fword("property");
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switch (machine_id) {
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case 0x71:
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push_str("SPARCsystem 600(1 X 390Z55)");
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fword("encode-string");
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push_str("banner-name");
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fword("property");
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push_str("SUNW,SPARCsystem-600");
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fword("encode-string");
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push_str("name");
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fword("property");
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break;
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case 0x72:
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push_str("SPARCstation 10 (1 X 390Z55)");
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fword("encode-string");
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@@ -1204,7 +1214,8 @@ ob_obio_init(uint64_t slavio_base, unsigned long fd_offset,
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ob_nvram_init(slavio_base, SLAVIO_NVRAM);
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// 82078 FDC
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ob_fd_init(slavio_base, fd_offset, FD_INTR);
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if (fd_offset != (unsigned long) -1)
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ob_fd_init(slavio_base, fd_offset, FD_INTR);
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ob_sconfig_init(slavio_base, SLAVIO_SCONFIG);
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@@ -24,6 +24,11 @@
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#define POWER_OFFSET 0x0a000000ULL
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#define CS4231_REGS 0x40
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#define CS4231_OFFSET 0x0c000000ULL
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#define MACIO_ESPDMA 0x00400000ULL /* ESP DMA controller */
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#define MACIO_ESP 0x00800000ULL /* ESP SCSI */
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#define SS600MP_ESPDMA 0x00081000ULL
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#define SS600MP_ESP 0x00080000ULL
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#define SS600MP_LEBUFFER (SS600MP_ESPDMA + 0x10) // XXX should be 0x40000
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static void
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ob_sbus_node_init(uint64_t base)
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@@ -52,13 +57,14 @@ ob_sbus_node_init(uint64_t base)
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}
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static void
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ob_le_init(unsigned int slot, unsigned long base, unsigned long offset)
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ob_le_init(unsigned int slot, unsigned long base, unsigned long leoffset,
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unsigned long dmaoffset)
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{
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push_str("/iommu/sbus/ledma");
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fword("find-device");
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PUSH(slot);
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fword("encode-int");
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PUSH(offset + 0x00400010);
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PUSH(dmaoffset);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000020);
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@@ -71,7 +77,7 @@ ob_le_init(unsigned int slot, unsigned long base, unsigned long offset)
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fword("find-device");
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PUSH(slot);
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fword("encode-int");
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PUSH(offset + 0x00c00000);
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PUSH(leoffset);
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fword("encode-int");
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fword("encode+");
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PUSH(0x00000004);
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@@ -352,11 +358,11 @@ ob_macio_init(unsigned int slot, uint64_t base, unsigned long offset)
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// NCR 53c9x, aka ESP. See
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// http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
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#ifdef CONFIG_DRIVER_ESP
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ob_esp_init(slot, base, offset);
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ob_esp_init(slot, base, offset + MACIO_ESP, offset + MACIO_ESPDMA);
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#endif
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// NCR 92C990, Am7990, Lance. See http://www.amd.com
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ob_le_init(slot, base, offset);
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ob_le_init(slot, base, offset + 0x00c00000, offset + 0x00400010);
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// Parallel port
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//ob_bpp_init(base);
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@@ -400,6 +406,26 @@ sbus_probe_slot_ss10(unsigned int slot, uint64_t base)
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}
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}
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static void
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sbus_probe_slot_ss600mp(unsigned int slot, uint64_t base)
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{
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// OpenBIOS and Qemu don't know how to do Sbus probing
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switch(slot) {
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case 2: // SUNW,tcx
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ob_tcx_init(slot, base);
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break;
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case 0xf: // le, esp, bpp, power-management
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#ifdef CONFIG_DRIVER_ESP
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ob_esp_init(slot, base, SS600MP_ESP, SS600MP_ESPDMA);
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#endif
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// NCR 92C990, Am7990, Lance. See http://www.amd.com
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ob_le_init(slot, base, 0x00060000, SS600MP_LEBUFFER);
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break;
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default:
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break;
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}
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}
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static void
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ob_sbus_open(int *idx)
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{
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@@ -440,6 +466,7 @@ static const struct sbus_offset sbus_offsets_ss5[SBUS_SLOTS] = {
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{ 5, 0, 0x70000000, 0x10000000,},
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};
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/* Shared with ss600mp */
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static const struct sbus_offset sbus_offsets_ss10[SBUS_SLOTS] = {
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{ 0, 0, 0xe00000000ULL, 0x10000000,},
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{ 1, 0, 0xe10000000ULL, 0x10000000,},
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@@ -515,11 +542,34 @@ ob_sbus_init_ss10(uint64_t base)
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return 0;
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}
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static int
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ob_sbus_init_ss600mp(uint64_t base)
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{
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unsigned int slot;
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int notfirst = 0;
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for (slot = 0; slot < SBUS_SLOTS; slot++) {
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if (sbus_offsets_ss10[slot].size > 0)
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ob_add_sbus_range(&sbus_offsets_ss10[slot], notfirst++);
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}
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push_str("ranges");
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fword("property");
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for (slot = 0; slot < SBUS_SLOTS; slot++) {
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if (sbus_offsets_ss10[slot].size > 0)
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sbus_probe_slot_ss600mp(slot, sbus_offsets_ss10[slot].base);
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}
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return 0;
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}
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int ob_sbus_init(uint64_t base, int machine_id)
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{
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ob_sbus_node_init(base);
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switch (machine_id) {
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case 0x71:
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return ob_sbus_init_ss600mp(base);
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case 0x72:
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return ob_sbus_init_ss10(base);
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case 0x80:
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