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QEMU changed PCI/IO port byte swapping, adapt OpenBIOS to new way

Browse Source 
This requires an updated QEMU.

Also use little endian access ASIs.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

git-svn-id: svn://coreboot.org/openbios/trunk/openbios-devel@671 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
Blue Swirl
2010-01-29 18:46:38 +00:00
parent dc3b5cc5f2
commit bdf1f6ce72
3 changed files with 30 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/sparc64/entry.S
View File

@@ -59,7 +59,7 @@ entry:
! Check signature "QEMU"
setx CFG_ADDR, %g2, %g5
mov FW_CFG_SIGNATURE, %g2
stha %g2, [%g5] ASI_PHYS_BYPASS_EC_E
stha %g2, [%g5] ASI_PHYS_BYPASS_EC_E_L
inc %g5
lduba [%g5] ASI_PHYS_BYPASS_EC_E, %g2
cmp %g2, 'Q'
@@ -99,7 +99,7 @@ entry:
! NB: little endian format
mov FW_CFG_RAM_SIZE, %g2
dec %g5
stha %g2, [%g5] ASI_PHYS_BYPASS_EC_E
stha %g2, [%g5] ASI_PHYS_BYPASS_EC_E_L
inc %g5
lduba [%g5] ASI_PHYS_BYPASS_EC_E, %g4

66
include/sparc64/io.h
View File

@@ -56,6 +56,7 @@ extern unsigned long isa_io_base;
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
* On Sparc64, BE versions must swap bytes using LE access ASI.
*/
static inline int in_8(volatile unsigned char *addr)
{
@@ -74,19 +75,6 @@ static inline void out_8(volatile unsigned char *addr, int val)
}
static inline int in_le16(volatile unsigned short *addr)
{
int ret, tmp;
// XXX
__asm__ __volatile__("lduha [%1] 0x15, %0\n\t"
:"=r"(ret):"r"(addr):"memory");
tmp = (ret << 8) & 0xff00;
tmp |= (ret >> 8) & 0xff;
return tmp;
}
static inline int in_be16(volatile unsigned short *addr)
{
int ret;
@@ -96,39 +84,30 @@ static inline int in_be16(volatile unsigned short *addr)
return ret;
}
static inline void out_le16(volatile unsigned short *addr, int val)
static inline int in_be16(volatile unsigned short *addr)
{
unsigned tmp;
int ret;
// XXX
tmp = (val << 8) & 0xff00;
tmp |= (val >> 8) & 0xff;
__asm__ __volatile__("stha %0, [%1] 0x15\n\t"
: : "r"(tmp), "r"(addr):"memory");
__asm__ __volatile__("lduha [%1] 0x1d, %0\n\t"
:"=r"(ret):"r"(addr):"memory");
return ret;
}
static inline void out_be16(volatile unsigned short *addr, int val)
static inline void out_le16(volatile unsigned short *addr, int val)
{
__asm__ __volatile__("stha %0, [%1] 0x15\n\t"
: : "r"(val), "r"(addr):"memory");
}
static inline unsigned in_le32(volatile unsigned *addr)
static inline void out_be16(volatile unsigned short *addr, int val)
{
unsigned ret, tmp;
// XXX
__asm__ __volatile__("lduwa [%1] 0x15, %0\n\t"
:"=r"(ret):"r"(addr):"memory");
tmp = ret << 24;
tmp |= (ret << 8) & 0xff0000;
tmp |= (ret >> 8) & 0xff00;
tmp |= (ret >> 24) & 0xff;
return tmp;
__asm__ __volatile__("stha %0, [%1] 0x1d\n\t"
: : "r"(val), "r"(addr):"memory");
}
static inline unsigned in_be32(volatile unsigned *addr)
static inline unsigned in_le32(volatile unsigned *addr)
{
unsigned ret;
@@ -138,21 +117,24 @@ static inline unsigned in_be32(volatile unsigned *addr)
return ret;
}
static inline unsigned in_be32(volatile unsigned *addr)
{
unsigned ret;
__asm__ __volatile__("lduwa [%1] 0x1d, %0\n\t"
:"=r"(ret):"r"(addr):"memory");
return ret;
}
static inline void out_le32(volatile unsigned *addr, int val)
{
unsigned tmp;
// XXX
tmp = val << 24;
tmp |= (val << 8) & 0xff0000;
tmp |= (val >> 8) & 0xff00;
tmp |= (val >> 24) & 0xff;
__asm__ __volatile__("stwa %0, [%1] 0x15\n\t"
: : "r"(tmp), "r"(addr):"memory");
: : "r"(val), "r"(addr):"memory");
}
static inline void out_be32(volatile unsigned *addr, int val)
{
__asm__ __volatile__("stwa %0, [%1] 0x15\n\t"
__asm__ __volatile__("stwa %0, [%1] 0x1d\n\t"
: : "r"(val), "r"(addr):"memory");
}

8
include/sparc64/pci.h
View File

@@ -35,14 +35,14 @@ static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
{
uint16_t res;
res = in_le16((uint16_t *)(PCI_CONFIG(dev) + reg));
res = in_be16((uint16_t *)(PCI_CONFIG(dev) + reg));
return res;
}
static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
{
uint32_t res;
res = in_le32((uint32_t *)(PCI_CONFIG(dev) + reg));
res = in_be32((uint32_t *)(PCI_CONFIG(dev) + reg));
return res;
}
@@ -53,12 +53,12 @@ static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
{
out_le16((uint16_t *)(PCI_CONFIG(dev) + reg), val);
out_be16((uint16_t *)(PCI_CONFIG(dev) + reg), val);
}
static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
{
out_le32((uint32_t *)(PCI_CONFIG(dev) + reg), val);
out_be32((uint32_t *)(PCI_CONFIG(dev) + reg), val);
}
#else /* !PCI_CONFIG_1 */
#error PCI Configuration Mechanism is not specified or implemented