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https://gitlab.com/qemu-project/openbios.git
synced 2024-02-13 08:34:06 +08:00
Add basic Mac99 machine support
git-svn-id: svn://coreboot.org/openbios/openbios-devel@449 f158a5a8-5612-0410-a976-696ce0be7e32
This commit is contained in:
@@ -462,12 +462,12 @@ arch_of_init( void )
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/* model */
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/* model */
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push_str("PowerMac1,1");
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push_str("PowerMac2,1");
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fword("model");
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fword("model");
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/* compatible */
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/* compatible */
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push_str("PowerMac1,1");
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push_str("PowerMac2,1");
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fword("encode-string");
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fword("encode-string");
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push_str("MacRISC");
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push_str("MacRISC");
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fword("encode-string");
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fword("encode-string");
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@@ -7,7 +7,7 @@ BASE_ADDR = 0xfff00000;
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/* As NVRAM is at 0xfff04000, the .text needs to be after that
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/* As NVRAM is at 0xfff04000, the .text needs to be after that
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*/
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*/
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TEXT_ADDR = 0xfff06000;
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TEXT_ADDR = 0xfff08000;
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/* Hard reset vector address
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/* Hard reset vector address
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*/
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*/
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101
drivers/macio.c
101
drivers/macio.c
@@ -19,15 +19,26 @@
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#include "cuda.h"
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#include "cuda.h"
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#include "escc.h"
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#include "escc.h"
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#define IO_NVRAM_SIZE 0x00020000
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#define OW_IO_NVRAM_SIZE 0x00020000
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#define IO_NVRAM_OFFSET 0x00060000
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#define OW_IO_NVRAM_OFFSET 0x00060000
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#define OW_IO_NVRAM_SHIFT 4
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#define NW_IO_NVRAM_SIZE 0x00004000
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#define NW_IO_NVRAM_OFFSET 0xfff04000
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#define NW_IO_NVRAM_SHIFT 1
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#define IO_OPENPIC_SIZE 0x00040000
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#define IO_OPENPIC_OFFSET 0x00040000
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static char *nvram;
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static char *nvram;
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int
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int
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arch_nvram_size( void )
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arch_nvram_size( void )
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{
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{
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return IO_NVRAM_SIZE>>4;
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if (is_oldworld())
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return OW_IO_NVRAM_SIZE >> OW_IO_NVRAM_SHIFT;
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else
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return NW_IO_NVRAM_SIZE >> NW_IO_NVRAM_SHIFT;
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}
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}
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void macio_nvram_init(const char *path, uint32_t addr)
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void macio_nvram_init(const char *path, uint32_t addr)
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@@ -36,14 +47,28 @@ void macio_nvram_init(const char *path, uint32_t addr)
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phandle_t dnode;
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phandle_t dnode;
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int props[2];
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int props[2];
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char buf[64];
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char buf[64];
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unsigned long nvram_size, nvram_offset;
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nvram = (char*)addr + IO_NVRAM_OFFSET;
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if (is_oldworld()) {
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nvram_offset = OW_IO_NVRAM_OFFSET;
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nvram_size = OW_IO_NVRAM_SIZE;
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} else {
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nvram_offset = NW_IO_NVRAM_OFFSET;
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nvram_size = NW_IO_NVRAM_SIZE;
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push_str("/");
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fword("find-device");
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fword("new-device");
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push_str("nvram");
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fword("device-name");
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fword("finish-device");
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}
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nvram = (char*)addr + nvram_offset;
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snprintf(buf, sizeof(buf), "%s/nvram", path);
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snprintf(buf, sizeof(buf), "%s/nvram", path);
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nvram_init(buf);
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nvram_init(buf);
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dnode = find_dev(buf);
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dnode = find_dev(buf);
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set_int_property(dnode, "#bytes", arch_nvram_size() );
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set_int_property(dnode, "#bytes", arch_nvram_size() );
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props[0] = __cpu_to_be32(IO_NVRAM_OFFSET);
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props[0] = __cpu_to_be32(nvram_offset);
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props[1] = __cpu_to_be32(IO_NVRAM_SIZE);
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props[1] = __cpu_to_be32(nvram_size);
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set_property(dnode, "reg", (char *)&props, sizeof(props));
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set_property(dnode, "reg", (char *)&props, sizeof(props));
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set_property(dnode, "device_type", "nvram", 6);
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set_property(dnode, "device_type", "nvram", 6);
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@@ -81,8 +106,15 @@ void
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arch_nvram_put( char *buf )
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arch_nvram_put( char *buf )
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{
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{
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int i;
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int i;
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unsigned int it_shift;
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if (is_oldworld())
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it_shift = OW_IO_NVRAM_SHIFT;
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else
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it_shift = NW_IO_NVRAM_SHIFT;
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for (i=0; i< arch_nvram_size() ; i++)
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for (i=0; i< arch_nvram_size() ; i++)
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nvram[i<<4]=buf[i];
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nvram[i << it_shift] = buf[i];
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#ifdef DUMP_NVRAM
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#ifdef DUMP_NVRAM
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printk("new nvram:\n");
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printk("new nvram:\n");
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dump_nvram();
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dump_nvram();
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@@ -93,8 +125,15 @@ void
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arch_nvram_get( char *buf )
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arch_nvram_get( char *buf )
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{
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{
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int i;
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int i;
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unsigned int it_shift;
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if (is_oldworld())
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it_shift = OW_IO_NVRAM_SHIFT;
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else
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it_shift = NW_IO_NVRAM_SHIFT;
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for (i=0; i< arch_nvram_size(); i++)
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for (i=0; i< arch_nvram_size(); i++)
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buf[i]=nvram[i<<4];
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buf[i] = nvram[i << it_shift];
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#ifdef DUMP_NVRAM
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#ifdef DUMP_NVRAM
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printk("current nvram:\n");
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printk("current nvram:\n");
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@@ -102,8 +141,36 @@ arch_nvram_get( char *buf )
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#endif
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#endif
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}
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}
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static void
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openpic_init(const char *path, uint32_t addr)
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{
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phandle_t dnode;
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int props[2];
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char buf[128];
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push_str(path);
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fword("find-device");
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fword("new-device");
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push_str("interrupt-controller");
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fword("device-name");
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fword("finish-device");
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snprintf(buf, sizeof(buf), "%s/interrupt-controller", path);
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dnode = find_dev(buf);
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set_property(dnode, "device_type", "open-pic", 9);
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set_property(dnode, "compatible", "chrp,open-pic", 14);
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set_property(dnode, "built-in", "", 0);
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props[0] = __cpu_to_be32(IO_OPENPIC_OFFSET);
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props[1] = __cpu_to_be32(IO_OPENPIC_SIZE);
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set_property(dnode, "reg", (char *)&props, sizeof(props));
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set_int_property(dnode, "#interrupt-cells", 2);
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set_int_property(dnode, "#address-cells", 0);
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set_property(dnode, "interrupt-controller", "", 0);
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set_int_property(dnode, "clock-frequency", 4166666);
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}
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void
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void
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ob_macio_init(const char *path, uint32_t addr)
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ob_macio_heathrow_init(const char *path, uint32_t addr)
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{
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{
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phandle_t aliases;
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phandle_t aliases;
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@@ -115,3 +182,19 @@ ob_macio_init(const char *path, uint32_t addr)
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escc_init(path, addr);
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escc_init(path, addr);
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macio_ide_init(path, addr, 1);
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macio_ide_init(path, addr, 1);
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}
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}
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void
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ob_macio_keylargo_init(const char *path, uint32_t addr)
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{
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phandle_t aliases;
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aliases = find_dev("/aliases");
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set_property(aliases, "mac-io", path, strlen(path) + 1);
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cuda_init(path, addr);
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/* The NewWorld NVRAM is not located in the MacIO device */
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macio_nvram_init("", 0);
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escc_init(path, addr);
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macio_ide_init(path, addr, 3);
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openpic_init(path, addr);
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}
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@@ -1,4 +1,5 @@
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extern phandle_t pic_handle;
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extern phandle_t pic_handle;
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void ob_macio_init(const char *path, uint32_t addr);
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void ob_macio_heathrow_init(const char *path, uint32_t addr);
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void ob_macio_keylargo_init(const char *path, uint32_t addr);
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void macio_nvram_init(const char *path, uint32_t addr);
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void macio_nvram_init(const char *path, uint32_t addr);
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@@ -419,16 +419,26 @@ static void pci_set_ranges(const pci_config_t *config)
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set_property(dev, "ranges", (char *)props, ncells * sizeof(cell));
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set_property(dev, "ranges", (char *)props, ncells * sizeof(cell));
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}
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}
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int macio_config_cb (const pci_config_t *config)
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int macio_heathrow_config_cb (const pci_config_t *config)
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{
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{
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pci_set_ranges(config);
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pci_set_ranges(config);
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#ifdef CONFIG_DRIVER_MACIO
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#ifdef CONFIG_DRIVER_MACIO
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ob_macio_init(config->path, config->assigned[0] & ~0x0000000F);
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ob_macio_heathrow_init(config->path, config->assigned[0] & ~0x0000000F);
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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int macio_keylargo_config_cb (const pci_config_t *config)
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{
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pci_set_ranges(config);
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#ifdef CONFIG_DRIVER_MACIO
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ob_macio_keylargo_init(config->path, config->assigned[0] & ~0x0000000F);
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#endif
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return 0;
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}
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int vga_config_cb (const pci_config_t *config)
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int vga_config_cb (const pci_config_t *config)
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{
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{
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if (config->assigned[0] != 0x00000000)
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if (config->assigned[0] != 0x00000000)
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@@ -289,7 +289,7 @@ static const pci_dev_t hbrg_devices[] = {
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI, NULL,
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_PCI, NULL,
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"pci", "AAPL,UniNorth", "uni-north\0",
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"pci", "AAPL,UniNorth", "uni-north\0",
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3, 2, 1,
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3, 2, 1,
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NULL, NULL
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host_config_cb, NULL,
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},
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},
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{
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{
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI, NULL,
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI, NULL,
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@@ -1071,21 +1071,21 @@ static const pci_dev_t misc_pci[] = {
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1201,
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1201,
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"mac-io", "mac-io", "AAPL,343S1201", "heathrow\0",
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"mac-io", "mac-io", "AAPL,343S1201", "heathrow\0",
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1, 1, 1,
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1, 1, 1,
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&macio_config_cb, NULL,
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&macio_heathrow_config_cb, NULL,
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},
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},
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/* Paddington Mac I/O */
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/* Paddington Mac I/O */
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{
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{
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1211,
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_343S1211,
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"mac-io", "mac-io", "AAPL,343S1211", "paddington\0heathrow\0",
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"mac-io", "mac-io", "AAPL,343S1211", "paddington\0heathrow\0",
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1, 1, 1,
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1, 1, 1,
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&macio_config_cb, NULL,
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&macio_heathrow_config_cb, NULL,
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},
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},
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/* KeyLargo Mac I/O */
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/* KeyLargo Mac I/O */
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{
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{
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_KEYL,
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PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_KEYL,
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"mac-io", "mac-io", "AAPL,Keylargo", "Keylargo\0",
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"mac-io", "mac-io", "AAPL,Keylargo", "Keylargo\0",
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1, 1, 2,
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1, 1, 2,
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&macio_config_cb, NULL,
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&macio_keylargo_config_cb, NULL,
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},
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},
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{
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{
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0xFFFF, 0xFFFF,
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0xFFFF, 0xFFFF,
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@@ -27,7 +27,8 @@ struct pci_dev_t {
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extern int ide_config_cb2(const pci_config_t *config);
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extern int ide_config_cb2(const pci_config_t *config);
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extern int eth_config_cb(const pci_config_t *config);
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extern int eth_config_cb(const pci_config_t *config);
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extern int macio_config_cb(const pci_config_t *config);
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extern int macio_heathrow_config_cb(const pci_config_t *config);
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extern int macio_keylargo_config_cb(const pci_config_t *config);
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extern int vga_config_cb(const pci_config_t *config);
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extern int vga_config_cb(const pci_config_t *config);
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extern int host_config_cb(const pci_config_t *config);
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extern int host_config_cb(const pci_config_t *config);
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extern int bridge_config_cb(const pci_config_t *config);
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extern int bridge_config_cb(const pci_config_t *config);
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