We should not jump to next stage if next mode (S-mode or U-mode)
is not supported by HART.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
On QEMU Virt, max supported HARTs are 8 but number of HARTs
actually depend on "-smp" command-line parameter passed to
QEMU. This creates problems in sbi_hart_wake_coldboot_harts()
because when number of HARTs are less than 8.
To tackle this, we introduce a bitmap to track HARTs waiting
for coldboot to finish. We wake only those HARTs who have
set their bit in coldboot bitmap.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
We can only use fw_payload blob on Kendryte K210 board
because there is no previous booting stage hence this
patch enables fw_payload for Kendryte K210 board.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch extends fw_payload blob to provide FW_PAYLOAD_FDT_PATH
option using which we can embed custom FDT in .text section of
fw_payload blob. In other words, FW_PAYLOAD_FDT_PATH is an option
to forcefully override FDT passed by previous booting stage in
a1 register.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Instead of placing FDT (passed by previous booting stage) at a
location relative to next address we should have absolute
location of placing FDT so that we more freedom of placing FDT.
This will be particularly useful for platforms/boards with
very less RAM (such as Kendryte board).
Due to above motivation, we rename FW_xyz_FDT_OFFSET options
to FW_xyz_FDT_ADDR options and use FW_xyz_FDT_ADDR options as
absolute address for placing FDT.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch remove hard-coding of payload location in
fw_payload.elf.ldS by adding compile-time option
FW_PAYLOAD_OFFSET.
With the new compile-time option, payload will be placed
at PLAT_TEXT_START + FW_PAYLOAD_OFFSET address.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Currently, we aggresively use atomic operation on CLINT IPI
register. This patch simplify CLINT IPI APIs by reducing use
of atomic operations. In future, we will gradually increase
use of atomic operations for CLINT IPI APIs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The QEMU sifive_u machine is not excatly same as HiFive Unleashed
board hence we add separate platform support for QEMU sifive_u
machine.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Emulation of CSR read for misa and mhartid was a workaround for
bootloader accessing these CSRs in S-mode. This patch removes
CSR read emulation for misa and mhartid.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Atish Patra