mirror of
https://gitlab.com/qemu-project/qboot.git
synced 2024-02-13 08:33:40 +08:00
implement mptable generation
This is specially useful for machines lacking ACPI. Signed-off-by: Sergio Lopez <slp@redhat.com>
This commit is contained in:
Sergio Lopez
committed by
Paolo Bonzini
Paolo Bonzini
parent
947bade344
commit
e5b140b91b
1
Makefile
1
Makefile
@ -1,5 +1,6 @@
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obj-y = code16.o entry.o main.o string.o printf.o cstart.o fw_cfg.o
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obj-y += linuxboot.o malloc.o pflash.o tables.o hwsetup.o pci.o code32seg.o
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obj-y += mptable.o
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all-y = bios.bin
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all: $(all-y)
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@ -66,6 +66,7 @@ extern uint32_t pic_base(void);
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extern void setup_pci(void);
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extern bool setup_hw(void);
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extern bool setup_mmconfig(void);
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extern void setup_mptable(void);
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extern void extract_acpi(void);
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extern void boot_from_fwcfg(void);
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182
include/mpspec_def.h
Normal file
182
include/mpspec_def.h
Normal file
@ -0,0 +1,182 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MPSPEC_DEF_H
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#define _ASM_X86_MPSPEC_DEF_H
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/*
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* Structure definitions for SMP machines following the
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* Intel Multiprocessing Specification 1.1 and 1.4.
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*/
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/*
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* This tag identifies where the SMP configuration
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* information is.
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*/
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#define SMP_MAGIC_IDENT (('_'<<24) | ('P'<<16) | ('M'<<8) | '_')
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#ifdef CONFIG_X86_32
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# define MAX_MPC_ENTRY 1024
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#endif
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/* Intel MP Floating Pointer Structure */
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struct mpf_intel {
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char signature[4]; /* "_MP_" */
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unsigned int physptr; /* Configuration table address */
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unsigned char length; /* Our length (paragraphs) */
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unsigned char specification; /* Specification version */
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unsigned char checksum; /* Checksum (makes sum 0) */
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unsigned char feature1; /* Standard or configuration ? */
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unsigned char feature2; /* Bit7 set for IMCR|PIC */
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unsigned char feature3; /* Unused (0) */
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unsigned char feature4; /* Unused (0) */
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unsigned char feature5; /* Unused (0) */
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};
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#define MPC_SIGNATURE "PCMP"
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struct mpc_table {
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char signature[4];
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unsigned short length; /* Size of table */
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char spec; /* 0x01 */
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char checksum;
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char oem[8];
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char productid[12];
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unsigned int oemptr; /* 0 if not present */
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unsigned short oemsize; /* 0 if not present */
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unsigned short oemcount;
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unsigned int lapic; /* APIC address */
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unsigned int reserved;
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};
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/* Followed by entries */
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#define MP_PROCESSOR 0
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#define MP_BUS 1
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#define MP_IOAPIC 2
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#define MP_INTSRC 3
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#define MP_LINTSRC 4
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/* Used by IBM NUMA-Q to describe node locality */
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#define MP_TRANSLATION 192
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#define CPU_ENABLED 1 /* Processor is available */
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#define CPU_BOOTPROCESSOR 2 /* Processor is the boot CPU */
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#define CPU_STEPPING_MASK 0x000F
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#define CPU_MODEL_MASK 0x00F0
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#define CPU_FAMILY_MASK 0x0F00
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struct mpc_cpu {
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unsigned char type;
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unsigned char apicid; /* Local APIC number */
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unsigned char apicver; /* Its versions */
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unsigned char cpuflag;
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unsigned int cpufeature;
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unsigned int featureflag; /* CPUID feature value */
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unsigned int reserved[2];
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};
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struct mpc_bus {
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unsigned char type;
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unsigned char busid;
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unsigned char bustype[6];
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};
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/* List of Bus Type string values, Intel MP Spec. */
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#define BUSTYPE_EISA "EISA"
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#define BUSTYPE_ISA "ISA"
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#define BUSTYPE_INTERN "INTERN" /* Internal BUS */
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#define BUSTYPE_MCA "MCA" /* Obsolete */
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#define BUSTYPE_VL "VL" /* Local bus */
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#define BUSTYPE_PCI "PCI"
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#define BUSTYPE_PCMCIA "PCMCIA"
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#define BUSTYPE_CBUS "CBUS"
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#define BUSTYPE_CBUSII "CBUSII"
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#define BUSTYPE_FUTURE "FUTURE"
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#define BUSTYPE_MBI "MBI"
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#define BUSTYPE_MBII "MBII"
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#define BUSTYPE_MPI "MPI"
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#define BUSTYPE_MPSA "MPSA"
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#define BUSTYPE_NUBUS "NUBUS"
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#define BUSTYPE_TC "TC"
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#define BUSTYPE_VME "VME"
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#define BUSTYPE_XPRESS "XPRESS"
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#define MPC_APIC_USABLE 0x01
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struct mpc_ioapic {
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unsigned char type;
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unsigned char apicid;
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unsigned char apicver;
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unsigned char flags;
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unsigned int apicaddr;
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};
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struct mpc_intsrc {
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unsigned char type;
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unsigned char irqtype;
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unsigned short irqflag;
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unsigned char srcbus;
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unsigned char srcbusirq;
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unsigned char dstapic;
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unsigned char dstirq;
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};
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enum mp_irq_source_types {
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mp_INT = 0,
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mp_NMI = 1,
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mp_SMI = 2,
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mp_ExtINT = 3
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};
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#define MP_IRQPOL_DEFAULT 0x0
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#define MP_IRQPOL_ACTIVE_HIGH 0x1
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#define MP_IRQPOL_RESERVED 0x2
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#define MP_IRQPOL_ACTIVE_LOW 0x3
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#define MP_IRQPOL_MASK 0x3
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#define MP_IRQTRIG_DEFAULT 0x0
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#define MP_IRQTRIG_EDGE 0x4
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#define MP_IRQTRIG_RESERVED 0x8
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#define MP_IRQTRIG_LEVEL 0xc
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#define MP_IRQTRIG_MASK 0xc
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#define MP_APIC_ALL 0xFF
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struct mpc_lintsrc {
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unsigned char type;
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unsigned char irqtype;
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unsigned short irqflag;
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unsigned char srcbusid;
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unsigned char srcbusirq;
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unsigned char destapic;
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unsigned char destapiclint;
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};
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#define MPC_OEM_SIGNATURE "_OEM"
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struct mpc_oemtable {
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char signature[4];
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unsigned short length; /* Size of table */
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char rev; /* 0x01 */
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char checksum;
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char mpc[8];
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};
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/*
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* Default configurations
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*
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* 1 2 CPU ISA 82489DX
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* 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
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* 3 2 CPU EISA 82489DX
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* 4 2 CPU MCA 82489DX
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* 5 2 CPU ISA+PCI
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* 6 2 CPU EISA+PCI
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* 7 2 CPU MCA+PCI
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*/
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enum mp_bustype {
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MP_BUS_ISA = 1,
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MP_BUS_EISA,
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MP_BUS_PCI,
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};
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#endif /* _ASM_X86_MPSPEC_DEF_H */
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1
main.c
1
main.c
@ -98,6 +98,7 @@ int __attribute__ ((section (".text.startup"))) main(void)
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fw_cfg_setup();
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extract_acpi();
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extract_e820();
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setup_mptable();
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// extract_smbios();
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boot_from_fwcfg();
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panic();
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186
mptable.c
Normal file
186
mptable.c
Normal file
@ -0,0 +1,186 @@
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#include "include/string.h"
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#include "bios.h"
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#include "fw_cfg.h"
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#include "include/mpspec_def.h"
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#define MPTABLE_START 0x9fc00
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#define APIC_VERSION 0x14
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#define MPC_SPEC 0x4
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#define MP_IRQDIR_DEFAULT 0
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#define MP_IRQDIR_HIGH 1
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#define MP_IRQDIR_LOW 3
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static const char MPC_OEM[] = "QBOOT ";
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static const char MPC_PRODUCT_ID[] = "000000000000";
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static const char BUS_TYPE_ISA[] = "ISA ";
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#define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000
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#define APIC_DEFAULT_PHYS_BASE 0xfee00000
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#define APIC_VERSION 0x14
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static int mptable_checksum(char *buf, int size)
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{
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int i;
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int sum = 0;
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for (i = 0; i < size; i++) {
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sum += buf[i];
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}
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return sum;
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}
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static void mptable_get_cpuid(int *signature, int *features)
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{
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int ebx, ecx;
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asm("cpuid"
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: "=a" (*signature), "=b" (ebx), "=c" (ecx), "=d" (*features)
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: "0" (1));
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}
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void setup_mptable(void)
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{
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struct mpf_intel *mpf;
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struct mpc_table *table;
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struct mpc_cpu *cpu;
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struct mpc_bus *bus;
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struct mpc_ioapic *ioapic;
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struct mpc_intsrc *intsrc;
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struct mpc_lintsrc *lintsrc;
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const char mpc_signature[] = MPC_SIGNATURE;
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const char smp_magic_ident[] = "_MP_";
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int cpuid_stepping, cpuid_features;
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int irq0_override = 0;
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int checksum = 0;
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int offset = 0;
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int num_cpus;
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int ssize;
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int i;
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ssize = sizeof(struct mpf_intel);
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mpf = (struct mpf_intel *) MPTABLE_START;
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memset(mpf, 0, ssize);
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memcpy(mpf->signature, smp_magic_ident, sizeof(smp_magic_ident) - 1);
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mpf->length = 1;
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mpf->specification = 4;
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mpf->physptr = MPTABLE_START + ssize;
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mpf->checksum -= mptable_checksum((char *) mpf, ssize);
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offset += ssize;
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ssize = sizeof(struct mpc_table);
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table = (struct mpc_table *) (MPTABLE_START + offset);
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memset(table, 0, ssize);
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memcpy(table->signature, mpc_signature, sizeof(mpc_signature) - 1);
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table->spec = MPC_SPEC;
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memcpy(table->oem, MPC_OEM, sizeof(MPC_OEM) - 1);
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memcpy(table->productid, MPC_PRODUCT_ID, sizeof(MPC_PRODUCT_ID) - 1);
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table->lapic = APIC_DEFAULT_PHYS_BASE;
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offset += ssize;
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ssize = sizeof(struct mpc_cpu);
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fw_cfg_select(FW_CFG_NB_CPUS);
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num_cpus = fw_cfg_readl_le();
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mptable_get_cpuid(&cpuid_stepping, &cpuid_features);
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for (i = 0; i < num_cpus; i++) {
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cpu = (struct mpc_cpu *) (MPTABLE_START + offset);
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memset(cpu, 0, ssize);
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cpu->type = MP_PROCESSOR;
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cpu->apicid = i;
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cpu->apicver = APIC_VERSION;
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cpu->cpuflag = CPU_ENABLED;
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if (i == 0) {
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cpu->cpuflag |= CPU_BOOTPROCESSOR;
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}
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cpu->cpufeature = cpuid_stepping;
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cpu->featureflag = cpuid_features;
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checksum += mptable_checksum((char *) cpu, ssize);
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offset += ssize;
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}
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ssize = sizeof(struct mpc_bus);
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bus = (struct mpc_bus *) (MPTABLE_START + offset);
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memset(bus, 0, ssize);
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bus->type = MP_BUS;
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bus->busid = 0;
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memcpy(bus->bustype, BUS_TYPE_ISA, sizeof(BUS_TYPE_ISA) - 1);
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checksum += mptable_checksum((char *) bus, ssize);
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offset += ssize;
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ssize = sizeof(struct mpc_ioapic);
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ioapic = (struct mpc_ioapic *) (MPTABLE_START + offset);
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memset(ioapic, 0, ssize);
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ioapic->type = MP_IOAPIC;
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ioapic->apicid = num_cpus + 1;
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ioapic->apicver = APIC_VERSION;
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ioapic->flags = MPC_APIC_USABLE;
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ioapic->apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
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checksum += mptable_checksum((char *) ioapic, ssize);
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offset += ssize;
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ssize = sizeof(struct mpc_intsrc);
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fw_cfg_select(FW_CFG_IRQ0_OVERRIDE);
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irq0_override = fw_cfg_readl_le();
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for (i = 0; i < 16; i++) {
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intsrc = (struct mpc_intsrc *) (MPTABLE_START + offset);
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memset(intsrc, 0, ssize);
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intsrc->type = MP_INTSRC;
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intsrc->irqtype = mp_INT;
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intsrc->irqflag = MP_IRQDIR_DEFAULT;
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intsrc->srcbus = 0;
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intsrc->srcbusirq = i;
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intsrc->dstapic = num_cpus + 1;
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intsrc->dstirq = i;
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if (irq0_override) {
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if (i == 0) {
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intsrc->dstirq = 2;
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} else if (i == 2) {
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// Don't update offset nor checksum
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continue;
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}
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}
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checksum += mptable_checksum((char *) intsrc, ssize);
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offset += ssize;
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}
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ssize = sizeof(struct mpc_lintsrc);
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lintsrc = (struct mpc_lintsrc *) (MPTABLE_START + offset);
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memset(lintsrc, 0, ssize);
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lintsrc->type = MP_LINTSRC;
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lintsrc->irqtype = mp_ExtINT;
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lintsrc->irqflag = MP_IRQDIR_DEFAULT;
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lintsrc->srcbusid = 0;
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lintsrc->srcbusirq = 0;
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lintsrc->destapic = 0;
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lintsrc->destapiclint = 0;
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checksum += mptable_checksum((char *) lintsrc, ssize);
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offset += ssize;
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lintsrc = (struct mpc_lintsrc *) (MPTABLE_START + offset);
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lintsrc->type = MP_LINTSRC;
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lintsrc->irqtype = mp_NMI;
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lintsrc->irqflag = MP_IRQDIR_DEFAULT;
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lintsrc->srcbusid = 0;
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lintsrc->srcbusirq = 0;
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lintsrc->destapic = 0xFF;
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lintsrc->destapiclint = 1;
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checksum += mptable_checksum((char *) lintsrc, ssize);
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offset += ssize;
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ssize = sizeof(struct mpc_table);
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table->length = offset - sizeof(struct mpf_intel);
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checksum += mptable_checksum((char *) table, ssize);
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table->checksum -= checksum;
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}
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