Provide a minimal Console Terminal Block in the HWRPB so that operating
systems that depend on it can correctly initialize the console device.
This is suffucient, at least, for the BSD operating systems, but may not
be sufficient for Digital UNIX.
In addition to defining and filling out the structures, there are a couple
of other key changes:
- Redefine the a2 register passed by Qemu at start-up to also include
some configuration flags, in addition to the CPU count, and define
a flag to mirror the "-nographics" option.
- We need to initialize the HWRPB *after* initializing VGA, so that
we'll know if a VGA device is present and in which slot for filling
out the CTB.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210613210934.21143-2-thorpej@me.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Changes to make secondary CPU start-up work on NetBSD, which depends
on some specific behavior in the architecture specification:
- Change the internal swppal() function to take the new VPTPTR and
Procedure Value as explicit arguments. Adapt do_start() to the
new the new swppal() signature.
- In do_start_wait(), extract the new VPTPTR and PV from the relevant
HWRPB fields, which will have been initialized by the OS, and pass
them to swppal().
- In the SWPPAL PAL call, get the value to stuff into PV (r27) from
a4 (r20), and add a comment describing why this implementation detail
is allowed by the architecture specification.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-9-thorpej@me.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Use system-specific information to program the interrupt line register
with the interrupt mappings, which is what the SRM console does on real
hardware; some operating systems (e.g. NetBSD) use this information
rather than having interrupt mappings tables for every possible system
variation.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-7-thorpej@me.com>
[rth: Use inline not macro; fold -1 -> 0xff map into interface.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Only program a BAR as a 64-bit MEM BAR if it really is a 64-bit MEM BAR.
Fixes an issue with the CMD646 IDE controller under NetBSD.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-6-thorpej@me.com>
[rth: Combine the two tests.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Initialize the hwrpb.hwrpb.cpuid field with the primary CPU ID, not
the processor type, as per the architecture specification. Some
operating systems check and assert this.
Improve a couple of comments.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-4-thorpej@me.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
In the unaligned access exception vector, actually pass the return PC
in the exception frame. This is required in order for unaligned access
fixup handlers in the operating system to work.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-3-thorpej@me.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Don't include system headers. Instead, provide standalone definitions
and declarations of types needed and functions used by the PALcode that
are compatible with the standard Alpha / GCC ABI.
Signed-off-by: Jason Thorpe <thorpej@me.com>
Message-Id: <20210603035317.6814-2-thorpej@me.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Use a minimally populated logout frame. This is good enough to
handle probing of devices using the kernel's mcheck_expected.
Signed-off-by: Richard Henderson <rth@twiddle.net>
The Linux kernel will re-allocate all of these, tickling what appears
to be a bug in QEMU. Work around this by moving the ranges allocated
by the console so that the new ranges don't overlap.
