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hw/mips: Remove mipssim machine
The "mipssim" machine is deprecated since commit facfc943cb
("hw/mips: Mark the "mipssim" machine as deprecated"), released
in v10.0; time to remove.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20250828143800.49842-2-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
@ -1414,7 +1414,6 @@ F: tests/functional/mips*/test_tuxrun.py
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Mipssim
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R: Aleksandar Rikalo <arikalo@gmail.com>
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S: Orphan
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F: hw/mips/mipssim.c
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F: hw/net/mipsnet.c
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Fuloong 2E
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@ -6,4 +6,3 @@
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# Boards are selected by default, uncomment to keep out of the build.
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# CONFIG_MALTA=n
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# CONFIG_MIPSSIM=n
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@ -313,18 +313,6 @@ and serves as the initial engineering sample rather than a production version.
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A newer revision, A1, is now supported, and the ``ast2700a1-evb`` should
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replace the older A0 version.
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Mips ``mipssim`` machine (since 10.0)
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'''''''''''''''''''''''''''''''''''''
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Linux dropped support for this virtual machine type in kernel v3.7, and
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there does not seem to be anybody around who is still using this board
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in QEMU: Most former MIPS-related people are working on other architectures
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in their everyday job nowadays, and we are also not aware of anybody still
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using old binaries with this board (i.e. there is also no binary available
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online to check that this board did not completely bitrot yet). It is
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recommended to use another MIPS machine for future MIPS code development
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instead.
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RISC-V default machine option (since 10.0)
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''''''''''''''''''''''''''''''''''''''''''
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@ -1107,6 +1107,11 @@ were added for little endian CPUs. Big endian support was never tested
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and likely never worked. Starting with QEMU v10.1, the machines are now
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only available as little-endian machines.
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Mips ``mipssim`` machine (removed in 10.2)
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''''''''''''''''''''''''''''''''''''''''''
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Linux dropped support for this virtual machine type in kernel v3.7, and
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there was also no binary available online to use with that board.
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linux-user mode CPUs
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--------------------
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@ -12,8 +12,6 @@ machine types are emulated:
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- An ACER Pica \"pica61\". This machine needs the 64-bit emulator.
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- MIPS emulator pseudo board \"mipssim\"
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- A MIPS Magnum R4000 machine \"magnum\". This machine needs the
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64-bit emulator.
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@ -80,15 +78,6 @@ The Loongson-3 virtual platform emulation supports:
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- Both KVM and TCG supported
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The mipssim pseudo board emulation provides an environment similar to
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what the proprietary MIPS emulator uses for running Linux. It supports:
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- A range of MIPS CPUs, default is the 24Kf
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- PC style serial port
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- MIPSnet network emulation
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.. include:: cpu-models-mips.rst.inc
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.. _nanoMIPS-System-emulator:
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@ -13,13 +13,6 @@ config MALTA
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select SERIAL_MM
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select SMBUS_EEPROM
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config MIPSSIM
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bool
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default y
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depends on MIPS
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select SERIAL_MM
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select MIPSNET
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config JAZZ
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bool
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default y
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@ -8,7 +8,6 @@ mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c'))
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if 'CONFIG_TCG' in config_all_accel
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mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c'))
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mips_ss.add(when: 'CONFIG_MIPSSIM', if_true: files('mipssim.c'))
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mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c'))
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mips_ss.add(when: 'CONFIG_MIPS_BOSTON', if_true: files('boston.c'))
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endif
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@ -1,249 +0,0 @@
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/*
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* QEMU/mipssim emulation
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*
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* Emulates a very simple machine model similar to the one used by the
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* proprietary MIPS emulator.
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*
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* Copyright (c) 2007 Thiemo Seufer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/datadir.h"
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#include "system/address-spaces.h"
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#include "hw/clock.h"
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#include "hw/mips/mips.h"
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#include "hw/char/serial-mm.h"
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#include "net/net.h"
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#include "system/system.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "hw/sysbus.h"
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#include "hw/qdev-properties.h"
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#include "qemu/error-report.h"
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#include "system/qtest.h"
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#include "system/reset.h"
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#include "cpu.h"
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#define BIOS_SIZE (4 * MiB)
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static struct _loaderparams {
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int ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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} loaderparams;
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typedef struct ResetData {
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MIPSCPU *cpu;
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uint64_t vector;
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} ResetData;
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static uint64_t load_kernel(void)
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{
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uint64_t entry, kernel_high, initrd_size;
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long kernel_size;
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ram_addr_t initrd_offset;
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kernel_size = load_elf(loaderparams.kernel_filename, NULL,
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cpu_mips_kseg0_to_phys, NULL,
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&entry, NULL,
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&kernel_high, NULL,
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TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB,
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EM_MIPS, 1, 0);
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if (kernel_size < 0) {
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error_report("could not load kernel '%s': %s",
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loaderparams.kernel_filename,
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load_elf_strerror(kernel_size));
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exit(1);
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}
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/* load initrd */
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initrd_size = 0;
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initrd_offset = 0;
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if (loaderparams.initrd_filename) {
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initrd_size = get_image_size(loaderparams.initrd_filename);
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if (initrd_size > 0) {
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initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
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if (initrd_offset + initrd_size > loaderparams.ram_size) {
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error_report("memory too small for initial ram disk '%s'",
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loaderparams.initrd_filename);
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exit(1);
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}
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initrd_size = load_image_targphys(loaderparams.initrd_filename,
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initrd_offset, loaderparams.ram_size - initrd_offset);
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}
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if (initrd_size == (target_ulong) -1) {
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error_report("could not load initial ram disk '%s'",
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loaderparams.initrd_filename);
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exit(1);
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}
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}
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return entry;
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}
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static void main_cpu_reset(void *opaque)
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{
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ResetData *s = (ResetData *)opaque;
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CPUMIPSState *env = &s->cpu->env;
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cpu_reset(CPU(s->cpu));
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env->active_tc.PC = s->vector & ~(target_ulong)1;
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if (s->vector & 1) {
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env->hflags |= MIPS_HFLAG_M16;
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}
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}
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static void mipsnet_init(int base, qemu_irq irq)
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{
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DeviceState *dev;
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SysBusDevice *s;
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dev = qemu_create_nic_device("mipsnet", true, NULL);
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if (!dev) {
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return;
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}
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s = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_connect_irq(s, 0, irq);
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memory_region_add_subregion(get_system_io(),
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base,
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sysbus_mmio_get_region(s, 0));
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}
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static void
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mips_mipssim_init(MachineState *machine)
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{
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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const char *bios_name = TARGET_BIG_ENDIAN ? "mips_bios.bin"
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: "mipsel_bios.bin";
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char *filename;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *isa = g_new(MemoryRegion, 1);
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MemoryRegion *bios = g_new(MemoryRegion, 1);
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Clock *cpuclk;
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MIPSCPU *cpu;
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CPUMIPSState *env;
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ResetData *reset_info;
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int bios_size;
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cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
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#ifdef TARGET_MIPS64
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clock_set_hz(cpuclk, 6000000); /* 6 MHz */
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#else
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clock_set_hz(cpuclk, 12000000); /* 12 MHz */
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#endif
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/* Init CPUs. */
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cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk,
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TARGET_BIG_ENDIAN);
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env = &cpu->env;
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reset_info = g_new0(ResetData, 1);
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reset_info->cpu = cpu;
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reset_info->vector = env->active_tc.PC;
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qemu_register_reset(main_cpu_reset, reset_info);
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/* Allocate RAM. */
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memory_region_init_rom(bios, NULL, "mips_mipssim.bios", BIOS_SIZE,
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&error_fatal);
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memory_region_add_subregion(address_space_mem, 0, machine->ram);
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/* Map the BIOS / boot exception handler. */
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memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
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/* Load a BIOS / boot exception handler image. */
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
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machine->firmware ?: bios_name);
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if (filename) {
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bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
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g_free(filename);
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} else {
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bios_size = -1;
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}
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if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
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machine->firmware && !qtest_enabled()) {
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/* Bail out if we have neither a kernel image nor boot vector code. */
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error_report("Could not load MIPS bios '%s'", machine->firmware);
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exit(1);
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} else {
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/* We have a boot vector start address. */
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env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
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}
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if (kernel_filename) {
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loaderparams.ram_size = machine->ram_size;
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loaderparams.kernel_filename = kernel_filename;
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loaderparams.kernel_cmdline = kernel_cmdline;
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loaderparams.initrd_filename = initrd_filename;
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reset_info->vector = load_kernel();
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}
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/* Init CPU internal devices. */
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cpu_mips_irq_init_cpu(cpu);
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cpu_mips_clock_init(cpu);
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/*
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* Register 64 KB of ISA IO space at 0x1fd00000. But without interrupts
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* (except for the hardcoded serial port interrupt) -device cannot work,
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* so do not expose the ISA bus to the user.
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*/
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memory_region_init_alias(isa, NULL, "isa_mmio",
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get_system_io(), 0, 0x00010000);
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memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
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/*
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* A single 16450 sits at offset 0x3f8. It is attached to
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* MIPS CPU INT2, which is interrupt 4.
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*/
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if (serial_hd(0)) {
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DeviceState *dev = qdev_new(TYPE_SERIAL_MM);
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qdev_prop_set_chr(dev, "chardev", serial_hd(0));
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qdev_prop_set_uint8(dev, "regshift", 0);
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qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
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memory_region_add_subregion(get_system_io(), 0x3f8,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
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}
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/* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
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mipsnet_init(0x4200, env->irq[2]);
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}
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static void mips_mipssim_machine_init(MachineClass *mc)
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{
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mc->desc = "MIPS MIPSsim platform";
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mc->init = mips_mipssim_init;
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#ifdef TARGET_MIPS64
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mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
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#else
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mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
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#endif
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mc->default_ram_id = "mips_mipssim.ram";
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}
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DEFINE_MACHINE("mipssim", mips_mipssim_machine_init)
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