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tcg/mips: Remove support for O32 and N32 ABIs

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See previous commit for rationale.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20251009195210.33161-5-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
2025-10-09 21:52:07 +02:00
committed by Richard Henderson
parent 4384542a57
commit affedc6787
3 changed files with 9 additions and 60 deletions
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35
common-user/host/mips/safe-syscall.inc.S
View File

@ -30,15 +30,9 @@
* arguments being syscall arguments (also 'long').
*/
#if _MIPS_SIM == _ABIO32
/* 8 * 4 = 32 for outgoing parameters; 1 * 4 for s0 save; 1 * 4 for align. */
#define FRAME 40
#define OFS_S0 32
#else
/* 1 * 8 for s0 save; 1 * 8 for align. */
#define FRAME 16
#define OFS_S0 0
#endif
NESTED(safe_syscall_base, FRAME, ra)
@ -47,34 +41,6 @@ NESTED(safe_syscall_base, FRAME, ra)
.cfi_adjust_cfa_offset FRAME
REG_S s0, OFS_S0(sp)
.cfi_rel_offset s0, OFS_S0
#if _MIPS_SIM == _ABIO32
/*
* The syscall calling convention is nearly the same as C:
* we enter with a0 == &signal_pending
* a1 == syscall number
* a2, a3, stack == syscall arguments
* and return the result in a0
* and the syscall instruction needs
* v0 == syscall number
* a0 ... a3, stack == syscall arguments
* and returns the result in v0
* Shuffle everything around appropriately.
*/
move s0, a0 /* signal_pending pointer */
move v0, a1 /* syscall number */
move a0, a2 /* syscall arguments */
move a1, a3
lw a2, FRAME+16(sp)
lw a3, FRAME+20(sp)
lw t4, FRAME+24(sp)
lw t5, FRAME+28(sp)
lw t6, FRAME+32(sp)
lw t7, FRAME+40(sp)
sw t4, 16(sp)
sw t5, 20(sp)
sw t6, 24(sp)
sw t7, 28(sp)
#else
/*
* The syscall calling convention is nearly the same as C:
* we enter with a0 == &signal_pending
@ -95,7 +61,6 @@ NESTED(safe_syscall_base, FRAME, ra)
move a3, a5
move a4, a6
move a5, a7
#endif
/*
* This next sequence of code works in conjunction with the

8
tcg/mips/tcg-target-reg-bits.h
View File

@ -7,12 +7,10 @@
#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H
#if _MIPS_SIM == _ABIO32
# define TCG_TARGET_REG_BITS 32
#elif _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
# define TCG_TARGET_REG_BITS 64
#else
#if !defined(_MIPS_SIM) || _MIPS_SIM != _ABI64
# error "Unknown ABI"
#endif
#define TCG_TARGET_REG_BITS 64
#endif

26
tcg/mips/tcg-target.c.inc
View File

@ -26,16 +26,10 @@
/* used for function call generation */
#define TCG_TARGET_STACK_ALIGN 16
#if _MIPS_SIM == _ABIO32
# define TCG_TARGET_CALL_STACK_OFFSET 16
# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN
# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF
#else
# define TCG_TARGET_CALL_STACK_OFFSET 0
# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
#endif
#define TCG_TARGET_CALL_STACK_OFFSET 0
#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
#define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
#if TCG_TARGET_REG_BITS == 32
@ -135,12 +129,10 @@ static const TCGReg tcg_target_call_iarg_regs[] = {
TCG_REG_A1,
TCG_REG_A2,
TCG_REG_A3,
#if _MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64
TCG_REG_T0,
TCG_REG_T1,
TCG_REG_T2,
TCG_REG_T3,
#endif
};
static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot)
@ -1053,17 +1045,11 @@ static void tcg_out_call_int(TCGContext *s, const tcg_insn_unit *arg, bool tail)
* Note that __mips_abicalls requires the called function's address
* to be loaded into $25 (t9), even if a direct branch is in range.
*
* For n64, always drop the pointer into the constant pool.
* We can re-use helper addresses often and do not want any
* of the longer sequences tcg_out_movi may try.
* We can re-use helper addresses often; always drop the pointer
* into the constant pool.
*/
if (sizeof(uintptr_t) == 8) {
tcg_out_movi_pool(s, TCG_REG_T9, (uintptr_t)arg, TCG_REG_TB);
} else {
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T9, (uintptr_t)arg);
}
tcg_out_movi_pool(s, TCG_REG_T9, (uintptr_t)arg, TCG_REG_TB);
/* But do try a direct branch, allowing the cpu better insn prefetch. */
if (tail) {
if (!tcg_out_opc_jmp(s, OPC_J, arg)) {
tcg_out_opc_reg(s, OPC_JR, 0, TCG_REG_T9, 0);