refactor: Update STATE_BASE_ADDRESS

Refactors the STATE_BASE_ADDRESS to align with the latest specification.

Removes redundant functionality for multiple GPU partial writes and
atomics.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
This commit is contained in:
Vysochyn, Illia
2024-11-28 18:18:40 +00:00
committed by Compute-Runtime-Automation
parent 43201d21cc
commit 0b7367ed5f
9 changed files with 4 additions and 85 deletions

View File

@@ -358,23 +358,17 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, whenFlushi
HWCMDTEST_F(IGFX_XE_HP_CORE, XeHpCommandStreamReceiverFlushTaskTests, givenDebugKeysThatOverrideMultiGpuSettingWhenStateBaseAddressIsProgrammedThenValuesMatch) {
DebugManagerStateRestore restorer;
using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
if (commandStreamReceiver.heaplessStateInitialized) {
GTEST_SKIP();
}
debugManager.flags.ForceMultiGpuAtomics.set(0);
debugManager.flags.ForceMultiGpuPartialWrites.set(0);
flushTask(commandStreamReceiver);
HardwareParse hwParserCsr;
hwParserCsr.parseCommands<FamilyType>(commandStreamReceiver.commandStream, 0);
hwParserCsr.findHardwareCommands<FamilyType>();
ASSERT_NE(nullptr, hwParserCsr.cmdStateBaseAddress);
auto stateBaseAddress = static_cast<STATE_BASE_ADDRESS *>(hwParserCsr.cmdStateBaseAddress);
EXPECT_EQ(0u, stateBaseAddress->getDisableSupportForMultiGpuAtomicsForStatelessAccesses());
EXPECT_EQ(0u, stateBaseAddress->getDisableSupportForMultiGpuPartialWritesForStatelessMessages());
}
using StateBaseAddressXeHPAndLaterTests = XeHpCommandStreamReceiverFlushTaskTests;