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fix: write ISA memory once for simulation csr types

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Related-To: NEO-11408

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
This commit is contained in:
Mateusz Hoppe
2024-05-23 13:52:59 +00:00
committed by Compute-Runtime-Automation
parent 134702b38c
commit 11667bd853
2 changed files with 36 additions and 3 deletions
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6
level_zero/core/source/module/module_imp.cpp
View File

@@ -612,9 +612,11 @@ void ModuleImp::transferIsaSegmentsToAllocation(NEO::Device *neoDevice, const NE
moduleOffset,
isaBuffer.data(),
isaBuffer.size());
for (auto &engine : neoDevice->getAllEngines()) {
engine.commandStreamReceiver->writeMemory(*moduleAllocation);
if (neoDevice->getDefaultEngine().commandStreamReceiver->getType() != NEO::CommandStreamReceiverType::hardware) {
neoDevice->getDefaultEngine().commandStreamReceiver->writeMemory(*moduleAllocation);
}
for (auto &kernelImmData : kernelImmDatas) {
kernelImmData->setIsaCopiedToAllocation();
}

33
level_zero/core/test/unit_tests/sources/module/test_module.cpp
View File

@@ -713,7 +713,7 @@ HWTEST_F(ModuleTest, whenMultipleModulesCreatedThenModulesShareIsaAllocation) {
for (auto i = 0u; i < numModules; i++) {
modules.emplace_back(new L0::ModuleImp(device, moduleBuildLog, ModuleType::user));
modules[i]->initialize(&moduleDesc, device->getNEODevice());
EXPECT_EQ(initialWriteMemoryCount + (i + 1), ultCsr.writeMemoryParams.callCount);
EXPECT_EQ(initialWriteMemoryCount, ultCsr.writeMemoryParams.callCount);
if (i == 0) {
allocation = modules[i]->getKernelsIsaParentAllocation();
@@ -729,6 +729,37 @@ HWTEST_F(ModuleTest, whenMultipleModulesCreatedThenModulesShareIsaAllocation) {
EXPECT_EQ(allocation, modules[i]->getKernelsIsaParentAllocation());
}
}
modules.clear();
ultCsr.commandStreamReceiverType = CommandStreamReceiverType::aub;
for (auto i = 0u; i < 5; i++) {
modules.emplace_back(new L0::ModuleImp(device, moduleBuildLog, ModuleType::user));
modules[i]->initialize(&moduleDesc, device->getNEODevice());
EXPECT_EQ(initialWriteMemoryCount + i + 1, ultCsr.writeMemoryParams.callCount);
if (i == 0) {
allocation = modules[i]->getKernelsIsaParentAllocation();
}
auto &vec = modules[i]->getKernelImmutableDataVector();
auto offsetForImmData = vec[0]->getIsaOffsetInParentAllocation();
for (auto &immData : vec) {
EXPECT_EQ(offsetForImmData, immData->getIsaOffsetInParentAllocation());
offsetForImmData += immData->getIsaSubAllocationSize();
}
// Verify that all imm datas share same parent allocation
if (i != 0) {
EXPECT_EQ(allocation, modules[i]->getKernelsIsaParentAllocation());
}
}
modules.clear();
ultCsr.commandStreamReceiverType = CommandStreamReceiverType::tbx;
initialWriteMemoryCount = ultCsr.writeMemoryParams.callCount;
auto module = std::make_unique<L0::ModuleImp>(device, moduleBuildLog, ModuleType::user);
module->initialize(&moduleDesc, device->getNEODevice());
EXPECT_EQ(initialWriteMemoryCount + 1, ultCsr.writeMemoryParams.callCount);
};
template <typename T1, typename T2>