AUB patch to move physical addresses to a lower region

Ensured canonical addresses not to go beyond acceptable physical addresses.

Change-Id: I4af3b7bd3d43ee86aabfdbddd0a21bc937986d43
This commit is contained in:
Milczarek, Slawomir
2018-02-18 19:41:53 +01:00
parent 006e86d7a6
commit 28a1eec925
7 changed files with 237 additions and 13 deletions

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@@ -53,18 +53,18 @@ const uint64_t PageTableTraits<48>::physicalMemory = 0; // 1ull <<addressingBits
const uint64_t PageTableTraits<48>::numPTEntries = BIT(PageTableTraits<48>::addressingBits - PageTableTraits<48>::NUM_OFFSET_BITS);
const uint64_t PageTableTraits<48>::sizePT = BIT(PageTableTraits<48>::addressingBits - PageTableTraits<48>::NUM_OFFSET_BITS) * sizeof(uint64_t);
const uint64_t PageTableTraits<48>::ptBaseAddress = BIT(38);
const uint64_t PageTableTraits<48>::ptBaseAddress = BIT(37);
const uint64_t PageTableTraits<48>::numPDEntries = BIT(PageTableTraits<48>::addressingBits - PageTableTraits<48>::NUM_OFFSET_BITS - PageTableTraits<48>::NUM_PTE_BITS);
const uint64_t PageTableTraits<48>::sizePD = BIT(PageTableTraits<48>::addressingBits - PageTableTraits<48>::NUM_OFFSET_BITS - PageTableTraits<48>::NUM_PTE_BITS) * sizeof(uint64_t);
const uint64_t PageTableTraits<48>::pdBaseAddress = BIT(37);
const uint64_t PageTableTraits<48>::pdBaseAddress = BIT(36);
const uint64_t PageTableTraits<48>::numPDPEntries = BIT(PageTableTraits<48>::addressingBits - PageTableTraits<48>::NUM_OFFSET_BITS - PageTableTraits<48>::NUM_PTE_BITS - PageTableTraits<48>::NUM_PDE_BITS);
const uint64_t PageTableTraits<48>::sizePDP = BIT(PageTableTraits<48>::addressingBits - PageTableTraits<48>::NUM_OFFSET_BITS - PageTableTraits<48>::NUM_PTE_BITS - PageTableTraits<48>::NUM_PDE_BITS) * sizeof(uint64_t);
const uint64_t PageTableTraits<48>::pdpBaseAddress = BIT(36);
const uint64_t PageTableTraits<48>::pdpBaseAddress = BIT(35);
const uint64_t PageTableTraits<48>::numPML4Entries = BIT(NUM_PML4_BITS);
const uint64_t PageTableTraits<48>::sizePML4 = BIT(NUM_PML4_BITS) * sizeof(uint64_t);
const uint64_t PageTableTraits<48>::pml4BaseAddress = BIT(35);
const uint64_t PageTableTraits<48>::pml4BaseAddress = BIT(34);
// clang-format on
void LrcaHelper::setRingTail(void *pLRCIn, uint32_t ringTail) const {

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@@ -29,8 +29,12 @@ using OCLRT::AUBCommandStreamReceiver;
using OCLRT::AUBCommandStreamReceiverHw;
using OCLRT::EngineType;
namespace Os {
extern const char *fileSeparator;
std::string getAubFileName(const OCLRT::Device *pDevice, const std::string baseName) {
const auto pGtSystemInfo = pDevice->getHardwareInfo().pSysInfo;
std::stringstream strfilename;
strfilename << pDevice->getProductAbbrev() << "_" << pGtSystemInfo->SliceCount << "x" << pGtSystemInfo->SubSliceCount << "x" << pGtSystemInfo->MaxEuPerSubSlice << "_" << baseName;
return strfilename.str();
}
typedef Test<DeviceFixture> AubMemDumpTests;

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@@ -33,13 +33,7 @@ namespace Os {
extern const char *fileSeparator;
}
static std::string getAubFileName(const OCLRT::Device *pDevice, const std::string baseName) {
const auto pGtSystemInfo = pDevice->getHardwareInfo().pSysInfo;
std::stringstream strfilename;
strfilename << pDevice->getProductAbbrev() << "_" << pGtSystemInfo->SliceCount << "x" << pGtSystemInfo->SubSliceCount << "x" << pGtSystemInfo->MaxEuPerSubSlice << "_" << baseName;
return strfilename.str();
}
extern std::string getAubFileName(const OCLRT::Device *pDevice, const std::string baseName);
template <typename FamilyType>
void setupAUB(const OCLRT::Device *pDevice, OCLRT::EngineType engineType) {

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@@ -23,6 +23,7 @@ cmake_minimum_required(VERSION 3.2.0 FATAL_ERROR)
project(igdrcl_aub_tests)
if(TESTS_GEN9)
add_subdirectory(batch_buffer)
add_subdirectory(execution_model)
add_subdirectory(skl)
endif(TESTS_GEN9)

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@@ -0,0 +1,25 @@
# Copyright (c) 2018, Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
# OTHER DEALINGS IN THE SOFTWARE.
target_sources(igdrcl_aub_tests PUBLIC
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/aub_batch_buffer_tests.h
${CMAKE_CURRENT_SOURCE_DIR}/aub_batch_buffer_tests.cpp
)

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@@ -0,0 +1,32 @@
/*
* Copyright (c) 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "aub_batch_buffer_tests.h"
#include "unit_tests/fixtures/device_fixture.h"
typedef Test<DeviceFixture> AubBatchBufferTests;
static constexpr auto gpuBatchBufferAddr = 0x800400001000ull; // 48-bit GPU address
GEN9TEST_F(AubBatchBufferTests, givenSimpleRCSWithBatchBufferWhenItHasMSBSetInGpuAddressThenAUBShouldBeSetupSuccessfully) {
setupAUBWithBatchBuffer<FamilyType>(pDevice, OCLRT::EngineType::ENGINE_RCS, gpuBatchBufferAddr);
}

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@@ -0,0 +1,168 @@
/*
* Copyright (c) 2018, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#pragma once
#include "unit_tests/aub_tests/command_stream/aub_mem_dump_tests.h"
template <typename FamilyType>
void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType engineType, uint64_t gpuBatchBufferAddr) {
typedef typename OCLRT::AUBFamilyMapper<FamilyType>::AUB AUB;
const auto &csTraits = OCLRT::AUBCommandStreamReceiverHw<FamilyType>::getCsTraits(engineType);
auto mmioBase = csTraits.mmioBase;
uint64_t physAddress = 0x10000;
OCLRT::AUBCommandStreamReceiver::AubFileStream aubFile;
std::string filePath(OCLRT::folderAUB);
filePath.append(Os::fileSeparator);
std::string baseName("simple");
baseName.append(csTraits.name);
baseName.append("WithBatchBuffer");
baseName.append(".aub");
filePath.append(getAubFileName(pDevice, baseName));
aubFile.fileHandle.open(filePath.c_str(), std::ofstream::binary);
// Header
aubFile.init(AubMemDump::SteppingValues::A, AUB::Traits::device);
aubFile.writeMMIO(mmioBase + 0x229c, 0xffff8280);
const size_t sizeHWSP = 0x1000;
const size_t alignHWSP = 0x1000;
auto pGlobalHWStatusPage = alignedMalloc(sizeHWSP, alignHWSP);
uint32_t ggttGlobalHardwareStatusPage = (uint32_t)((uintptr_t)pGlobalHWStatusPage);
AUB::reserveAddressGGTT(aubFile, ggttGlobalHardwareStatusPage, sizeHWSP, physAddress);
physAddress += sizeHWSP;
aubFile.writeMMIO(mmioBase + 0x2080, ggttGlobalHardwareStatusPage);
using MI_NOOP = typename FamilyType::MI_NOOP;
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
using MI_BATCH_BUFFER_END = typename FamilyType::MI_BATCH_BUFFER_END;
// create a user mode batch buffer
auto physBatchBuffer = physAddress;
const auto sizeBatchBuffer = 0x1000;
auto gpuBatchBuffer = static_cast<uintptr_t>(gpuBatchBufferAddr);
physAddress += sizeBatchBuffer;
AUB::reserveAddressPPGTT(aubFile, gpuBatchBuffer, sizeBatchBuffer, physBatchBuffer);
uint8_t batchBuffer[sizeBatchBuffer];
auto noop = MI_NOOP::sInit();
uint32_t noopId = 0xbaadd;
{
auto pBatchBuffer = (void *)batchBuffer;
*(MI_NOOP *)pBatchBuffer = noop;
pBatchBuffer = ptrOffset(pBatchBuffer, sizeof(MI_NOOP));
*(MI_NOOP *)pBatchBuffer = noop;
pBatchBuffer = ptrOffset(pBatchBuffer, sizeof(MI_NOOP));
*(MI_NOOP *)pBatchBuffer = noop;
pBatchBuffer = ptrOffset(pBatchBuffer, sizeof(MI_NOOP));
noop.TheStructure.Common.IdentificationNumberRegisterWriteEnable = true;
noop.TheStructure.Common.IdentificationNumber = noopId++;
*(MI_NOOP *)pBatchBuffer = noop;
pBatchBuffer = ptrOffset(pBatchBuffer, sizeof(MI_NOOP));
*(MI_BATCH_BUFFER_END *)pBatchBuffer = MI_BATCH_BUFFER_END::sInit();
pBatchBuffer = ptrOffset(pBatchBuffer, sizeof(MI_BATCH_BUFFER_END));
auto sizeBufferUsed = ptrDiff(pBatchBuffer, batchBuffer);
AUB::addMemoryWrite(aubFile, physBatchBuffer, batchBuffer, sizeBufferUsed, AubMemDump::AddressSpaceValues::TraceNonlocal, AubMemDump::DataTypeHintValues::TraceBatchBuffer);
}
const size_t sizeRing = 0x4 * 0x1000;
const size_t alignRing = 0x1000;
size_t sizeCommands = 0;
auto pRing = alignedMalloc(sizeRing, alignRing);
auto ggttRing = (uint32_t)(uintptr_t)pRing;
auto physRing = physAddress;
physAddress += sizeRing;
auto rRing = AUB::reserveAddressGGTT(aubFile, ggttRing, sizeRing, physRing);
ASSERT_NE(static_cast<uint64_t>(-1), rRing);
EXPECT_EQ(rRing, physRing);
auto cur = (uint32_t *)pRing;
auto bbs = MI_BATCH_BUFFER_START::sInit();
bbs.setBatchBufferStartAddressGraphicsaddress472(gpuBatchBuffer);
bbs.setAddressSpaceIndicator(MI_BATCH_BUFFER_START::ADDRESS_SPACE_INDICATOR_PPGTT);
*(MI_BATCH_BUFFER_START *)cur = bbs;
cur = ptrOffset(cur, sizeof(MI_BATCH_BUFFER_START));
noop.TheStructure.Common.IdentificationNumberRegisterWriteEnable = true;
noop.TheStructure.Common.IdentificationNumber = noopId;
*cur++ = noop.TheStructure.RawData[0];
sizeCommands = ptrDiff(cur, pRing);
AUB::addMemoryWrite(aubFile, physRing, pRing, sizeCommands, AubMemDump::AddressSpaceValues::TraceNonlocal, csTraits.aubHintCommandBuffer);
auto sizeLRCA = csTraits.sizeLRCA;
auto pLRCABase = alignedMalloc(csTraits.sizeLRCA, csTraits.alignLRCA);
csTraits.initialize(pLRCABase);
csTraits.setRingHead(pLRCABase, 0x0000);
csTraits.setRingTail(pLRCABase, static_cast<uint32_t>(sizeCommands));
csTraits.setRingBase(pLRCABase, ggttRing);
auto ringCtrl = static_cast<uint32_t>((sizeRing - 0x1000) | 1);
csTraits.setRingCtrl(pLRCABase, ringCtrl);
auto ggttLRCA = static_cast<uint32_t>(reinterpret_cast<uintptr_t>(pLRCABase));
auto physLRCA = physAddress;
physAddress += sizeLRCA;
AUB::reserveAddressGGTT(aubFile, ggttLRCA, sizeLRCA, physLRCA);
AUB::addMemoryWrite(aubFile, physLRCA, pLRCABase, sizeLRCA, AubMemDump::AddressSpaceValues::TraceNonlocal, csTraits.aubHintLRCA);
typename AUB::MiContextDescriptorReg contextDescriptor = {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}};
contextDescriptor.sData.Valid = true;
contextDescriptor.sData.ForcePageDirRestore = false;
contextDescriptor.sData.ForceRestore = false;
contextDescriptor.sData.Legacy = true;
contextDescriptor.sData.FaultSupport = 0;
contextDescriptor.sData.PrivilegeAccessOrPPGTT = true;
contextDescriptor.sData.ADor64bitSupport = AUB::Traits::addressingBits > 32;
contextDescriptor.sData.LogicalRingCtxAddress = (uintptr_t)pLRCABase / 4096;
contextDescriptor.sData.ContextID = 0;
// Submit our exec-list
aubFile.writeMMIO(mmioBase + 0x2230, 0);
aubFile.writeMMIO(mmioBase + 0x2230, 0);
aubFile.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]);
aubFile.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[0]);
// Poll until HW complete
using AubMemDump::CmdServicesMemTraceRegisterPoll;
aubFile.registerPoll(
mmioBase + 0x2234, //EXECLIST_STATUS
0x100,
0x100,
false,
CmdServicesMemTraceRegisterPoll::TimeoutActionValues::Abort);
alignedFree(pRing);
alignedFree(pLRCABase);
alignedFree(pGlobalHWStatusPage);
aubFile.fileHandle.close();
}