mirror of
https://github.com/intel/compute-runtime.git
synced 2025-12-17 04:54:48 +08:00
build: enable aub test runners for xe_hpg_core
Related-To: NEO-7579 Signed-off-by: Jakub Nowacki <jakub.nowacki@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
6cb52f71b4
commit
356557f202
@@ -41,7 +41,7 @@ components:
|
||||
dest_dir: kernels_bin
|
||||
type: git
|
||||
branch: kernels_bin
|
||||
revision: 3350-3787
|
||||
revision: 3350-3794
|
||||
kmdaf:
|
||||
branch: kmdaf
|
||||
dest_dir: kmdaf
|
||||
|
||||
16
opencl/test/unit_test/test_files/simple_kernel_large_grf.cl
Normal file
16
opencl/test/unit_test/test_files/simple_kernel_large_grf.cl
Normal file
@@ -0,0 +1,16 @@
|
||||
/*
|
||||
* Copyright (C) 2025 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
__kernel void
|
||||
SimpleKernelLargeGRF(
|
||||
__global unsigned int* src,
|
||||
__global unsigned int* dst )
|
||||
{
|
||||
int id = (int)get_global_id(0);
|
||||
dst[id] = src[id] + 1;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,8 @@
|
||||
/*
|
||||
* Copyright (C) 2025 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
-cl-intel-256-GRF-per-thread
|
||||
@@ -0,0 +1,23 @@
|
||||
/*
|
||||
* Copyright (C) 2025 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
__attribute__((reqd_work_group_size(32, 1, 1))) // force LWS to 32
|
||||
__attribute__((intel_reqd_sub_group_size(16))) // force SIMD to 16
|
||||
__kernel void spillFillKernelLargeGRF(__global int *resIdx, global long16 *src, global long16 *dst){
|
||||
size_t lid = get_local_id(0);
|
||||
size_t gid = get_global_id(0);
|
||||
|
||||
long16 res1 = src[gid];
|
||||
long16 res2 = src[gid] + 1 - res1;
|
||||
long16 res3 = src[gid] + 2;
|
||||
|
||||
__local long16 locMem[16];
|
||||
locMem[lid] = res1;
|
||||
barrier(CLK_LOCAL_MEM_FENCE);
|
||||
barrier(CLK_GLOBAL_MEM_FENCE);
|
||||
dst[gid] = (locMem[resIdx[gid]]*res3) + res2;
|
||||
}
|
||||
@@ -0,0 +1,8 @@
|
||||
/*
|
||||
* Copyright (C) 2025 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
*/
|
||||
|
||||
-cl-intel-256-GRF-per-thread
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2024 Intel Corporation
|
||||
* Copyright (C) 2024-2025 Intel Corporation
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
@@ -112,13 +112,17 @@ void MulticontextAubFixture::overridePlatformConfigForAllEnginesSupport(Hardware
|
||||
|
||||
auto releaseHelper = ReleaseHelper::create(localHwInfo.ipVersion);
|
||||
|
||||
if (localHwInfo.platform.eRenderCoreFamily == IGFX_XE_HPG_CORE) {
|
||||
if (localHwInfo.platform.eRenderCoreFamily == IGFX_XE_HPG_CORE ||
|
||||
localHwInfo.platform.eRenderCoreFamily == IGFX_XE_HPC_CORE ||
|
||||
localHwInfo.platform.eRenderCoreFamily == IGFX_XE2_HPG_CORE ||
|
||||
localHwInfo.platform.eRenderCoreFamily == IGFX_XE3_CORE) {
|
||||
|
||||
setupCalled = true;
|
||||
hardwareInfoSetup[localHwInfo.platform.eProductFamily](&localHwInfo, true, 0u, releaseHelper.get());
|
||||
|
||||
#ifdef SUPPORT_DG2
|
||||
if (localHwInfo.platform.eProductFamily == IGFX_DG2) {
|
||||
ASSERT_TRUE(numberOfEnabledTiles == 1);
|
||||
setupCalled = true;
|
||||
|
||||
Dg2HwConfig::setupHardwareInfo(&localHwInfo, true, releaseHelper.get());
|
||||
|
||||
// Mock values
|
||||
localHwInfo.gtSystemInfo.SliceCount = 8;
|
||||
@@ -130,15 +134,8 @@ void MulticontextAubFixture::overridePlatformConfigForAllEnginesSupport(Hardware
|
||||
localHwInfo.gtSystemInfo.CCSInfo.Instances.CCSEnableMask = 0b1111;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if (localHwInfo.platform.eRenderCoreFamily == IGFX_XE_HPC_CORE) {
|
||||
#ifdef SUPPORT_PVC
|
||||
if (localHwInfo.platform.eProductFamily == IGFX_PVC) {
|
||||
setupCalled = true;
|
||||
|
||||
PvcHwConfig::setupHardwareInfo(&localHwInfo, true, releaseHelper.get());
|
||||
|
||||
// Mock values
|
||||
localHwInfo.gtSystemInfo.SliceCount = 8;
|
||||
localHwInfo.gtSystemInfo.SubSliceCount = 64;
|
||||
|
||||
9
target_aub_tests/xe_hpg_core/CMakeLists.txt
Normal file
9
target_aub_tests/xe_hpg_core/CMakeLists.txt
Normal file
@@ -0,0 +1,9 @@
|
||||
#
|
||||
# Copyright (C) 2025 Intel Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: MIT
|
||||
#
|
||||
|
||||
if(TESTS_XE_HPG_CORE)
|
||||
add_subdirectories()
|
||||
endif()
|
||||
10
target_aub_tests/xe_hpg_core/arl/CMakeLists.txt
Normal file
10
target_aub_tests/xe_hpg_core/arl/CMakeLists.txt
Normal file
@@ -0,0 +1,10 @@
|
||||
#
|
||||
# Copyright (C) 2025 Intel Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: MIT
|
||||
#
|
||||
|
||||
if(TESTS_ARL AND "${NEO_BITS}" STREQUAL "64")
|
||||
set(aub_test_config ${ARL_CONFIG_STR})
|
||||
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
|
||||
endif()
|
||||
10
target_aub_tests/xe_hpg_core/dg2/CMakeLists.txt
Normal file
10
target_aub_tests/xe_hpg_core/dg2/CMakeLists.txt
Normal file
@@ -0,0 +1,10 @@
|
||||
#
|
||||
# Copyright (C) 2025 Intel Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: MIT
|
||||
#
|
||||
|
||||
if(TESTS_DG2 AND "${NEO_BITS}" STREQUAL "64")
|
||||
set(aub_test_config ${DG2_CONFIG_STR})
|
||||
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
|
||||
endif()
|
||||
10
target_aub_tests/xe_hpg_core/mtl/CMakeLists.txt
Normal file
10
target_aub_tests/xe_hpg_core/mtl/CMakeLists.txt
Normal file
@@ -0,0 +1,10 @@
|
||||
#
|
||||
# Copyright (C) 2025 Intel Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: MIT
|
||||
#
|
||||
|
||||
if(TESTS_MTL AND "${NEO_BITS}" STREQUAL "64")
|
||||
set(aub_test_config ${MTL_CONFIG_STR})
|
||||
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
|
||||
endif()
|
||||
Reference in New Issue
Block a user