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Refactor mmio programming.

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Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
This commit is contained in:
Mrozek, Michal
2018-11-26 11:20:50 +01:00
committed by sys_ocldev
parent 91c4a952a7
commit 38fb8cd9c3
10 changed files with 74 additions and 68 deletions
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30
runtime/aub_mem_dump/aub_mem_dump.cpp
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@@ -55,28 +55,28 @@ const uint64_t PageTableTraits<48>::pml4BaseAddress = BIT(29);
void LrcaHelper::setRingTail(void *pLRCIn, uint32_t ringTail) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetRingRegisters + offsetRingTail);
*pLRCA++ = mmioBase + 0x2030;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2030);
*pLRCA++ = ringTail;
}
void LrcaHelper::setRingHead(void *pLRCIn, uint32_t ringHead) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetRingRegisters + offsetRingHead);
*pLRCA++ = mmioBase + 0x2034;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2034);
*pLRCA++ = ringHead;
}
void LrcaHelper::setRingBase(void *pLRCIn, uint32_t ringBase) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetRingRegisters + offsetRingBase);
*pLRCA++ = mmioBase + 0x2038;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2038);
*pLRCA++ = ringBase;
}
void LrcaHelper::setRingCtrl(void *pLRCIn, uint32_t ringCtrl) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetRingRegisters + offsetRingCtrl);
*pLRCA++ = mmioBase + 0x203c;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x203c);
*pLRCA++ = ringCtrl;
}
@@ -84,9 +84,9 @@ void LrcaHelper::setPDP0(void *pLRCIn, uint64_t address) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetPageTableRegisters + offsetPDP0);
*pLRCA++ = mmioBase + 0x2274;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2274);
*pLRCA++ = address >> 32;
*pLRCA++ = mmioBase + 0x2270;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2270);
*pLRCA++ = address & 0xffffffff;
}
@@ -94,9 +94,9 @@ void LrcaHelper::setPDP1(void *pLRCIn, uint64_t address) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetPageTableRegisters + offsetPDP1);
*pLRCA++ = mmioBase + 0x227c;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x227c);
*pLRCA++ = address >> 32;
*pLRCA++ = mmioBase + 0x2278;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2278);
*pLRCA++ = address & 0xffffffff;
}
@@ -104,9 +104,9 @@ void LrcaHelper::setPDP2(void *pLRCIn, uint64_t address) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetPageTableRegisters + offsetPDP2);
*pLRCA++ = mmioBase + 0x2284;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2284);
*pLRCA++ = address >> 32;
*pLRCA++ = mmioBase + 0x2280;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2280);
*pLRCA++ = address & 0xffffffff;
}
@@ -114,9 +114,9 @@ void LrcaHelper::setPDP3(void *pLRCIn, uint64_t address) const {
auto pLRCA = ptrOffset(reinterpret_cast<uint32_t *>(pLRCIn),
offsetContext + offsetPageTableRegisters + offsetPDP3);
*pLRCA++ = mmioBase + 0x228c;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x228c);
*pLRCA++ = address >> 32;
*pLRCA++ = mmioBase + 0x2288;
*pLRCA++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2288);
*pLRCA++ = address & 0xffffffff;
}
@@ -141,7 +141,7 @@ void LrcaHelper::initialize(void *pLRCIn) const {
uint32_t ctxSrCtlValue = 0x00010001; // Inhibit context-restore
setContextSaveRestoreFlags(ctxSrCtlValue);
while (numRegs-- > 0) {
*pLRI++ = mmioBase + 0x2244; // CTXT_SR_CTL
*pLRI++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2244); // CTXT_SR_CTL
*pLRI++ = ctxSrCtlValue;
}
@@ -151,7 +151,7 @@ void LrcaHelper::initialize(void *pLRCIn) const {
numRegs = numRegsLRI1;
*pLRI++ = 0x11001000 | (2 * numRegs - 1);
while (numRegs-- > 0) {
*pLRI++ = mmioBase + 0x20d8; // DEBUG
*pLRI++ = AubMemDump::computeRegisterOffset(mmioBase, 0x20d8); // DEBUG
*pLRI++ = 0x00200020;
}
@@ -160,7 +160,7 @@ void LrcaHelper::initialize(void *pLRCIn) const {
numRegs = numRegsLRI2;
*pLRI++ = 0x11000000 | (2 * numRegs - 1);
while (numRegs-- > 0) {
*pLRI++ = mmioBase + 0x2094; // NOP ID
*pLRI++ = AubMemDump::computeRegisterOffset(mmioBase, 0x2094); // NOP ID
*pLRI++ = 0x00000000;
}

6
runtime/aub_mem_dump/aub_mem_dump.h
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@@ -24,6 +24,12 @@ class AubHelper;
namespace AubMemDump {
#include "aub_services.h"
constexpr uint32_t rcsRegisterBase = 0x2000;
inline uint32_t computeRegisterOffset(uint32_t mmioBase, uint32_t rcsRegisterOffset) {
return mmioBase + rcsRegisterOffset - rcsRegisterBase;
}
template <typename Cmd>
inline void setAddress(Cmd &cmd, uint64_t address) {
cmd.address = address;

14
runtime/command_stream/aub_command_stream_receiver_hw.inl
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@@ -226,7 +226,7 @@ void AUBCommandStreamReceiverHw<GfxFamily>::initializeEngine(size_t engineIndex)
AubGTTData data = {0};
getGTTData(reinterpret_cast<void *>(physHWSP), data);
AUB::reserveAddressGGTT(*stream, engineInfo.ggttHWSP, sizeHWSP, physHWSP, data);
stream->writeMMIO(csTraits.mmioBase + 0x2080, engineInfo.ggttHWSP);
stream->writeMMIO(AubMemDump::computeRegisterOffset(csTraits.mmioBase, 0x2080), engineInfo.ggttHWSP);
}
// Allocate the LRCA
@@ -505,7 +505,7 @@ void AUBCommandStreamReceiverHw<GfxFamily>::submitBatchBuffer(size_t engineIndex
} else if (engineInfo.tailRingBuffer == 0) {
// Add a LRI if this is our first submission
auto lri = MI_LOAD_REGISTER_IMM::sInit();
lri.setRegisterOffset(csTraits.mmioBase + 0x2244);
lri.setRegisterOffset(AubMemDump::computeRegisterOffset(csTraits.mmioBase, 0x2244));
lri.setDataDword(0x00010000);
*(MI_LOAD_REGISTER_IMM *)pTail = lri;
pTail = ((MI_LOAD_REGISTER_IMM *)pTail) + 1;
@@ -591,10 +591,10 @@ void AUBCommandStreamReceiverHw<GfxFamily>::submitBatchBuffer(size_t engineIndex
template <typename GfxFamily>
void AUBCommandStreamReceiverHw<GfxFamily>::submitLRCA(EngineInstanceT engineInstance, const typename AUBCommandStreamReceiverHw<GfxFamily>::MiContextDescriptorReg &contextDescriptor) {
auto mmioBase = getCsTraits(engineInstance).mmioBase;
stream->writeMMIO(mmioBase + 0x2230, 0);
stream->writeMMIO(mmioBase + 0x2230, 0);
stream->writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]);
stream->writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[0]);
stream->writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
stream->writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
stream->writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[1]);
stream->writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[0]);
}
template <typename GfxFamily>
@@ -609,7 +609,7 @@ void AUBCommandStreamReceiverHw<GfxFamily>::pollForCompletion(EngineInstanceT en
auto mmioBase = getCsTraits(engineInstance).mmioBase;
bool pollNotEqual = false;
stream->registerPoll(
mmioBase + 0x2234, //EXECLIST_STATUS
AubMemDump::computeRegisterOffset(mmioBase, 0x2234), //EXECLIST_STATUS
0x100,
0x100,
pollNotEqual,

14
runtime/command_stream/tbx_command_stream_receiver_hw.inl
View File

@@ -106,7 +106,7 @@ void TbxCommandStreamReceiverHw<GfxFamily>::initializeEngine(EngineType engineTy
AubGTTData data = {0};
getGTTData(reinterpret_cast<void *>(physHWSP), data);
AUB::reserveAddressGGTT(tbxStream, engineInfo.ggttHWSP, sizeHWSP, physHWSP, data);
tbxStream.writeMMIO(mmioBase + 0x2080, engineInfo.ggttHWSP);
tbxStream.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2080), engineInfo.ggttHWSP);
}
// Allocate the LRCA
@@ -252,7 +252,7 @@ FlushStamp TbxCommandStreamReceiverHw<GfxFamily>::flush(BatchBuffer &batchBuffer
} else if (engineInfo.tailRCS == 0) {
// Add a LRI if this is our first submission
auto lri = MI_LOAD_REGISTER_IMM::sInit();
lri.setRegisterOffset(mmioBase + 0x2244);
lri.setRegisterOffset(AubMemDump::computeRegisterOffset(mmioBase, 0x2244));
lri.setDataDword(0x00010000);
*(MI_LOAD_REGISTER_IMM *)pTail = lri;
pTail = ((MI_LOAD_REGISTER_IMM *)pTail) + 1;
@@ -325,10 +325,10 @@ FlushStamp TbxCommandStreamReceiverHw<GfxFamily>::flush(BatchBuffer &batchBuffer
template <typename GfxFamily>
void TbxCommandStreamReceiverHw<GfxFamily>::submitLRCA(EngineType engineType, const MiContextDescriptorReg &contextDescriptor) {
auto mmioBase = getCsTraits(engineType).mmioBase;
tbxStream.writeMMIO(mmioBase + 0x2230, 0);
tbxStream.writeMMIO(mmioBase + 0x2230, 0);
tbxStream.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]);
tbxStream.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[0]);
tbxStream.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
tbxStream.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
tbxStream.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[1]);
tbxStream.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[0]);
}
template <typename GfxFamily>
@@ -338,7 +338,7 @@ void TbxCommandStreamReceiverHw<GfxFamily>::pollForCompletion(EngineType engineT
auto mmioBase = getCsTraits(engineType).mmioBase;
bool pollNotEqual = false;
tbxStream.registerPoll(
mmioBase + 0x2234, //EXECLIST_STATUS
AubMemDump::computeRegisterOffset(mmioBase, 0x2234), //EXECLIST_STATUS
0x100,
0x100,
pollNotEqual,

16
runtime/gen10/aub_mem_dump_gen10.cpp
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@@ -27,10 +27,10 @@ template struct AubPageTableHelper64<Traits<device, 48>>;
namespace OCLRT {
using Family = CNLFamily;
static AubMemDump::LrcaHelperRcs rcs(0x000000);
static AubMemDump::LrcaHelperBcs bcs(0x020000);
static AubMemDump::LrcaHelperVcs vcs(0x010000);
static AubMemDump::LrcaHelperVecs vecs(0x018000);
static AubMemDump::LrcaHelperRcs rcs(0x002000);
static AubMemDump::LrcaHelperBcs bcs(0x022000);
static AubMemDump::LrcaHelperVcs vcs(0x012000);
static AubMemDump::LrcaHelperVecs vecs(0x01a000);
const AubMemDump::LrcaHelper *AUBFamilyMapper<Family>::csTraits[EngineType::NUM_ENGINES] = {
&rcs,
@@ -42,7 +42,7 @@ const MMIOList AUBFamilyMapper<Family>::globalMMIO;
static const MMIOList mmioListRCS = {
MMIOPair(0x000020d8, 0x00020000),
MMIOPair(rcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(rcs.mmioBase, 0x229c), 0xffff8280),
MMIOPair(0x0000C800, 0x00000009),
MMIOPair(0x0000C804, 0x00000038),
MMIOPair(0x0000C808, 0x0000003B),
@@ -59,15 +59,15 @@ static const MMIOList mmioListRCS = {
};
static const MMIOList mmioListBCS = {
MMIOPair(bcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(bcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListVCS = {
MMIOPair(vcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(vcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListVECS = {
MMIOPair(vecs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(vecs.mmioBase, 0x229c), 0xffff8280),
};
const MMIOList *AUBFamilyMapper<Family>::perEngineMMIO[EngineType::NUM_ENGINES] = {

16
runtime/gen8/aub_mem_dump_gen8.cpp
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@@ -25,10 +25,10 @@ template struct AubPageTableHelper64<Traits<device, 48>>;
namespace OCLRT {
using Family = BDWFamily;
static AubMemDump::LrcaHelperRcs rcs(0x000000);
static AubMemDump::LrcaHelperBcs bcs(0x020000);
static AubMemDump::LrcaHelperVcs vcs(0x010000);
static AubMemDump::LrcaHelperVecs vecs(0x018000);
static AubMemDump::LrcaHelperRcs rcs(0x002000);
static AubMemDump::LrcaHelperBcs bcs(0x022000);
static AubMemDump::LrcaHelperVcs vcs(0x012000);
static AubMemDump::LrcaHelperVecs vecs(0x01a000);
const AubMemDump::LrcaHelper *AUBFamilyMapper<Family>::csTraits[EngineType::NUM_ENGINES] = {
&rcs,
@@ -40,19 +40,19 @@ const MMIOList AUBFamilyMapper<Family>::globalMMIO;
static const MMIOList mmioListRCS = {
MMIOPair(0x000020d8, 0x00020000),
MMIOPair(rcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(rcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListBCS = {
MMIOPair(bcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(bcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListVCS = {
MMIOPair(vcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(vcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListVECS = {
MMIOPair(vecs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(vecs.mmioBase, 0x229c), 0xffff8280),
};
const MMIOList *AUBFamilyMapper<Family>::perEngineMMIO[EngineType::NUM_ENGINES] = {

16
runtime/gen9/aub_mem_dump_gen9.cpp
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@@ -25,10 +25,10 @@ template struct AubPageTableHelper64<Traits<device, 48>>;
namespace OCLRT {
using Family = SKLFamily;
static AubMemDump::LrcaHelperRcs rcs(0x000000);
static AubMemDump::LrcaHelperBcs bcs(0x020000);
static AubMemDump::LrcaHelperVcs vcs(0x010000);
static AubMemDump::LrcaHelperVecs vecs(0x018000);
static AubMemDump::LrcaHelperRcs rcs(0x002000);
static AubMemDump::LrcaHelperBcs bcs(0x022000);
static AubMemDump::LrcaHelperVcs vcs(0x012000);
static AubMemDump::LrcaHelperVecs vecs(0x01a000);
const AubMemDump::LrcaHelper *AUBFamilyMapper<Family>::csTraits[EngineType::NUM_ENGINES] = {
&rcs,
@@ -40,7 +40,7 @@ const MMIOList AUBFamilyMapper<Family>::globalMMIO;
static const MMIOList mmioListRCS = {
MMIOPair(0x000020d8, 0x00020000),
MMIOPair(rcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(rcs.mmioBase, 0x229c), 0xffff8280),
MMIOPair(0x0000C800, 0x00000009),
MMIOPair(0x0000C804, 0x00000038),
MMIOPair(0x0000C808, 0x0000003B),
@@ -56,15 +56,15 @@ static const MMIOList mmioListRCS = {
};
static const MMIOList mmioListBCS = {
MMIOPair(bcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(bcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListVCS = {
MMIOPair(vcs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(vcs.mmioBase, 0x229c), 0xffff8280),
};
static const MMIOList mmioListVECS = {
MMIOPair(vecs.mmioBase + 0x229c, 0xffff8280),
MMIOPair(AubMemDump::computeRegisterOffset(vecs.mmioBase, 0x229c), 0xffff8280),
};
const MMIOList *AUBFamilyMapper<Family>::perEngineMMIO[EngineType::NUM_ENGINES] = {

2
unit_tests/aub_tests/command_stream/aub_command_stream_tests.cpp
View File

@@ -60,7 +60,7 @@ struct AUBFixture : public AUBCommandStreamFixture,
auto engineType = pCommandStreamReceiver->getOsContext().getEngineType();
auto mmioBase = AUBCommandStreamReceiverHw<FamilyType>::getCsTraits(engineType.type).mmioBase;
AUBCommandStreamFixture::expectMMIO<FamilyType>(mmioBase + 0x2094, noopId);
AUBCommandStreamFixture::expectMMIO<FamilyType>(AubMemDump::computeRegisterOffset(mmioBase, 0x2094), noopId);
}
};

14
unit_tests/aub_tests/gen10/batch_buffer/aub_batch_buffer_tests_gen10.h
View File

@@ -30,7 +30,7 @@ void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType eng
// Header
aubFile.init(AubMemDump::SteppingValues::A, AUB::Traits::device);
aubFile.writeMMIO(mmioBase + 0x229c, 0xffff8280);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x229c), 0xffff8280);
const size_t sizeHWSP = 0x1000;
const size_t alignHWSP = 0x1000;
@@ -41,7 +41,7 @@ void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType eng
AUB::reserveAddressGGTT(aubFile, ggttGlobalHardwareStatusPage, sizeHWSP, physAddress, data);
physAddress += sizeHWSP;
aubFile.writeMMIO(mmioBase + 0x2080, ggttGlobalHardwareStatusPage);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2080), ggttGlobalHardwareStatusPage);
using MI_NOOP = typename FamilyType::MI_NOOP;
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
@@ -136,15 +136,15 @@ void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType eng
contextDescriptor.sData.ContextID = 0;
// Submit our exec-list
aubFile.writeMMIO(mmioBase + 0x2230, 0);
aubFile.writeMMIO(mmioBase + 0x2230, 0);
aubFile.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]);
aubFile.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[0]);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[1]);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[0]);
// Poll until HW complete
using AubMemDump::CmdServicesMemTraceRegisterPoll;
aubFile.registerPoll(
mmioBase + 0x2234, //EXECLIST_STATUS
AubMemDump::computeRegisterOffset(mmioBase, 0x2234), //EXECLIST_STATUS
0x100,
0x100,
false,

14
unit_tests/aub_tests/gen9/batch_buffer/aub_batch_buffer_tests.h
View File

@@ -31,7 +31,7 @@ void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType eng
auto deviceId = pDevice->getHardwareInfo().capabilityTable.aubDeviceId;
aubFile.init(AubMemDump::SteppingValues::A, deviceId);
aubFile.writeMMIO(mmioBase + 0x229c, 0xffff8280);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x229c), 0xffff8280);
const size_t sizeHWSP = 0x1000;
const size_t alignHWSP = 0x1000;
@@ -42,7 +42,7 @@ void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType eng
AUB::reserveAddressGGTT(aubFile, ggttGlobalHardwareStatusPage, sizeHWSP, physAddress, data);
physAddress += sizeHWSP;
aubFile.writeMMIO(mmioBase + 0x2080, ggttGlobalHardwareStatusPage);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2080), ggttGlobalHardwareStatusPage);
using MI_NOOP = typename FamilyType::MI_NOOP;
using MI_BATCH_BUFFER_START = typename FamilyType::MI_BATCH_BUFFER_START;
@@ -137,15 +137,15 @@ void setupAUBWithBatchBuffer(const OCLRT::Device *pDevice, OCLRT::EngineType eng
contextDescriptor.sData.ContextID = 0;
// Submit our exec-list
aubFile.writeMMIO(mmioBase + 0x2230, 0);
aubFile.writeMMIO(mmioBase + 0x2230, 0);
aubFile.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[1]);
aubFile.writeMMIO(mmioBase + 0x2230, contextDescriptor.ulData[0]);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), 0);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[1]);
aubFile.writeMMIO(AubMemDump::computeRegisterOffset(mmioBase, 0x2230), contextDescriptor.ulData[0]);
// Poll until HW complete
using AubMemDump::CmdServicesMemTraceRegisterPoll;
aubFile.registerPoll(
mmioBase + 0x2234, //EXECLIST_STATUS
AubMemDump::computeRegisterOffset(mmioBase, 0x2234), //EXECLIST_STATUS
0x100,
0x100,
false,