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Whitelisted registers cleanup

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Change-Id: Ifa704f4bd7c4f0bab3fc8565103af6da07a42ba7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
This commit is contained in:
Dunajski, Bartosz
2019-08-05 08:07:29 +02:00
committed by sys_ocldev
parent e187d68f2f
commit 51888bec7e
36 changed files with 11 additions and 265 deletions
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1
runtime/device/device.h
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@@ -104,7 +104,6 @@ class Device : public BaseObject<_cl_device_id> {
PerformanceCounters *getPerformanceCounters() { return performanceCounters.get(); }
static decltype(&PerformanceCounters::create) createPerformanceCountersFunc;
PreemptionMode getPreemptionMode() const { return preemptionMode; }
MOCKABLE_VIRTUAL const WhitelistedRegisters &getWhitelistedRegisters() { return getHardwareInfo().capabilityTable.whitelistedRegisters; }
std::vector<unsigned int> simultaneousInterops;
std::string deviceExtensions;
std::string name;

1
runtime/gen11/hw_info_ehl.inl
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@@ -37,7 +37,6 @@ const PLATFORM EHL::platform = {
const RuntimeCapabilityTable EHL::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max36BitAddress, // gpuAddressSpace
83.333, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen11/hw_info_icllp.inl
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@@ -38,7 +38,6 @@ const PLATFORM ICLLP::platform = {
const RuntimeCapabilityTable ICLLP::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
83.333, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen11/hw_info_lkf.inl
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@@ -37,7 +37,6 @@ const PLATFORM LKF::platform = {
const RuntimeCapabilityTable LKF::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max36BitAddress, // gpuAddressSpace
83.333, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen8/hw_info_bdw.inl
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@@ -42,7 +42,6 @@ const PLATFORM BDW::platform = {
const RuntimeCapabilityTable BDW::capabilityTable{
{50000, 5000, 200000, true, true, true}, // kmdNotifyProperties
{false, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
80, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

6
runtime/gen9/hw_helper_gen9.cpp
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@@ -12,12 +12,6 @@
namespace NEO {
typedef SKLFamily Family;
template <>
bool HwHelperHw<Family>::setupPreemptionRegisters(HardwareInfo *pHwInfo, bool enable) {
pHwInfo->capabilityTable.whitelistedRegisters.csChicken1_0x2580 = enable;
return pHwInfo->capabilityTable.whitelistedRegisters.csChicken1_0x2580;
}
template <>
SipKernelType HwHelperHw<Family>::getSipKernelType(bool debuggingActive) {
if (!debuggingActive) {

1
runtime/gen9/hw_info_bxt.inl
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@@ -39,7 +39,6 @@ const PLATFORM BXT::platform = {
const RuntimeCapabilityTable BXT::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
52.083, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen9/hw_info_cfl.inl
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@@ -34,7 +34,6 @@ const PLATFORM CFL::platform = {
const RuntimeCapabilityTable CFL::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
83.333, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen9/hw_info_glk.inl
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@@ -34,7 +34,6 @@ const PLATFORM GLK::platform = {
const RuntimeCapabilityTable GLK::capabilityTable{
{30000, 0, 0, true, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
52.083, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen9/hw_info_kbl.inl
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@@ -34,7 +34,6 @@ const PLATFORM KBL::platform = {
const RuntimeCapabilityTable KBL::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
83.333, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

1
runtime/gen9/hw_info_skl.inl
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@@ -42,7 +42,6 @@ const PLATFORM SKL::platform = {
const RuntimeCapabilityTable SKL::capabilityTable{
{0, 0, 0, false, false, false}, // kmdNotifyProperties
{true, false}, // whitelistedRegisters
MemoryConstants::max48BitAddress, // gpuAddressSpace
83.333, // defaultProfilingTimerResolution
MemoryConstants::pageSize, // requiredPreemptionSurfaceSize

3
runtime/helpers/hw_helper.h
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@@ -33,7 +33,6 @@ class HwHelper {
virtual size_t getMaxBarrierRegisterPerSlice() const = 0;
virtual uint32_t getComputeUnitsUsedForScratch(const HardwareInfo *pHwInfo) const = 0;
virtual void setCapabilityCoherencyFlag(const HardwareInfo *pHwInfo, bool &coherencyFlag) = 0;
virtual bool setupPreemptionRegisters(HardwareInfo *pHwInfo, bool enable) = 0;
virtual void adjustDefaultEngineType(HardwareInfo *pHwInfo) = 0;
virtual void setupHardwareCapabilities(HardwareCapabilities *caps, const HardwareInfo &hwInfo) = 0;
virtual SipKernelType getSipKernelType(bool debuggingActive) = 0;
@@ -115,8 +114,6 @@ class HwHelperHw : public HwHelper {
void setCapabilityCoherencyFlag(const HardwareInfo *pHwInfo, bool &coherencyFlag) override;
bool setupPreemptionRegisters(HardwareInfo *pHwInfo, bool enable) override;
void adjustDefaultEngineType(HardwareInfo *pHwInfo) override;
void setupHardwareCapabilities(HardwareCapabilities *caps, const HardwareInfo &hwInfo) override;

5
runtime/helpers/hw_helper_base.inl
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@@ -42,11 +42,6 @@ SipKernelType HwHelperHw<Family>::getSipKernelType(bool debuggingActive) {
return SipKernelType::DbgCsr;
}
template <typename Family>
bool HwHelperHw<Family>::setupPreemptionRegisters(HardwareInfo *pHwInfo, bool enable) {
return enable;
}
template <typename Family>
size_t HwHelperHw<Family>::getMaxBarrierRegisterPerSlice() const {
return 32;

6
runtime/helpers/hw_info.h
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@@ -19,14 +19,8 @@
namespace NEO {
struct WhitelistedRegisters {
bool csChicken1_0x2580;
bool chicken0hdc_0xE5F0;
};
struct RuntimeCapabilityTable {
KmdNotifyProperties kmdNotifyProperties;
WhitelistedRegisters whitelistedRegisters;
uint64_t gpuAddressSpace;
double defaultProfilingTimerResolution;
size_t requiredPreemptionSurfaceSize;

1
runtime/os_interface/linux/hw_info_config.cpp
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@@ -151,7 +151,6 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
drm->checkPreemptionSupport();
bool preemption = drm->isPreemptionSupported();
preemption = hwHelper.setupPreemptionRegisters(outHwInfo, preemption);
PreemptionHelper::adjustDefaultPreemptionMode(outHwInfo->capabilityTable,
static_cast<bool>(outHwInfo->featureTable.ftrGpGpuMidThreadLevelPreempt) && preemption,
static_cast<bool>(outHwInfo->featureTable.ftrGpGpuThreadGroupLevelPreempt) && preemption,

1
runtime/os_interface/windows/hw_info_config.cpp
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@@ -30,7 +30,6 @@ int HwInfoConfig::configureHwInfo(const HardwareInfo *inHwInfo, HardwareInfo *ou
hwHelper.setCapabilityCoherencyFlag(outHwInfo, outHwInfo->capabilityTable.ftrSupportsCoherency);
hwHelper.setupPreemptionRegisters(outHwInfo, outHwInfo->workaroundTable.waEnablePreemptionGranularityControlByUMD);
PreemptionHelper::adjustDefaultPreemptionMode(outHwInfo->capabilityTable,
static_cast<bool>(outHwInfo->featureTable.ftrGpGpuMidThreadLevelPreempt),
static_cast<bool>(outHwInfo->featureTable.ftrGpGpuThreadGroupLevelPreempt),

4
unit_tests/command_queue/dispatch_walker_tests.cpp
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@@ -1231,9 +1231,7 @@ HWTEST_F(DispatchWalkerTest, GivenCacheFlushAfterWalkerEnabledWhenTwoWalkersForQ
HWTEST_F(DispatchWalkerTest, givenMultiDispatchWhenWhitelistedRegisterForCoherencySwitchThenDontProgramLriInTaskStream) {
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
WhitelistedRegisters registers = {0};
registers.chicken0hdc_0xE5F0 = true;
pDevice->setForceWhitelistedRegs(true, &registers);
auto &cmdStream = pCmdQ->getCS(0);
HardwareParse hwParser;

17
unit_tests/command_queue/enqueue_barrier_tests.cpp
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@@ -15,22 +15,7 @@
using namespace NEO;
struct BarrierTest : public CommandEnqueueFixture,
public ::testing::Test {
void SetUp() override {
CommandEnqueueFixture::SetUp();
WhitelistedRegisters forceRegs = {false};
if (pDevice->getPreemptionMode() != PreemptionMode::Disabled) {
forceRegs.csChicken1_0x2580 = true;
}
pDevice->setForceWhitelistedRegs(true, &forceRegs);
}
void TearDown() override {
CommandEnqueueFixture::TearDown();
}
};
using BarrierTest = Test<CommandEnqueueFixture>;
HWTEST_F(BarrierTest, givenCsrWithHigherLevelThenCommandQueueWhenEnqueueBarrierIsCalledThenCommandQueueAlignsToCsrWithoutSendingAnyCommands) {
auto pCmdQ = this->pCmdQ;

15
unit_tests/command_queue/enqueue_marker_tests.cpp
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@@ -14,20 +14,7 @@
using namespace NEO;
struct MarkerFixture : public CommandEnqueueFixture {
public:
void SetUp() override {
CommandEnqueueFixture::SetUp();
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
}
void TearDown() override {
CommandEnqueueFixture::TearDown();
}
};
typedef Test<MarkerFixture> MarkerTest;
using MarkerTest = Test<CommandEnqueueFixture>;
HWTEST_F(MarkerTest, CS_EQ_CQ_ShouldntAddPipeControl) {
typedef typename FamilyType::PIPE_CONTROL PIPE_CONTROL;

2
unit_tests/command_queue/get_size_required_tests.cpp
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@@ -28,8 +28,6 @@ struct GetSizeRequiredTest : public CommandEnqueueFixture,
usedBeforeDSH = dsh->getUsed();
usedBeforeIOH = ioh->getUsed();
usedBeforeSSH = ssh->getUsed();
WhitelistedRegisters regs = {0};
pDevice->setForceWhitelistedRegs(true, &regs);
}
void TearDown() override {

15
unit_tests/command_stream/command_stream_receiver_flush_task_1_tests.cpp
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@@ -222,8 +222,6 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, givenCsrInDefaultModeAndMidThreadP
}
HWTEST_F(CommandStreamReceiverFlushTaskTests, sameTaskLevelShouldntSendAPipeControl) {
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
// Configure the CSR to not need to submit any state or commands.
@@ -240,8 +238,7 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, sameTaskLevelShouldntSendAPipeCont
HWTEST_F(CommandStreamReceiverFlushTaskTests, givenDeviceWithThreadGroupPreemptionSupportThenDontSendMediaVfeStateIfNotDirty) {
DebugManagerStateRestore dbgRestore;
DebugManager.flags.ForcePreemptionMode.set(static_cast<int32_t>(PreemptionMode::ThreadGroup));
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
auto commandStreamReceiver = new MockCsrHw<FamilyType>(*pDevice->executionEnvironment);
pDevice->setPreemptionMode(PreemptionMode::ThreadGroup);
pDevice->resetCommandStreamReceiver(commandStreamReceiver);
@@ -621,8 +618,6 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, stateBaseAddressShouldNotBeSentIfT
}
HWTEST_F(CommandStreamReceiverFlushTaskTests, shouldntAddAnyCommandsToCQCSIfEmpty) {
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
auto usedBefore = commandStream.getUsed();
flushTask(commandStreamReceiver);
@@ -672,9 +667,6 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, flushTaskWithOnlyEnoughMemoryForPr
typedef typename FamilyType::MI_BATCH_BUFFER_START MI_BATCH_BUFFER_START;
typedef typename FamilyType::MI_BATCH_BUFFER_END MI_BATCH_BUFFER_END;
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
commandStreamReceiver.timestampPacketWriteEnabled = false;
// Force a PIPE_CONTROL through a taskLevel transition
@@ -704,9 +696,6 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, flushTaskWithOnlyEnoughMemoryForPr
typedef typename FamilyType::MI_BATCH_BUFFER_START MI_BATCH_BUFFER_START;
typedef typename FamilyType::MI_BATCH_BUFFER_END MI_BATCH_BUFFER_END;
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
commandStreamReceiver.timestampPacketWriteEnabled = false;
// Force a PIPE_CONTROL through a taskLevel transition
@@ -920,8 +909,6 @@ HWTEST_F(CommandStreamReceiverFlushTaskTests, blockingFlushTaskWithOnlyPipeContr
}
HWTEST_F(CommandStreamReceiverFlushTaskTests, FlushTaskBlockingHasPipeControlWithDCFlush) {
WhitelistedRegisters forceRegs = {0};
pDevice->setForceWhitelistedRegs(true, &forceRegs);
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
CommandQueueHw<FamilyType> commandQueue(nullptr, pDevice, 0);
configureCSRtoNonDirtyState<FamilyType>();

7
unit_tests/fixtures/preemption_fixture.cpp
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@@ -48,7 +48,7 @@ void DevicePreemptionTests::SetUp() {
ASSERT_NE(nullptr, device);
ASSERT_NE(nullptr, context);
ASSERT_NE(nullptr, cmdQ);
forceWhitelistedRegs(true);
waTable = const_cast<WorkaroundTable *>(device->getWaTable());
}
@@ -62,11 +62,6 @@ void DevicePreemptionTests::TearDown() {
device.reset();
}
void DevicePreemptionTests::forceWhitelistedRegs(bool whitelisted) {
WhitelistedRegisters forceRegs = {whitelisted};
device->setForceWhitelistedRegs(true, &forceRegs);
}
void ThreadGroupPreemptionEnqueueKernelTest::SetUp() {
dbgRestore.reset(new DebugManagerStateRestore());
DebugManager.flags.ForcePreemptionMode.set(static_cast<int32_t>(PreemptionMode::ThreadGroup));

1
unit_tests/fixtures/preemption_fixture.h
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@@ -40,7 +40,6 @@ class DevicePreemptionTests : public ::testing::Test {
public:
void SetUp() override;
void TearDown() override;
void forceWhitelistedRegs(bool whitelisted);
DevicePreemptionTests();
~DevicePreemptionTests() override;

12
unit_tests/gen11/hw_helper_tests_gen11.cpp
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@@ -23,18 +23,6 @@ GEN11TEST_F(HwHelperTestGen11, setCapabilityCoherencyFlag) {
EXPECT_TRUE(coherency);
}
GEN11TEST_F(HwHelperTestGen11, setupPreemptionRegisters) {
auto &helper = HwHelper::get(renderCoreFamily);
bool preemption = false;
preemption = helper.setupPreemptionRegisters(&hardwareInfo, preemption);
EXPECT_FALSE(preemption);
preemption = true;
preemption = helper.setupPreemptionRegisters(&hardwareInfo, preemption);
EXPECT_TRUE(preemption);
}
GEN11TEST_F(HwHelperTestGen11, adjustDefaultEngineType) {
auto engineType = hardwareInfo.capabilityTable.defaultEngineType;
auto &helper = HwHelper::get(renderCoreFamily);

5
unit_tests/gen11/test_device_caps_gen11.cpp
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@@ -61,11 +61,6 @@ GEN11TEST_F(Gen11DeviceCaps, defaultPreemptionMode) {
EXPECT_TRUE(PreemptionMode::MidThread == pDevice->getHardwareInfo().capabilityTable.defaultPreemptionMode);
}
GEN11TEST_F(Gen11DeviceCaps, whitelistedRegisters) {
EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.whitelistedRegisters.csChicken1_0x2580);
EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.whitelistedRegisters.chicken0hdc_0xE5F0);
}
GEN11TEST_F(Gen11DeviceCaps, profilingTimerResolution) {
const auto &caps = pDevice->getDeviceInfo();
EXPECT_EQ(83u, caps.outProfilingTimerResolution);

5
unit_tests/gen8/bdw/test_device_caps_bdw.cpp
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@@ -36,11 +36,6 @@ BDWTEST_F(BdwDeviceCaps, defaultPreemptionMode) {
EXPECT_TRUE(PreemptionMode::Disabled == pDevice->getHardwareInfo().capabilityTable.defaultPreemptionMode);
}
BDWTEST_F(BdwDeviceCaps, whitelistedRegister) {
EXPECT_FALSE(pDevice->getWhitelistedRegisters().csChicken1_0x2580);
EXPECT_FALSE(pDevice->getWhitelistedRegisters().chicken0hdc_0xE5F0);
}
BDWTEST_F(BdwDeviceCaps, BdwProfilingTimerResolution) {
const auto &caps = pDevice->getDeviceInfo();
EXPECT_EQ(80u, caps.outProfilingTimerResolution);

12
unit_tests/gen8/hw_helper_tests_gen8.cpp
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@@ -25,18 +25,6 @@ GEN8TEST_F(HwHelperTestGen8, setCapabilityCoherencyFlag) {
EXPECT_TRUE(coherency);
}
GEN8TEST_F(HwHelperTestGen8, setupPreemptionRegisters) {
auto &helper = HwHelper::get(renderCoreFamily);
bool preemption = false;
preemption = helper.setupPreemptionRegisters(&hardwareInfo, preemption);
EXPECT_FALSE(preemption);
preemption = true;
preemption = helper.setupPreemptionRegisters(&hardwareInfo, preemption);
EXPECT_TRUE(preemption);
}
GEN8TEST_F(HwHelperTestGen8, adjustDefaultEngineType) {
auto engineType = hardwareInfo.capabilityTable.defaultEngineType;
auto &helper = HwHelper::get(renderCoreFamily);

5
unit_tests/gen8/test_device_caps_gen8.cpp
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@@ -17,11 +17,6 @@ GEN8TEST_F(Gen8DeviceCaps, defaultPreemptionMode) {
EXPECT_TRUE(PreemptionMode::Disabled == pDevice->getHardwareInfo().capabilityTable.defaultPreemptionMode);
}
GEN8TEST_F(Gen8DeviceCaps, whitelistedRegister) {
EXPECT_FALSE(pDevice->getWhitelistedRegisters().csChicken1_0x2580);
EXPECT_FALSE(pDevice->getWhitelistedRegisters().chicken0hdc_0xE5F0);
}
GEN8TEST_F(Gen8DeviceCaps, kmdNotifyMechanism) {
EXPECT_TRUE(pDevice->getHardwareInfo().capabilityTable.kmdNotifyProperties.enableKmdNotify);
EXPECT_EQ(50000, pDevice->getHardwareInfo().capabilityTable.kmdNotifyProperties.delayKmdNotifyMicroseconds);

14
unit_tests/gen9/hw_helper_tests_gen9.cpp
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@@ -23,20 +23,6 @@ GEN9TEST_F(HwHelperTestGen9, setCapabilityCoherencyFlag) {
EXPECT_TRUE(coherency);
}
GEN9TEST_F(HwHelperTestGen9, setupPreemptionRegisters) {
auto &helper = HwHelper::get(renderCoreFamily);
bool preemption = false;
preemption = helper.setupPreemptionRegisters(&hardwareInfo, preemption);
EXPECT_FALSE(preemption);
EXPECT_FALSE(hardwareInfo.capabilityTable.whitelistedRegisters.csChicken1_0x2580);
preemption = true;
preemption = helper.setupPreemptionRegisters(&hardwareInfo, preemption);
EXPECT_TRUE(preemption);
EXPECT_TRUE(hardwareInfo.capabilityTable.whitelistedRegisters.csChicken1_0x2580);
}
GEN9TEST_F(HwHelperTestGen9, adjustDefaultEngineType) {
auto engineType = hardwareInfo.capabilityTable.defaultEngineType;
auto &helper = HwHelper::get(renderCoreFamily);

13
unit_tests/gen9/linux/CMakeLists.txt
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@@ -1,13 +0,0 @@
#
# Copyright (C) 2018 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
set(IGDRCL_SRCS_tests_gen9_linux
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/device_factory_tests_gen9.cpp
)
if(UNIX)
target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen9_linux})
endif()

36
unit_tests/gen9/linux/device_factory_tests_gen9.cpp
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@@ -1,36 +0,0 @@
/*
* Copyright (C) 2017-2019 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "unit_tests/os_interface/linux/device_factory_tests.h"
typedef DeviceFactoryLinuxTest DeviceFactoryLinuxTestSkl;
GEN9TEST_F(DeviceFactoryLinuxTestSkl, queryWhitelistedPreemptionRegister) {
pDrm->StoredPreemptionSupport =
I915_SCHEDULER_CAP_ENABLED |
I915_SCHEDULER_CAP_PRIORITY |
I915_SCHEDULER_CAP_PREEMPTION;
size_t numDevices = 0;
bool success = DeviceFactory::getDevices(numDevices, executionEnvironment);
EXPECT_TRUE(success);
EXPECT_TRUE(executionEnvironment.getHardwareInfo()->capabilityTable.whitelistedRegisters.csChicken1_0x2580);
DeviceFactory::releaseDevices();
}
GEN9TEST_F(DeviceFactoryLinuxTestSkl, queryNotWhitelistedPreemptionRegister) {
pDrm->StoredPreemptionSupport = 0;
size_t numDevices = 0;
bool success = DeviceFactory::getDevices(numDevices, executionEnvironment);
EXPECT_TRUE(success);
EXPECT_FALSE(executionEnvironment.getHardwareInfo()->capabilityTable.whitelistedRegisters.csChicken1_0x2580);
DeviceFactory::releaseDevices();
}

5
unit_tests/gen9/test_device_caps_gen9.cpp
View File

@@ -34,11 +34,6 @@ GEN9TEST_F(Gen9DeviceCaps, defaultPreemptionMode) {
EXPECT_EQ(PreemptionMode::MidThread, pDevice->getHardwareInfo().capabilityTable.defaultPreemptionMode);
}
GEN9TEST_F(Gen9DeviceCaps, whitelistedRegisters) {
EXPECT_TRUE(pDevice->getWhitelistedRegisters().csChicken1_0x2580);
EXPECT_FALSE(pDevice->getWhitelistedRegisters().chicken0hdc_0xE5F0);
}
GEN9TEST_F(Gen9DeviceCaps, compression) {
EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.ftrRenderCompressedBuffers);
EXPECT_FALSE(pDevice->getHardwareInfo().capabilityTable.ftrRenderCompressedImages);

25
unit_tests/gen9/test_preemption_gen9.cpp
View File

@@ -87,9 +87,7 @@ GEN9TEST_F(Gen9PreemptionTests, whenMidThreadPreemptionIsAvailableThenStateSipIs
GEN9TEST_F(Gen9ThreadGroupPreemptionEnqueueKernelTest, givenSecondEnqueueWithTheSamePreemptionRequestThenDontReprogramThreadGroupNoWa) {
pDevice->setPreemptionMode(PreemptionMode::ThreadGroup);
WhitelistedRegisters regs = {};
regs.csChicken1_0x2580 = true;
pDevice->setForceWhitelistedRegs(true, &regs);
const_cast<WorkaroundTable *>(pDevice->getWaTable())->waModifyVFEStateAfterGPGPUPreemption = false;
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
csr.getMemoryManager()->setForce32BitAllocations(false);
@@ -121,9 +119,7 @@ GEN9TEST_F(Gen9ThreadGroupPreemptionEnqueueKernelTest, givenSecondEnqueueWithThe
GEN9TEST_F(Gen9ThreadGroupPreemptionEnqueueKernelTest, givenSecondEnqueueWithTheSamePreemptionRequestThenDontReprogramThreadGroupWa) {
pDevice->setPreemptionMode(PreemptionMode::ThreadGroup);
WhitelistedRegisters regs = {};
regs.csChicken1_0x2580 = true;
pDevice->setForceWhitelistedRegs(true, &regs);
const_cast<WorkaroundTable *>(pDevice->getWaTable())->waModifyVFEStateAfterGPGPUPreemption = true;
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
csr.getMemoryManager()->setForce32BitAllocations(false);
@@ -212,9 +208,7 @@ GEN9TEST_F(Gen9ThreadGroupPreemptionEnqueueKernelTest, givenSecondEnqueueWithThe
GEN9TEST_F(Gen9PreemptionEnqueueKernelTest, givenValidKernelForPreemptionWhenEnqueueKernelCalledThenPassDevicePreemptionModeThreadGroup) {
pDevice->setPreemptionMode(PreemptionMode::ThreadGroup);
WhitelistedRegisters regs = {};
regs.csChicken1_0x2580 = true;
pDevice->setForceWhitelistedRegs(true, &regs);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment);
pDevice->resetCommandStreamReceiver(mockCsr);
@@ -231,9 +225,7 @@ GEN9TEST_F(Gen9PreemptionEnqueueKernelTest, givenValidKernelForPreemptionWhenEnq
GEN9TEST_F(Gen9PreemptionEnqueueKernelTest, givenValidKernelForPreemptionWhenEnqueueKernelCalledAndBlockedThenPassDevicePreemptionModeThreadGroup) {
pDevice->setPreemptionMode(PreemptionMode::ThreadGroup);
WhitelistedRegisters regs = {};
regs.csChicken1_0x2580 = true;
pDevice->setForceWhitelistedRegs(true, &regs);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment);
pDevice->resetCommandStreamReceiver(mockCsr);
@@ -257,9 +249,6 @@ GEN9TEST_F(Gen9MidThreadPreemptionEnqueueKernelTest, givenSecondEnqueueWithTheSa
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
typedef typename FamilyType::GPGPU_CSR_BASE_ADDRESS GPGPU_CSR_BASE_ADDRESS;
WhitelistedRegisters regs = {};
regs.csChicken1_0x2580 = true;
pDevice->setForceWhitelistedRegs(true, &regs);
const_cast<WorkaroundTable *>(pDevice->getWaTable())->waModifyVFEStateAfterGPGPUPreemption = false;
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
@@ -337,9 +326,6 @@ GEN9TEST_F(Gen9MidThreadPreemptionEnqueueKernelTest, givenSecondEnqueueWithTheSa
typedef typename FamilyType::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
typedef typename FamilyType::GPGPU_CSR_BASE_ADDRESS GPGPU_CSR_BASE_ADDRESS;
WhitelistedRegisters regs = {};
regs.csChicken1_0x2580 = true;
pDevice->setForceWhitelistedRegs(true, &regs);
const_cast<WorkaroundTable *>(pDevice->getWaTable())->waModifyVFEStateAfterGPGPUPreemption = true;
auto &csr = pDevice->getUltCommandStreamReceiver<FamilyType>();
@@ -439,8 +425,7 @@ GEN9TEST_F(Gen9MidThreadPreemptionEnqueueKernelTest, givenSecondEnqueueWithTheSa
GEN9TEST_F(Gen9PreemptionEnqueueKernelTest, givenDisabledPreemptionWhenEnqueueKernelCalledThenPassDisabledPreemptionMode) {
pDevice->setPreemptionMode(PreemptionMode::Disabled);
WhitelistedRegisters regs = {};
pDevice->setForceWhitelistedRegs(true, &regs);
auto mockCsr = new MockCsrHw2<FamilyType>(*pDevice->executionEnvironment);
pDevice->resetCommandStreamReceiver(mockCsr);

3
unit_tests/gen9/windows/CMakeLists.txt
View File

@@ -1,5 +1,5 @@
#
# Copyright (C) 2018 Intel Corporation
# Copyright (C) 2018-2019 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@@ -7,7 +7,6 @@
set(IGDRCL_SRCS_tests_gen9_windows
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/gmm_callbacks_tests_gen9.cpp
${CMAKE_CURRENT_SOURCE_DIR}/os_interface_tests_gen9.cpp
)
if(WIN32)
target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_gen9_windows})

32
unit_tests/gen9/windows/os_interface_tests_gen9.cpp
View File

@@ -1,32 +0,0 @@
/*
* Copyright (C) 2017-2019 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "runtime/execution_environment/execution_environment.h"
#include "runtime/platform/platform.h"
#include "test.h"
#include "unit_tests/os_interface/windows/os_interface_win_tests.h"
typedef OsInterfaceTest OsInterfaceTestSkl;
GEN9TEST_F(OsInterfaceTestSkl, askKmdIfPreemptionRegisterWhitelisted) {
size_t numDevices = 0;
ExecutionEnvironment *executionEnvironment = platformImpl->peekExecutionEnvironment();
auto hwInfo = executionEnvironment->getHardwareInfo();
bool success = DeviceFactory::getDevices(numDevices, *executionEnvironment);
EXPECT_TRUE(success);
for (size_t i = 0u; i < numDevices; i++) {
if (hwInfo[i].workaroundTable.waEnablePreemptionGranularityControlByUMD) {
EXPECT_TRUE(hwInfo[i].capabilityTable.whitelistedRegisters.csChicken1_0x2580);
} else {
EXPECT_FALSE(hwInfo[i].capabilityTable.whitelistedRegisters.csChicken1_0x2580);
}
}
DeviceFactory::releaseDevices();
}

16
unit_tests/mocks/mock_device.h
View File

@@ -49,22 +49,8 @@ class MockDevice : public Device {
preemptionMode = mode;
}
const WhitelistedRegisters &getWhitelistedRegisters() override {
if (forceWhitelistedRegs) {
return mockWhitelistedRegs;
}
return Device::getWhitelistedRegisters();
}
const WorkaroundTable *getWaTable() const override { return &mockWaTable; }
void setForceWhitelistedRegs(bool force, WhitelistedRegisters *mockRegs = nullptr) {
forceWhitelistedRegs = force;
if (mockRegs) {
mockWhitelistedRegs = *mockRegs;
}
}
void injectMemoryManager(MemoryManager *);
void setPerfCounters(PerformanceCounters *perfCounters) {
@@ -109,8 +95,6 @@ class MockDevice : public Device {
std::unique_ptr<MemoryManager> mockMemoryManager;
private:
bool forceWhitelistedRegs = false;
WhitelistedRegisters mockWhitelistedRegs = {0};
WorkaroundTable mockWaTable = {};
};