mirror of
https://github.com/intel/compute-runtime.git
synced 2025-12-19 06:24:51 +08:00
refactor: adjust code to compile with c++20
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
This commit is contained in:
committed by
Compute-Runtime-Automation
parent
a9c0199dfe
commit
5e1fa75676
@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2020-2023 Intel Corporation
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* Copyright (C) 2020-2024 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -19,7 +19,7 @@ struct Swizzles {
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ze_image_format_swizzle_t z;
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ze_image_format_swizzle_t w;
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bool operator==(const Swizzles &rhs) {
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bool operator==(const Swizzles &rhs) const {
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if (x != rhs.x)
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return false;
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if (y != rhs.y)
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2023 Intel Corporation
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* Copyright (C) 2018-2024 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -8,6 +8,7 @@
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#pragma once
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#include "shared/source/helpers/debug_helpers.h"
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#include "opencl/source/context/context.h"
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#include "opencl/source/sharings/sharing.h"
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#if __clang__
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@@ -6,6 +6,7 @@
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*/
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#pragma once
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#include "shared/source/helpers/get_info.h"
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#include "shared/source/memory_manager/allocation_properties.h"
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#include "shared/source/memory_manager/memory_manager.h"
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@@ -106,6 +106,15 @@ enum class CompareOperation : uint32_t {
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struct EncodeWalkerArgs {
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EncodeWalkerArgs() = delete;
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EncodeWalkerArgs(const KernelDescriptor &kernelDescriptor, KernelExecutionType kernelExecutionType, NEO::RequiredDispatchWalkOrder requiredDispatchWalkOrder,
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uint32_t localRegionSize, uint32_t maxFrontEndThreads, bool requiredSystemFence)
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: kernelDescriptor(kernelDescriptor),
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kernelExecutionType(kernelExecutionType),
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requiredDispatchWalkOrder(requiredDispatchWalkOrder),
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localRegionSize(localRegionSize),
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maxFrontEndThreads(maxFrontEndThreads),
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requiredSystemFence(requiredSystemFence) {}
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const KernelDescriptor &kernelDescriptor;
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KernelExecutionType kernelExecutionType = KernelExecutionType::defaultType;
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NEO::RequiredDispatchWalkOrder requiredDispatchWalkOrder = NEO::RequiredDispatchWalkOrder::none;
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@@ -361,11 +361,11 @@ void EncodeDispatchKernel<Family>::encode(CommandContainer &container, EncodeDis
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rootDeviceEnvironment);
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if (args.inOrderExecInfo) {
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EncodeDispatchKernel<Family>::setupPostSyncForInOrderExec<WalkerType>(walkerCmd, args);
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EncodeDispatchKernel<Family>::setupPostSyncForInOrderExec(walkerCmd, args);
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} else if (args.eventAddress) {
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EncodeDispatchKernel<Family>::setupPostSyncForRegularEvent<WalkerType>(walkerCmd, args);
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EncodeDispatchKernel<Family>::setupPostSyncForRegularEvent(walkerCmd, args);
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} else {
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EncodeDispatchKernel<Family>::forceComputeWalkerPostSyncFlushWithWrite<WalkerType>(walkerCmd);
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EncodeDispatchKernel<Family>::forceComputeWalkerPostSyncFlushWithWrite(walkerCmd);
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}
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if (debugManager.flags.ForceComputeWalkerPostSyncFlush.get() == 1) {
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@@ -122,18 +122,18 @@ template <typename GfxFamily, typename InterfaceDescriptorType>
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void PreemptionHelper::programInterfaceDescriptorDataPreemption(InterfaceDescriptorType *idd, PreemptionMode preemptionMode) {}
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template <typename GfxFamily>
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constexpr uint32_t PreemptionConfig<GfxFamily>::mmioAddress = 0x2580;
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const uint32_t PreemptionConfig<GfxFamily>::mmioAddress = 0x2580;
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template <typename GfxFamily>
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constexpr uint32_t PreemptionConfig<GfxFamily>::mask = ((1 << 1) | (1 << 2)) << 16;
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const uint32_t PreemptionConfig<GfxFamily>::mask = ((1 << 1) | (1 << 2)) << 16;
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template <typename GfxFamily>
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constexpr uint32_t PreemptionConfig<GfxFamily>::threadGroupVal = (1 << 1);
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const uint32_t PreemptionConfig<GfxFamily>::threadGroupVal = (1 << 1);
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template <typename GfxFamily>
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constexpr uint32_t PreemptionConfig<GfxFamily>::cmdLevelVal = (1 << 2);
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const uint32_t PreemptionConfig<GfxFamily>::cmdLevelVal = (1 << 2);
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template <typename GfxFamily>
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constexpr uint32_t PreemptionConfig<GfxFamily>::midThreadVal = 0;
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const uint32_t PreemptionConfig<GfxFamily>::midThreadVal = 0;
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} // namespace NEO
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@@ -7,6 +7,7 @@
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#pragma once
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#include "shared/source/commands/bxml_generator_glue.h"
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#include "shared/source/helpers/common_types.h"
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#include "shared/source/helpers/debug_helpers.h"
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#include <cstring>
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@@ -5572,7 +5572,7 @@ struct L3_CONTROL {
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};
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STATIC_ASSERT(28 == sizeof(L3_CONTROL));
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STATIC_ASSERT(std::is_pod<L3_CONTROL>::value);
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STATIC_ASSERT(NEO::TypeTraits::isPodV<L3_CONTROL>);
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typedef struct tagXY_BLOCK_COPY_BLT {
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union tagTheStructure {
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@@ -5102,7 +5102,7 @@ typedef struct tag_3DSTATE_BTD {
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}
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} _3DSTATE_BTD;
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STATIC_ASSERT(24 == sizeof(_3DSTATE_BTD));
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STATIC_ASSERT(std::is_pod<_3DSTATE_BTD>::value); // patched
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STATIC_ASSERT(NEO::TypeTraits::isPodV<_3DSTATE_BTD>); // patched
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typedef struct tagGRF {
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union tagTheStructure {
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@@ -5096,7 +5096,7 @@ typedef struct tag_3DSTATE_BTD {
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}
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} _3DSTATE_BTD;
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STATIC_ASSERT(24 == sizeof(_3DSTATE_BTD));
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STATIC_ASSERT(std::is_pod<_3DSTATE_BTD>::value); // patched
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STATIC_ASSERT(NEO::TypeTraits::isPodV<_3DSTATE_BTD>); // patched
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typedef struct tagGRF {
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union tagTheStructure {
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@@ -5074,7 +5074,7 @@ typedef struct tag_3DSTATE_BTD {
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}
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} _3DSTATE_BTD;
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STATIC_ASSERT(24 == sizeof(_3DSTATE_BTD));
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STATIC_ASSERT(std::is_pod<_3DSTATE_BTD>::value);
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STATIC_ASSERT(NEO::TypeTraits::isPodV<_3DSTATE_BTD>);
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typedef struct tagGRF {
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union tagTheStructure {
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@@ -4827,7 +4827,7 @@ typedef struct tag_3DSTATE_BTD {
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}
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} _3DSTATE_BTD;
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STATIC_ASSERT(24 == sizeof(_3DSTATE_BTD));
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STATIC_ASSERT(std::is_pod<_3DSTATE_BTD>::value);
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STATIC_ASSERT(NEO::TypeTraits::isPodV<_3DSTATE_BTD>);
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typedef struct tagGRF {
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union tagTheStructure {
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@@ -7149,7 +7149,7 @@ struct L3_CONTROL {
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}
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};
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STATIC_ASSERT(20 == sizeof(L3_CONTROL));
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STATIC_ASSERT(std::is_pod<L3_CONTROL>::value);
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STATIC_ASSERT(NEO::TypeTraits::isPodV<L3_CONTROL>);
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typedef struct tagSTATE_SIP {
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union tagTheStructure {
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@@ -10,6 +10,7 @@
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#include <cstdint>
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#include <memory>
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#include <type_traits>
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#include <vector>
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namespace NEO {
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@@ -98,4 +99,8 @@ namespace InterruptId {
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static constexpr uint32_t notUsed = std::numeric_limits<uint32_t>::max();
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}
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namespace TypeTraits {
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template <typename T>
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constexpr bool isPodV = std::is_standard_layout_v<T> && std::is_trivial_v<T> && std::is_trivially_copyable_v<T>;
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}
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} // namespace NEO
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@@ -36,7 +36,7 @@ struct DeviceAotInfo {
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std::vector<NEO::ConstStringRef> deviceAcronyms{};
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std::vector<NEO::ConstStringRef> rtlIdAcronyms{};
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bool operator==(const DeviceAotInfo &rhs) {
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bool operator==(const DeviceAotInfo &rhs) const {
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return aotConfig.value == rhs.aotConfig.value && family == rhs.family && release == rhs.release && hwInfo == rhs.hwInfo;
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}
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};
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@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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* Copyright (C) 2018-2024 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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@@ -7,6 +7,7 @@
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#pragma once
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#include "shared/source/helpers/common_types.h"
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#include "shared/source/helpers/debug_helpers.h"
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#include <cstddef>
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@@ -15,7 +16,7 @@
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template <typename T>
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struct Vec3 {
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static_assert(std::is_pod<T>::value);
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static_assert(NEO::TypeTraits::isPodV<T>);
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Vec3(T x, T y, T z) : x(x), y(y), z(z) {}
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Vec3(const Vec3 &v) : x(v.x), y(v.y), z(v.z) {}
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@@ -7,6 +7,7 @@
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#pragma once
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#include "shared/source/commands/bxml_generator_glue.h"
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#include "shared/source/helpers/common_types.h"
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#include "shared/source/helpers/debug_helpers.h"
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#include <cstring>
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@@ -7,6 +7,7 @@
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#pragma once
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#include "shared/source/commands/bxml_generator_glue.h"
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#include "shared/source/helpers/common_types.h"
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#include "shared/source/helpers/debug_helpers.h"
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#include <cstdint>
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@@ -8,6 +8,7 @@
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#pragma once
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#include "shared/source/commands/bxml_generator_glue.h"
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#include "shared/source/helpers/common_types.h"
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#include "shared/source/helpers/debug_helpers.h"
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#include "shared/source/xe_hpc_core/hw_info.h"
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@@ -7,6 +7,7 @@
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#pragma once
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#include "shared/source/commands/bxml_generator_glue.h"
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#include "shared/source/helpers/common_types.h"
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#include "shared/source/helpers/debug_helpers.h"
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#include "shared/source/xe_hpg_core/hw_info.h"
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@@ -8,7 +8,6 @@ target_sources(neo_libult_common PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
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${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_3d_state_btd.inl
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${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_base.inl
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${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_base_mi_arb.inl
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${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_compute_mi_arb.inl
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${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_compute_mode.inl
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${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_compute_walker.inl
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@@ -1,16 +0,0 @@
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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template <>
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MI_ARB_CHECK *genCmdCast<MI_ARB_CHECK *>(void *buffer) {
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auto pCmd = reinterpret_cast<MI_ARB_CHECK *>(buffer);
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return MI_ARB_CHECK::MI_INSTRUCTION_TYPE_MI_INSTRUCTION == pCmd->TheStructure.Common.MiInstructionType &&
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MI_ARB_CHECK::MI_INSTRUCTION_OPCODE_MI_ARB_CHECK == pCmd->TheStructure.Common.MiInstructionOpcode
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? pCmd
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: nullptr;
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}
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@@ -1,10 +1,13 @@
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/*
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* Copyright (C) 2021 Intel Corporation
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* Copyright (C) 2021-2024 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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using namespace NEO;
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using MI_ARB_CHECK = GenStruct::MI_ARB_CHECK;
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template <>
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MI_ARB_CHECK *genCmdCast<MI_ARB_CHECK *>(void *buffer) {
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auto pCmd = reinterpret_cast<MI_ARB_CHECK *>(buffer);
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@@ -1,10 +1,12 @@
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/*
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* Copyright (C) 2019-2021 Intel Corporation
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* Copyright (C) 2019-2024 Intel Corporation
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*
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* SPDX-License-Identifier: MIT
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*
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*/
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using namespace NEO;
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using MI_ARB_CHECK = GenStruct::MI_ARB_CHECK;
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template <>
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MI_ARB_CHECK *genCmdCast<MI_ARB_CHECK *>(void *buffer) {
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auto pCmd = reinterpret_cast<MI_ARB_CHECK *>(buffer);
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@@ -7,7 +7,6 @@
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#include "shared/test/common/cmd_parse/cmd_parse_3d_state_btd.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_base.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_compute_mi_arb.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_compute_mode.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_compute_walker.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_sip.inl"
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@@ -6,6 +6,7 @@
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*/
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#include "shared/source/gen12lp/hw_cmds_base.h"
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using GenStruct = NEO::Gen12Lp;
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using GenGfxFamily = NEO::Gen12LpFamily;
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@@ -127,6 +128,7 @@ const char *CmdParse<GenGfxFamily>::getCommandNameHwSpecific(void *cmd) {
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template struct CmdParse<GenGfxFamily>;
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namespace NEO {
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template void HardwareParse::findHardwareCommands<Gen12LpFamily>();
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template void HardwareParse::findHardwareCommands<Gen12LpFamily>(IndirectHeap *);
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template const void *HardwareParse::getStatelessArgumentPointer<Gen12LpFamily>(const KernelInfo &kernelInfo, uint32_t indexArg, IndirectHeap &ioh, uint32_t rootDeviceIndex);
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@@ -74,7 +74,7 @@ const char *CmdParse<GenGfxFamily>::getAdditionalCommandName(void *cmd) {
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return "UNKNOWN";
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}
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#include "shared/test/common/cmd_parse/cmd_parse_compute_mi_arb.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_xe_hpg_and_later.inl"
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#include "shared/test/common/cmd_parse/hw_parse.h"
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#include "shared/test/common/cmd_parse/hw_parse_base.inl"
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@@ -65,7 +65,7 @@ const char *CmdParse<GenGfxFamily>::getAdditionalCommandName(void *cmd) {
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return "UNKNOWN";
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}
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#include "shared/test/common/cmd_parse/cmd_parse_compute_mi_arb.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_xe_hpg_and_later.inl"
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#include "shared/test/common/cmd_parse/hw_parse.h"
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#include "shared/test/common/cmd_parse/hw_parse_base.inl"
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@@ -52,7 +52,7 @@ const char *CmdParse<GenGfxFamily>::getAdditionalCommandName(void *cmd) {
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return "UNKNOWN";
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}
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#include "shared/test/common/cmd_parse/cmd_parse_compute_mi_arb.inl"
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#include "shared/test/common/cmd_parse/cmd_parse_xe_hpg_and_later.inl"
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#include "shared/test/common/cmd_parse/hw_parse_base.inl"
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#include "shared/test/common/cmd_parse/hw_parse_xe_hpg_and_later.inl"
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@@ -6,6 +6,7 @@
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*/
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#include "shared/source/aub_mem_dump/page_table_entry_bits.h"
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#include "shared/source/command_stream/aub_command_stream_receiver_hw.h"
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#include "shared/source/gmm_helper/client_context/gmm_client_context.h"
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#include "shared/source/gmm_helper/gmm_helper.h"
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#include "shared/source/gmm_helper/resource_info.h"
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