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Add support for adlp in opensource

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Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com
This commit is contained in:
Katarzyna Cencelewska
2021-07-28 14:45:43 +00:00
committed by Compute-Runtime-Automation
parent 2cc11f2199
commit 5f491ed22b
50 changed files with 1074 additions and 38 deletions
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9
shared/source/gen12lp/CMakeLists.txt
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@@ -8,14 +8,23 @@ if(SUPPORT_DG1)
set(SHARED_SRCS_ADDITIONAL_FILES_GEN12LP
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/helpers_gen12lp_dg1.cpp
${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.h
${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.inl
)
else()
set(SHARED_SRCS_ADDITIONAL_FILES_GEN12LP
${CMAKE_CURRENT_SOURCE_DIR}${BRANCH_DIR_SUFFIX}/helpers_gen12lp.cpp
${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.h
${CMAKE_CURRENT_SOURCE_DIR}/helpers_gen12lp.inl
)
endif()
set_property(GLOBAL PROPERTY SHARED_SRCS_ADDITIONAL_FILES_GEN12LP ${SHARED_SRCS_ADDITIONAL_FILES_GEN12LP})
if(SUPPORT_ADLP)
set(HW_DEFINITIONS_ADLP
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/definitions${BRANCH_DIR_SUFFIX}/hw_cmds_adlp.inl
)
set_property(GLOBAL APPEND PROPERTY CORE_SRCS_GENX_ALL_BASE ${HW_DEFINITIONS_ADLP})
endif()
add_subdirectories()

6
shared/source/gen12lp/definitions/hw_cmds_adlp.inl Normal file
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@@ -0,0 +1,6 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/

3
shared/source/gen12lp/enable_gen12lp.cpp
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@@ -24,4 +24,7 @@ static EnableGfxProductHw<IGFX_ROCKETLAKE> enableGfxProductHwRKL;
#ifdef SUPPORT_ADLS
static EnableGfxProductHw<IGFX_ALDERLAKE_S> enableGfxProductHwADLS;
#endif
#ifdef SUPPORT_ADLP
static EnableGfxProductHw<IGFX_ALDERLAKE_P> enableGfxProductHwADLP;
#endif
} // namespace NEO

15
shared/source/gen12lp/enable_hw_info_config_adlp.cpp Normal file
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@@ -0,0 +1,15 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen12lp/hw_cmds.h"
#include "shared/source/os_interface/hw_info_config.h"
namespace NEO {
static EnableProductHwInfoConfig<IGFX_ALDERLAKE_P> enableADLP;
} // namespace NEO

6
shared/source/gen12lp/helpers_gen12lp.cpp
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@@ -8,7 +8,7 @@
#include "shared/source/gen12lp/helpers_gen12lp.h"
#include "shared/source/command_stream/command_stream_receiver.h"
#include "shared/source/helpers/hw_helper.h"
#include "shared/source/gen12lp/helpers_gen12lp.inl"
#include "opencl/source/helpers/hardware_commands_helper.h"
@@ -45,10 +45,6 @@ uint64_t getPPGTTAdditionalBits(GraphicsAllocation *graphicsAllocation) {
void adjustAubGTTData(const CommandStreamReceiver &commandStreamReceiver, AubGTTData &data) {}
void setAdditionalPipelineSelectFields(void *pipelineSelectCmd,
const PipelineSelectArgs &pipelineSelectArgs,
const HardwareInfo &hwInfo) {}
bool isOffsetToSkipSetFFIDGPWARequired(const HardwareInfo &hwInfo) {
HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily);
return hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo);

28
shared/source/gen12lp/helpers_gen12lp.inl Normal file
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@@ -0,0 +1,28 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/hw_helper.h"
#include "shared/source/helpers/pipeline_select_helper.h"
namespace NEO {
namespace Gen12LPHelpers {
void setAdditionalPipelineSelectFields(void *pipelineSelectCmd,
const PipelineSelectArgs &pipelineSelectArgs,
const HardwareInfo &hwInfo) {
using PIPELINE_SELECT = typename TGLLPFamily::PIPELINE_SELECT;
auto pipelineSelectTglplpCmd = reinterpret_cast<PIPELINE_SELECT *>(pipelineSelectCmd);
auto mask = pipelineSelectTglplpCmd->getMaskBits();
if (hwInfo.platform.eProductFamily == IGFX_ALDERLAKE_P) {
mask |= pipelineSelectSystolicModeEnableMaskBits;
pipelineSelectTglplpCmd->setMaskBits(mask);
pipelineSelectTglplpCmd->setSpecialModeEnable(pipelineSelectArgs.specialPipelineSelectMode);
}
}
} // namespace Gen12LPHelpers
} // namespace NEO

6
shared/source/gen12lp/helpers_gen12lp_dg1.cpp
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@@ -8,7 +8,7 @@
#include "shared/source/aub_mem_dump/page_table_entry_bits.h"
#include "shared/source/command_stream/command_stream_receiver.h"
#include "shared/source/gen12lp/helpers_gen12lp.h"
#include "shared/source/helpers/hw_helper.h"
#include "shared/source/gen12lp/helpers_gen12lp.inl"
#include "opencl/source/command_stream/command_stream_receiver_simulated_common_hw.h"
@@ -70,10 +70,6 @@ void adjustAubGTTData(const CommandStreamReceiver &commandStreamReceiver, AubGTT
data.localMemory = commandStreamReceiver.isLocalMemoryEnabled();
}
void setAdditionalPipelineSelectFields(void *pipelineSelectCmd,
const PipelineSelectArgs &pipelineSelectArgs,
const HardwareInfo &hwInfo) {}
bool isOffsetToSkipSetFFIDGPWARequired(const HardwareInfo &hwInfo) {
HwHelper &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily);
return hwHelper.isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo);

5
shared/source/gen12lp/hw_cmds.h
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2020 Intel Corporation
* Copyright (C) 2019-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -19,3 +19,6 @@
#ifdef SUPPORT_ADLS
#include "hw_cmds_adls.h"
#endif
#ifdef SUPPORT_ADLP
#include "hw_cmds_adlp.h"
#endif

37
shared/source/gen12lp/hw_cmds_adlp.h Normal file
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@@ -0,0 +1,37 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/gen12lp/hw_cmds_base.h"
namespace NEO {
struct ADLP : public TGLLPFamily {
static const PLATFORM platform;
static const HardwareInfo hwInfo;
static const uint64_t defaultHardwareInfoConfig;
static FeatureTable featureTable;
static WorkaroundTable workaroundTable;
static const uint32_t threadsPerEu = 7;
static const uint32_t maxEuPerSubslice = 16;
static const uint32_t maxSlicesSupported = 1;
static const uint32_t maxSubslicesSupported = 6;
static const uint32_t maxDualSubslicesSupported = 12;
static const RuntimeCapabilityTable capabilityTable;
static void (*setupHardwareInfo)(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable, uint64_t hwInfoConfig);
static void setupFeatureAndWorkaroundTable(HardwareInfo *hwInfo);
};
class ADLP_CONFIG : public ADLP {
public:
static void setupHardwareInfo(HardwareInfo *hwInfo, bool setupFeatureTableAndWorkaroundTable);
static const HardwareInfo hwInfo;
private:
static GT_SYSTEM_INFO gtSystemInfo;
};
#include "hw_cmds_adlp.inl"
} // namespace NEO

6
shared/source/gen12lp/hw_helper_gen12lp.cpp
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@@ -94,7 +94,8 @@ uint32_t HwHelperHw<Family>::getHwRevIdFromStepping(uint32_t stepping, const Har
case REVISION_C:
return 0x4;
}
} else if (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) {
} else if ((hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) ||
(hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_P)) {
switch (stepping) {
case REVISION_A0:
return 0x0;
@@ -125,7 +126,8 @@ uint32_t HwHelperHw<Family>::getSteppingFromHwRevId(const HardwareInfo &hwInfo)
case 0x4:
return REVISION_C;
}
} else if (hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) {
} else if ((hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_S) ||
(hwInfo.platform.eProductFamily == PRODUCT_FAMILY::IGFX_ALDERLAKE_P)) {
switch (hwInfo.platform.usRevId) {
case 0x0:
return REVISION_A0;

5
shared/source/gen12lp/hw_info.h
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2019-2020 Intel Corporation
* Copyright (C) 2019-2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -18,3 +18,6 @@
#ifdef SUPPORT_ADLS
#include "hw_info_adls.h"
#endif
#ifdef SUPPORT_ADLP
#include "hw_info_adlp.h"
#endif

23
shared/source/gen12lp/hw_info_adlp.h Normal file
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@@ -0,0 +1,23 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/gen12lp/hw_info_gen12lp.h"
namespace NEO {
struct ADLP;
template <>
struct HwMapper<IGFX_ALDERLAKE_P> {
enum { gfxFamily = IGFX_GEN12LP_CORE };
static const char *abbreviation;
using GfxFamily = GfxFamilyMapper<static_cast<GFXCORE_FAMILY>(gfxFamily)>::GfxFamily;
using GfxProduct = ADLP;
};
} // namespace NEO

35
shared/source/gen12lp/linux/hw_info_config_adlp.cpp Normal file
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@@ -0,0 +1,35 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen12lp/helpers_gen12lp.h"
#include "shared/source/os_interface/hw_info_config.h"
#include "shared/source/os_interface/hw_info_config.inl"
#include "shared/source/os_interface/hw_info_config_bdw_and_later.inl"
namespace NEO {
template <>
void HwInfoConfigHw<IGFX_ALDERLAKE_P>::adjustPlatformForProductFamily(HardwareInfo *hwInfo) {
PLATFORM *platform = &hwInfo->platform;
platform->eRenderCoreFamily = IGFX_GEN12LP_CORE;
platform->eDisplayCoreFamily = IGFX_GEN12LP_CORE;
}
template <>
int HwInfoConfigHw<IGFX_ALDERLAKE_P>::configureHardwareCustom(HardwareInfo *hwInfo, OSInterface *osIface) {
GT_SYSTEM_INFO *gtSystemInfo = &hwInfo->gtSystemInfo;
gtSystemInfo->SliceCount = 1;
HwHelper &hwHelper = HwHelper::get(hwInfo->platform.eRenderCoreFamily);
hwInfo->featureTable.ftrGpGpuMidThreadLevelPreempt = (hwInfo->platform.usRevId >= hwHelper.getHwRevIdFromStepping(REVISION_B, *hwInfo));
enableBlitterOperationsSupport(hwInfo);
return 0;
}
template class HwInfoConfigHw<IGFX_ALDERLAKE_P>;
} // namespace NEO

24
shared/source/gen12lp/windows/hw_info_config_adlp.cpp Normal file
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@@ -0,0 +1,24 @@
/*
* Copyright (C) 2021 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/helpers/hw_info.h"
#include "shared/source/os_interface/hw_info_config.h"
#include "shared/source/os_interface/hw_info_config.inl"
#include "shared/source/os_interface/hw_info_config_bdw_and_later.inl"
namespace NEO {
template <>
void HwInfoConfigHw<IGFX_ALDERLAKE_P>::adjustPlatformForProductFamily(HardwareInfo *hwInfo) {
PLATFORM *platform = &hwInfo->platform;
platform->eRenderCoreFamily = IGFX_GEN12LP_CORE;
platform->eDisplayCoreFamily = IGFX_GEN12LP_CORE;
}
template class HwInfoConfigHw<IGFX_ALDERLAKE_P>;
} // namespace NEO