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Fix direct submission tests

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Related-To: NEO-6244

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This commit is contained in:
Zbigniew Zdanowicz
2021-10-13 16:31:18 +00:00
committed by Compute-Runtime-Automation
parent 2fb8edb69f
commit 618bf69f2e
3 changed files with 92 additions and 73 deletions
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65
shared/test/unit_test/direct_submission/direct_submission_tests_1.cpp
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@@ -1270,68 +1270,3 @@ HWTEST_F(DirectSubmissionTest,
EXPECT_EQ(expectedVfprintfCall, NEO::IoFunctions::mockVfptrinfCalled);
EXPECT_EQ(2u, NEO::IoFunctions::mockFcloseCalled);
}
HWCMDTEST_F(IGFX_GEN12_CORE, DirectSubmissionDispatchBufferTest,
givenDirectSubmissionInPartitionModeWhenDispatchingCommandBufferThenExpectDispatchPartitonedPipeControlInCommandBuffer) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
using POST_SYNC_OPERATION = typename FamilyType::PIPE_CONTROL::POST_SYNC_OPERATION;
FlushStampTracker flushStamp(true);
MockDirectSubmissionHw<FamilyType, RenderDispatcher<FamilyType>> directSubmission(*pDevice,
*osContext.get());
directSubmission.disableMonitorFence = false;
directSubmission.partitionedMode = true;
bool ret = directSubmission.initialize(true);
EXPECT_TRUE(ret);
EXPECT_NE(0x0u, directSubmission.ringCommandStream.getUsed());
GraphicsAllocation *oldRingAllocation = directSubmission.ringCommandStream.getGraphicsAllocation();
EXPECT_EQ(0u, directSubmission.semaphoreData->QueueWorkCount);
EXPECT_EQ(1u, directSubmission.currentQueueWorkCount);
EXPECT_EQ(1u, directSubmission.submitCount);
size_t submitSize = RenderDispatcher<FamilyType>::getSizePreemption() +
directSubmission.getSizeSemaphoreSection();
EXPECT_EQ(submitSize, directSubmission.submitSize);
EXPECT_EQ(oldRingAllocation->getGpuAddress(), directSubmission.submitGpuAddress);
EXPECT_EQ(1u, directSubmission.handleResidencyCount);
directSubmission.ringCommandStream.getSpace(directSubmission.ringCommandStream.getAvailableSpace() -
directSubmission.getSizeSwitchRingBufferSection());
directSubmission.tagValueSetValue = 0x4343123ull;
directSubmission.tagAddressSetValue = 0xBEEF00000ull;
ret = directSubmission.dispatchCommandBuffer(batchBuffer, flushStamp);
EXPECT_TRUE(ret);
EXPECT_NE(oldRingAllocation, directSubmission.ringCommandStream.getGraphicsAllocation());
EXPECT_EQ(1u, directSubmission.semaphoreData->QueueWorkCount);
EXPECT_EQ(2u, directSubmission.currentQueueWorkCount);
EXPECT_EQ(1u, directSubmission.submitCount);
EXPECT_EQ(2u, directSubmission.handleResidencyCount);
EXPECT_EQ(directSubmission.getSizeDispatch(), directSubmission.ringCommandStream.getUsed());
EXPECT_TRUE(directSubmission.ringStart);
HardwareParse hwParse;
hwParse.parsePipeControl = true;
hwParse.parseCommands<FamilyType>(directSubmission.ringCommandStream, 0);
hwParse.findHardwareCommands<FamilyType>();
bool foundFenceUpdate = false;
for (auto &it : hwParse.pipeControlList) {
PIPE_CONTROL *pipeControl = reinterpret_cast<PIPE_CONTROL *>(it);
if (pipeControl->getPostSyncOperation() == POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA) {
foundFenceUpdate = true;
uint32_t addressHigh = pipeControl->getAddressHigh();
uint32_t address = pipeControl->getAddress();
uint64_t actualAddress = (static_cast<uint64_t>(addressHigh) << 32ull) | address;
EXPECT_EQ(directSubmission.tagAddressSetValue, actualAddress);
uint64_t data = pipeControl->getImmediateData();
EXPECT_EQ(directSubmission.tagValueSetValue, data);
EXPECT_TRUE(pipeControl->getWorkloadPartitionIdOffsetEnable());
break;
}
}
EXPECT_TRUE(foundFenceUpdate);
}

98
shared/test/unit_test/direct_submission/direct_submission_tests_2.cpp
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@@ -26,8 +26,85 @@ using DirectSubmissionTest = Test<DirectSubmissionFixture>;
using DirectSubmissionDispatchBufferTest = Test<DirectSubmissionDispatchBufferFixture>;
HWCMDTEST_F(IGFX_GEN12_CORE, DirectSubmissionDispatchBufferTest,
givenDirectSubmissionRingStartWhenMultiTileSupportedThenExpectMultiTileConfigSetAndWorkPartitionResident) {
HWCMDTEST_F(IGFX_XE_HP_CORE, DirectSubmissionDispatchBufferTest,
givenDirectSubmissionInPartitionModeWhenDispatchingCommandBufferThenExpectDispatchPartitionedPipeControlInCommandBuffer) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
using POST_SYNC_OPERATION = typename FamilyType::PIPE_CONTROL::POST_SYNC_OPERATION;
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
using MI_LOAD_REGISTER_MEM = typename FamilyType::MI_LOAD_REGISTER_MEM;
FlushStampTracker flushStamp(true);
pDevice->rootCsrCreated = true;
pDevice->numSubDevices = 2;
auto ultCsr = reinterpret_cast<UltCommandStreamReceiver<FamilyType> *>(pDevice->getDefaultEngine().commandStreamReceiver);
ultCsr->staticWorkPartitioningEnabled = true;
ultCsr->createWorkPartitionAllocation(*pDevice);
MockDirectSubmissionHw<FamilyType, RenderDispatcher<FamilyType>> directSubmission(*pDevice,
*osContext.get());
directSubmission.disableMonitorFence = false;
directSubmission.partitionedMode = true;
directSubmission.workPartitionAllocation = ultCsr->getWorkPartitionAllocation();
bool ret = directSubmission.initialize(true);
EXPECT_TRUE(ret);
EXPECT_NE(0x0u, directSubmission.ringCommandStream.getUsed());
GraphicsAllocation *oldRingAllocation = directSubmission.ringCommandStream.getGraphicsAllocation();
EXPECT_EQ(0u, directSubmission.semaphoreData->QueueWorkCount);
EXPECT_EQ(1u, directSubmission.currentQueueWorkCount);
EXPECT_EQ(1u, directSubmission.submitCount);
size_t submitSize = RenderDispatcher<FamilyType>::getSizePreemption() +
directSubmission.getSizeSemaphoreSection() +
sizeof(MI_LOAD_REGISTER_IMM) +
sizeof(MI_LOAD_REGISTER_MEM);
EXPECT_EQ(submitSize, directSubmission.submitSize);
EXPECT_EQ(oldRingAllocation->getGpuAddress(), directSubmission.submitGpuAddress);
EXPECT_EQ(1u, directSubmission.handleResidencyCount);
directSubmission.ringCommandStream.getSpace(directSubmission.ringCommandStream.getAvailableSpace() -
directSubmission.getSizeSwitchRingBufferSection());
directSubmission.tagValueSetValue = 0x4343123ull;
directSubmission.tagAddressSetValue = 0xBEEF00000ull;
ret = directSubmission.dispatchCommandBuffer(batchBuffer, flushStamp);
EXPECT_TRUE(ret);
EXPECT_NE(oldRingAllocation, directSubmission.ringCommandStream.getGraphicsAllocation());
EXPECT_EQ(1u, directSubmission.semaphoreData->QueueWorkCount);
EXPECT_EQ(2u, directSubmission.currentQueueWorkCount);
EXPECT_EQ(1u, directSubmission.submitCount);
EXPECT_EQ(2u, directSubmission.handleResidencyCount);
EXPECT_EQ(directSubmission.getSizeDispatch(), directSubmission.ringCommandStream.getUsed());
EXPECT_TRUE(directSubmission.ringStart);
HardwareParse hwParse;
hwParse.parsePipeControl = true;
hwParse.parseCommands<FamilyType>(directSubmission.ringCommandStream, 0);
hwParse.findHardwareCommands<FamilyType>();
bool foundFenceUpdate = false;
for (auto &it : hwParse.pipeControlList) {
PIPE_CONTROL *pipeControl = reinterpret_cast<PIPE_CONTROL *>(it);
if (pipeControl->getPostSyncOperation() == POST_SYNC_OPERATION::POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA) {
foundFenceUpdate = true;
uint32_t addressHigh = pipeControl->getAddressHigh();
uint32_t address = pipeControl->getAddress();
uint64_t actualAddress = (static_cast<uint64_t>(addressHigh) << 32ull) | address;
EXPECT_EQ(directSubmission.tagAddressSetValue, actualAddress);
uint64_t data = pipeControl->getImmediateData();
EXPECT_EQ(directSubmission.tagValueSetValue, data);
EXPECT_TRUE(pipeControl->getWorkloadPartitionIdOffsetEnable());
break;
}
}
EXPECT_TRUE(foundFenceUpdate);
}
HWTEST_F(DirectSubmissionDispatchBufferTest,
givenDirectSubmissionRingStartWhenMultiTileSupportedThenExpectMultiTileConfigSetAndWorkPartitionResident) {
using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM;
using MI_LOAD_REGISTER_MEM = typename FamilyType::MI_LOAD_REGISTER_MEM;
@@ -63,14 +140,21 @@ HWCMDTEST_F(IGFX_GEN12_CORE, DirectSubmissionDispatchBufferTest,
hwParse.findHardwareCommands<FamilyType>();
ASSERT_NE(hwParse.lriList.end(), hwParse.lriList.begin());
auto loadRegisterImm = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(*hwParse.lriList.begin());
EXPECT_EQ(0x23B4u, loadRegisterImm->getRegisterOffset());
EXPECT_EQ(8u, loadRegisterImm->getDataDword());
bool partitionRegisterFound = false;
for (auto &it : hwParse.lriList) {
auto loadRegisterImm = reinterpret_cast<MI_LOAD_REGISTER_IMM *>(it);
if (loadRegisterImm->getRegisterOffset() == 0x23B4u) {
EXPECT_EQ(8u, loadRegisterImm->getDataDword());
partitionRegisterFound = true;
}
}
EXPECT_TRUE(partitionRegisterFound);
auto loadRegisterMemItor = find<MI_LOAD_REGISTER_MEM *>(hwParse.cmdList.begin(), hwParse.cmdList.end());
ASSERT_NE(hwParse.lriList.end(), loadRegisterMemItor);
ASSERT_NE(hwParse.cmdList.end(), loadRegisterMemItor);
auto loadRegisterMem = reinterpret_cast<MI_LOAD_REGISTER_MEM *>(*loadRegisterMemItor);
EXPECT_EQ(0x23B4u, loadRegisterMem->getRegisterOffset());
EXPECT_EQ(0x221Cu, loadRegisterMem->getRegisterAddress());
uint64_t gpuAddress = ultCsr->getWorkPartitionAllocation()->getGpuAddress();
EXPECT_EQ(gpuAddress, loadRegisterMem->getMemoryAddress());
}

2
shared/test/unit_test/direct_submission/dispatchers/render_dispatcher_tests.cpp
View File

@@ -119,7 +119,7 @@ HWTEST_F(RenderDispatcherTest, givenRenderWhenAddingCacheFlushCmdThenExpectPipeC
EXPECT_TRUE(foundCacheFlush);
}
HWCMDTEST_F(IGFX_GEN12_CORE, RenderDispatcherTest,
HWCMDTEST_F(IGFX_XE_HP_CORE, RenderDispatcherTest,
givenRenderDispatcherPartitionedWorkloadFlagTrueWhenAddingMonitorFenceCmdThenExpectPipeControlWithProperAddressAndValueAndPartitionParameter) {
using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL;
using POST_SYNC_OPERATION = typename FamilyType::PIPE_CONTROL::POST_SYNC_OPERATION;