intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2025-12-29 09:03:14 +08:00
Code Issues Packages Projects Releases Wiki Activity

refactor: prepare CLOS logic for extension

Browse Source 
Prepare cache setup and reservation logic to be extended w.r.t other
cache-levels.

Conceptually this change is like adding a switch-statement, in several
places, in which existing code makes a single (and only) case. This is
caused by splitting larger development to ease the review. Further cases
will be added in following steps. Such approach sometimes creates code
which may seem redundant but it is meant to simplify plugging following
extensions in an easy way.

Related-To: NEO-12837
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
This commit is contained in:
Maciej Bielski
2025-02-13 17:01:04 +00:00
committed by Compute-Runtime-Automation
parent 9f3a95b7d6
commit 6924a48ca6
29 changed files with 256 additions and 114 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
shared/source/os_interface/linux/drm_allocation.cpp
View File

@@ -161,7 +161,7 @@ bool DrmAllocation::setCacheRegion(Drm *drm, CacheRegion regionIndex) {
return true;
}
auto cacheInfo = drm->getL3CacheInfo();
auto cacheInfo = drm->getCacheInfo();
if (cacheInfo == nullptr) {
return false;
}
@@ -175,7 +175,7 @@ bool DrmAllocation::setCacheRegion(Drm *drm, CacheRegion regionIndex) {
}
bool DrmAllocation::setCacheAdvice(Drm *drm, size_t regionSize, CacheRegion regionIndex, bool isSystemMemoryPool) {
if (!drm->getL3CacheInfo()->getCacheRegion(regionSize, regionIndex)) {
if (!drm->getCacheInfo()->getCacheRegion(regionSize, regionIndex)) {
return false;
}