feature: add initial support for Xe2 platforms

Related-To: NEO-8188, NEO-10774
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>

CMakeLists.txt

@@ -921,7 +921,10 @@ include_directories(${NEO_SHARED_DIRECTORY}/sku_info/definitions${BRANCH_DIR_SUF
 
 macro(macro_for_each_platform)
   string(TOLOWER ${PLATFORM_IT} PLATFORM_IT_LOWER)
-  foreach(PLATFORM_DIRECTORY ${NEO_SHARED_DIRECTORY}/${CORE_TYPE_LOWER}/${PLATFORM_IT_LOWER}/definitions${BRANCH_DIR_SUFFIX})
+  foreach(PLATFORM_DIRECTORY
+            ${NEO_SHARED_DIRECTORY}/${CORE_TYPE_LOWER}/${PLATFORM_IT_LOWER}/definitions${BRANCH_DIR_SUFFIX}
+            ${NEO_SHARED_DIRECTORY}/ail/${CORE_TYPE_LOWER}/${PLATFORM_IT_LOWER}/definitions${BRANCH_DIR_SUFFIX}
+    )
     if(EXISTS ${PLATFORM_DIRECTORY})
       include_directories(${PLATFORM_DIRECTORY})
     endif()

cmake/fill_core_types.cmake

@@ -11,7 +11,9 @@ list(APPEND ALL_CORE_TYPES "GEN12LP")
 list(APPEND ALL_CORE_TYPES "XE_HP_CORE")
 list(APPEND ALL_CORE_TYPES "XE_HPG_CORE")
 list(APPEND ALL_CORE_TYPES "XE_HPC_CORE")
-list(APPEND PVC_AND_LATER_CORE_TYPES "XE_HPC_CORE")
+list(APPEND ALL_CORE_TYPES "XE2_HPG_CORE")
+list(APPEND XE2_AND_LATER_CORE_TYPES "XE2_HPG_CORE")
+list(APPEND PVC_AND_LATER_CORE_TYPES ${XE2_AND_LATER_CORE_TYPES} "XE_HPC_CORE")
 list(APPEND DG2_AND_LATER_CORE_TYPES ${PVC_AND_LATER_CORE_TYPES} "XE_HPG_CORE")
 list(APPEND MTL_AND_LATER_CORE_TYPES ${DG2_AND_LATER_CORE_TYPES})
 list(APPEND XEHP_AND_LATER_CORE_TYPES ${MTL_AND_LATER_CORE_TYPES})

cmake/setup_platform_flags.cmake

@@ -15,6 +15,7 @@ SET_FLAGS_FOR_LEGACY("GEN11" "ICLLP" "LKF" "EHL")
 SET_FLAGS_FOR_CURRENT("GEN12LP" "TGLLP" "RKL" "ADLS" "ADLP" "DG1" "ADLN")
 SET_FLAGS_FOR_CURRENT("XE_HPG_CORE" "DG2" "MTL" "ARL")
 SET_FLAGS_FOR_CURRENT("XE_HPC_CORE" "PVC")
+SET_FLAGS_FOR_CURRENT("XE2_HPG_CORE" "BMG" "LNL")
 
 DISABLE_WDDM_LINUX_FOR("XE_HPC_CORE" "PVC")
 
@@ -54,6 +55,15 @@ foreach(CORE_TYPE ${PVC_AND_LATER_CORE_TYPES})
   endif()
 endforeach()
 
+foreach(CORE_TYPE ${XE2_AND_LATER_CORE_TYPES})
+  if(TESTS_${CORE_TYPE})
+    set(TESTS_XE2_AND_LATER 1)
+  endif()
+  if(SUPPORT_${CORE_TYPE})
+    set(SUPPORT_XE2_AND_LATER 1)
+  endif()
+endforeach()
+
 if(SUPPORT_ARL)
   ENABLE_ADDITIONAL_SKU("MTL")
   if(TESTS_ARL)
@@ -376,3 +386,39 @@ if(SUPPORT_XE_HPC_CORE)
     endif()
   endif()
 endif()
+
+if(SUPPORT_XE2_HPG_CORE)
+  ADD_AOT_DEFINITION(XE2)
+  set(XE2_HPG_CORE_TEST_KERNELS_BLOCKLIST "CopyBuffer_simd8.cl")
+  if(TESTS_XE2_HPG_CORE)
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "XE2_HPG_CORE" "Xe2HpgCoreFamily")
+  endif()
+
+  if(SUPPORT_BMG)
+    ADD_AOT_DEFINITION(XE2_HPG)
+    ADD_AOT_DEFINITION(BMG)
+    set(BMG_XE2_HPG_CORE_REVISIONS 4)
+    set(BMG_XE2_HPG_CORE_RELEASES "20.1.0" "20.1.1" "20.1.4")
+    ADD_PRODUCT("SUPPORTED" "BMG" "IGFX_BMG")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED" "XE2_HPG_CORE" "BMG")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_IMAGES" "XE2_HPG_CORE" "BMG")
+    if(TESTS_BMG)
+      ADD_ITEM_FOR_CORE_TYPE("PLATFORMS" "TESTED" "XE2_HPG_CORE" "BMG")
+      ADD_PRODUCT("TESTED" "BMG" "IGFX_BMG")
+    endif()
+  endif()
+
+  if(SUPPORT_LNL)
+    ADD_AOT_DEFINITION(XE2_LPG)
+    ADD_AOT_DEFINITION(LNL)
+    set(LNL_XE2_HPG_CORE_REVISIONS 4)
+    set(LNL_XE2_HPG_CORE_RELEASES "20.4.0" "20.4.1" "20.4.4")
+    ADD_PRODUCT("SUPPORTED" "LNL" "IGFX_LUNARLAKE")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED" "XE2_HPG_CORE" "LNL")
+    ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_IMAGES" "XE2_HPG_CORE" "LNL")
+    if(TESTS_LNL)
+      ADD_ITEM_FOR_CORE_TYPE("PLATFORMS" "TESTED" "XE2_HPG_CORE" "LNL")
+      ADD_PRODUCT("TESTED" "LNL" "IGFX_LUNARLAKE")
+    endif()
+  endif()
+endif()

level_zero/core/source/cmdlist/CMakeLists.txt

@@ -42,4 +42,10 @@ if(SUPPORT_PVC_AND_LATER)
   )
 endif()
 
+if(SUPPORT_XE2_AND_LATER)
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_hw_xe2_hpg_and_later.inl
+  )
+endif()
+
 add_subdirectories()

level_zero/core/source/cmdlist/cmdlist_hw_xe2_hpg_and_later.inl

@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
+#include "level_zero/core/source/kernel/kernel.h"
+
+namespace L0 {
+
+template <GFXCORE_FAMILY gfxCoreFamily>
+inline NEO::PreemptionMode CommandListCoreFamily<gfxCoreFamily>::obtainKernelPreemptionMode(Kernel *kernel) {
+    auto kernelDescriptor = &kernel->getImmutableData()->getDescriptor();
+    bool disabledMidThreadPreemptionKernel = kernelDescriptor->kernelAttributes.flags.requiresDisabledMidThreadPreemption ||
+                                             (kernelDescriptor->kernelAttributes.flags.hasRTCalls && kernel->isMidThreadPreemptionDisallowedForRayTracingKernels());
+    bool debuggingEnabled = device->getNEODevice()->getDebugger();
+    disabledMidThreadPreemptionKernel |= debuggingEnabled;
+    disabledMidThreadPreemptionKernel |= device->getNEODevice()->getPreemptionMode() != NEO::PreemptionMode::MidThread;
+    return disabledMidThreadPreemptionKernel ? NEO::PreemptionMode::ThreadGroup : NEO::PreemptionMode::MidThread;
+}
+
+template <GFXCORE_FAMILY gfxCoreFamily>
+void CommandListCoreFamily<gfxCoreFamily>::adjustWriteKernelTimestamp(uint64_t globalAddress, uint64_t contextAddress, uint64_t baseAddress, CommandToPatchContainer *outTimeStampSyncCmds, bool maskLsb, uint32_t mask,
+                                                                      bool workloadPartition, bool copyOperation) {
+    uint64_t globalHighAddress = globalAddress + sizeof(uint32_t);
+    uint64_t contextHighAddress = contextAddress + sizeof(uint32_t);
+
+    void **globalPostSyncCmdBuffer = nullptr;
+    void **contextPostSyncCmdBuffer = nullptr;
+
+    void *globalPostSyncCmd = nullptr;
+    void *contextPostSyncCmd = nullptr;
+
+    if (outTimeStampSyncCmds != nullptr) {
+        globalPostSyncCmdBuffer = &globalPostSyncCmd;
+        contextPostSyncCmdBuffer = &contextPostSyncCmd;
+    }
+
+    if (maskLsb) {
+        NEO::EncodeMathMMIO<GfxFamily>::encodeBitwiseAndVal(commandContainer, RegisterOffsets::globalTimestampUn, mask, globalHighAddress, workloadPartition, globalPostSyncCmdBuffer, copyOperation);
+        NEO::EncodeMathMMIO<GfxFamily>::encodeBitwiseAndVal(commandContainer, RegisterOffsets::gpThreadTimeRegAddressOffsetHigh, mask, contextHighAddress, workloadPartition, contextPostSyncCmdBuffer, copyOperation);
+    } else {
+        NEO::EncodeStoreMMIO<GfxFamily>::encode(*commandContainer.getCommandStream(), RegisterOffsets::globalTimestampUn, globalHighAddress, workloadPartition, globalPostSyncCmdBuffer);
+        NEO::EncodeStoreMMIO<GfxFamily>::encode(*commandContainer.getCommandStream(), RegisterOffsets::gpThreadTimeRegAddressOffsetHigh, contextHighAddress, workloadPartition, contextPostSyncCmdBuffer);
+    }
+
+    if (outTimeStampSyncCmds != nullptr) {
+        CommandToPatch ctxCmd;
+        ctxCmd.type = CommandToPatch::TimestampEventPostSyncStoreRegMem;
+
+        ctxCmd.offset = globalHighAddress - baseAddress;
+        ctxCmd.pDestination = globalPostSyncCmd;
+        outTimeStampSyncCmds->push_back(ctxCmd);
+
+        ctxCmd.offset = contextHighAddress - baseAddress;
+        ctxCmd.pDestination = contextPostSyncCmd;
+        outTimeStampSyncCmds->push_back(ctxCmd);
+    }
+}
+
+} // namespace L0

level_zero/core/source/gfx_core_helpers/CMakeLists.txt

@@ -67,3 +67,9 @@ if(SUPPORT_XE_HP_CORE OR SUPPORT_XE_HPG_CORE OR SUPPORT_XE2_HPG_CORE)
                  ${CMAKE_CURRENT_SOURCE_DIR}/l0_gfx_core_helper_xe_hpg_to_xe2_hpg.inl
   )
 endif()
+
+if(SUPPORT_XE2_AND_LATER)
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/l0_gfx_core_helper_xe2_hpg_and_later.inl
+  )
+endif()

level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper_xe2_hpg_and_later.inl

@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/debug_settings/debug_settings_manager.h"
+#include "shared/source/execution_environment/root_device_environment.h"
+
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper.h"
+
+namespace L0 {
+
+template <typename Family>
+bool L0GfxCoreHelperHw<Family>::imageCompressionSupported(const NEO::HardwareInfo &hwInfo) const {
+    if (NEO::debugManager.flags.RenderCompressedImagesEnabled.get() != -1) {
+        return !!NEO::debugManager.flags.RenderCompressedImagesEnabled.get();
+    }
+
+    return hwInfo.capabilityTable.ftrRenderCompressedImages;
+}
+
+template <typename Family>
+bool L0GfxCoreHelperHw<Family>::usmCompressionSupported(const NEO::HardwareInfo &hwInfo) const {
+    if (NEO::debugManager.flags.RenderCompressedBuffersEnabled.get() != -1) {
+        return !!NEO::debugManager.flags.RenderCompressedBuffersEnabled.get();
+    }
+
+    return hwInfo.capabilityTable.ftrRenderCompressedBuffers;
+}
+
+template <typename Family>
+bool L0GfxCoreHelperHw<Family>::forceDefaultUsmCompressionSupport() const {
+    return true;
+}
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,19 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_XE2_HPG_CORE)
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe2_hpg_core.h
+                 ${CMAKE_CURRENT_SOURCE_DIR}/image_xe2_hpg_core.inl
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_family_full_l0_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/l0_gfx_core_helper_xe2_hpg_core.cpp
+  )
+
+  add_subdirectories()
+
+endif()

level_zero/core/source/xe2_hpg_core/bmg/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_BMG)
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_bmg.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdqueue_bmg.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/image_bmg.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/kernel_bmg.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sampler_bmg.cpp
+  )
+  add_subdirectories()
+endif()

level_zero/core/source/xe2_hpg_core/bmg/cmdlist_bmg.cpp

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/xe2_hpg_core/cmdlist_xe2_hpg_core.h"
+
+namespace L0 {
+
+static CommandListPopulateFactory<IGFX_BMG, CommandListProductFamily<IGFX_BMG>>
+    populateBMG;
+
+static CommandListImmediatePopulateFactory<IGFX_BMG, CommandListImmediateProductFamily<IGFX_BMG>>
+    populateBMGImmediate;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/bmg/cmdqueue_bmg.cpp

@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_bmg.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/cmdqueue/cmdqueue_hw.inl"
+#include "level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl"
+
+#include "cmdqueue_extended.inl"
+namespace L0 {
+template struct CommandQueueHw<IGFX_XE2_HPG_CORE>;
+static CommandQueuePopulateFactory<IGFX_BMG, CommandQueueHw<IGFX_XE2_HPG_CORE>>
+    populateBMG;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/bmg/image_bmg.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/xe2_hpg_core/image_xe2_hpg_core.inl"
+
+namespace L0 {
+
+template <>
+struct ImageProductFamily<IGFX_BMG> : public ImageCoreFamily<IGFX_XE2_HPG_CORE> {
+    using ImageCoreFamily::ImageCoreFamily;
+
+    ze_result_t initialize(Device *device, const ze_image_desc_t *desc) override {
+        return ImageCoreFamily<IGFX_XE2_HPG_CORE>::initialize(device, desc);
+    };
+};
+
+static ImagePopulateFactory<IGFX_BMG, ImageProductFamily<IGFX_BMG>> populateBMG;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/bmg/kernel_bmg.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/kernel/kernel_hw.h"
+
+namespace L0 {
+
+static KernelPopulateFactory<IGFX_BMG, KernelHw<IGFX_XE2_HPG_CORE>> populateBMG;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/bmg/sampler_bmg.cpp

@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/sampler/sampler_hw.inl"
+
+namespace L0 {
+
+template <>
+struct SamplerProductFamily<IGFX_BMG> : public SamplerCoreFamily<IGFX_XE2_HPG_CORE> {
+    using SamplerCoreFamily::SamplerCoreFamily;
+};
+
+static SamplerPopulateFactory<IGFX_BMG, SamplerProductFamily<IGFX_BMG>> populateBMG;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/cmdlist_xe2_hpg_core.cpp

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_xe2_hpg_and_later.inl"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_xe_hpc_and_later.inl"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl"
+
+#include "cmdlist_extended.inl"
+
+namespace L0 {
+
+template struct CommandListCoreFamily<IGFX_XE2_HPG_CORE>;
+template struct CommandListCoreFamilyImmediate<IGFX_XE2_HPG_CORE>;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/cmdlist_xe2_hpg_core.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#pragma once
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+
+#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
+#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
+
+namespace L0 {
+template <PRODUCT_FAMILY productFamily>
+struct CommandListProductFamily : public CommandListCoreFamily<IGFX_XE2_HPG_CORE> {
+    using CommandListCoreFamily::CommandListCoreFamily;
+};
+
+template <PRODUCT_FAMILY gfxProductFamily>
+struct CommandListImmediateProductFamily : public CommandListCoreFamilyImmediate<IGFX_XE2_HPG_CORE> {
+    using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
+};
+} // namespace L0

level_zero/core/source/xe2_hpg_core/enable_family_full_l0_xe2_hpg_core.cpp

@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper.h"
+#include "level_zero/core/source/helpers/l0_populate_factory.h"
+
+namespace NEO {
+
+using Family = Xe2HpgCoreFamily;
+
+struct EnableL0Xe2HpgCore {
+    EnableL0Xe2HpgCore() {
+        L0::populateFactoryTable<L0::L0GfxCoreHelperHw<Family>>();
+    }
+};
+
+static EnableL0Xe2HpgCore enable;
+} // namespace NEO

level_zero/core/source/xe2_hpg_core/image_xe2_hpg_core.inl

@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/image/image_hw.inl"

level_zero/core/source/xe2_hpg_core/l0_gfx_core_helper_xe2_hpg_core.cpp

@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper_base.inl"
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper_pvc_and_later.inl"
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper_xe2_hpg_and_later.inl"
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper_xe_hpg_to_xe2_hpg.inl"
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper_xehp_and_later.inl"
+#include "level_zero/core/source/helpers/l0_populate_factory.h"
+
+namespace L0 {
+using Family = NEO::Xe2HpgCoreFamily;
+static auto gfxCore = IGFX_XE2_HPG_CORE;
+
+template <>
+zet_debug_regset_type_intel_gpu_t L0GfxCoreHelperHw<Family>::getRegsetTypeForLargeGrfDetection() const {
+    return ZET_DEBUG_REGSET_TYPE_SR_INTEL_GPU;
+}
+
+/*
+ * Xe2 stall sample data item format:
+ *
+ * Bits		Field
+ * 0  to 28	IP (addr)
+ * 29 to 36	tdr count
+ * 37 to 44	other count
+ * 45 to 52	control count
+ * 53 to 60	pipestall count
+ * 61 to 68	send count
+ * 69 to 76	dist_acc count
+ * 77 to 84	sbid count
+ * 85 to 92	sync count
+ * 93 to 100 inst_fetch count
+ * 101 to 108 active count
+ * Exid	[109, 111]
+ * "EndFlag" - is always "1" 112
+ *
+ * bytes at index 48 and 49, subSlice
+ * bytes at index 50 and 51, flags
+ *
+ * total size 64 bytes
+ */
+
+#pragma pack(1)
+typedef struct StallSumIpDataXe2 {
+    uint64_t tdrCount;
+    uint64_t otherCount;
+    uint64_t controlCount;
+    uint64_t pipeStallCount;
+    uint64_t sendCount;
+    uint64_t distAccCount;
+    uint64_t sbidCount;
+    uint64_t syncCount;
+    uint64_t instFetchCount;
+    uint64_t activeCount;
+} StallSumIpDataXe2_t;
+#pragma pack()
+
+constexpr uint32_t ipSamplingMetricCountXe2 = 11u;
+
+template <typename Family>
+uint32_t L0GfxCoreHelperHw<Family>::getIpSamplingMetricCount() {
+    return ipSamplingMetricCountXe2;
+}
+
+template <typename Family>
+void L0GfxCoreHelperHw<Family>::stallIpDataMapDelete(std::map<uint64_t, void *> &stallSumIpDataMap) {
+    for (auto i = stallSumIpDataMap.begin(); i != stallSumIpDataMap.end(); i++) {
+        StallSumIpDataXe2_t *stallSumData = reinterpret_cast<StallSumIpDataXe2_t *>(i->second);
+        if (stallSumData) {
+            delete stallSumData;
+            i->second = nullptr;
+        }
+    }
+}
+
+template <typename Family>
+bool L0GfxCoreHelperHw<Family>::stallIpDataMapUpdate(std::map<uint64_t, void *> &stallSumIpDataMap, const uint8_t *pRawIpData) {
+    const uint8_t *tempAddr = pRawIpData;
+    uint64_t ip = 0ULL;
+    memcpy_s(reinterpret_cast<uint8_t *>(&ip), sizeof(ip), tempAddr, sizeof(ip));
+    ip &= 0x1fffffff;
+    StallSumIpDataXe2_t *stallSumData = nullptr;
+    if (stallSumIpDataMap.count(ip) == 0) {
+        stallSumData = new StallSumIpDataXe2_t{};
+        stallSumData->tdrCount = 0;
+        stallSumData->otherCount = 0;
+        stallSumData->controlCount = 0;
+        stallSumData->pipeStallCount = 0;
+        stallSumData->sendCount = 0;
+        stallSumData->distAccCount = 0;
+        stallSumData->sbidCount = 0;
+        stallSumData->syncCount = 0;
+        stallSumData->instFetchCount = 0;
+        stallSumData->activeCount = 0;
+        stallSumIpDataMap[ip] = stallSumData;
+    } else {
+        stallSumData = reinterpret_cast<StallSumIpDataXe2_t *>(stallSumIpDataMap[ip]);
+    }
+    tempAddr += ipStallSamplingOffset;
+
+    auto getCount = [&tempAddr]() {
+        uint16_t tempCount = 0;
+        memcpy_s(reinterpret_cast<uint8_t *>(&tempCount), sizeof(tempCount), tempAddr, sizeof(tempCount));
+        tempCount = (tempCount >> ipStallSamplingReportShift) & stallSamplingReportCategoryMask;
+        tempAddr += 1;
+        return static_cast<uint8_t>(tempCount);
+    };
+
+    stallSumData->tdrCount += getCount();
+    stallSumData->otherCount += getCount();
+    stallSumData->controlCount += getCount();
+    stallSumData->pipeStallCount += getCount();
+    stallSumData->sendCount += getCount();
+    stallSumData->distAccCount += getCount();
+    stallSumData->sbidCount += getCount();
+    stallSumData->syncCount += getCount();
+    stallSumData->instFetchCount += getCount();
+    stallSumData->activeCount += getCount();
+
+#pragma pack(1)
+    struct StallCntrInfo {
+        uint16_t subslice;
+        uint16_t flags;
+    } stallCntrInfo = {};
+#pragma pack()
+
+    tempAddr = pRawIpData + stallSamplingReportSubSliceAndFlagsOffset;
+    memcpy_s(reinterpret_cast<uint8_t *>(&stallCntrInfo), sizeof(stallCntrInfo), tempAddr, sizeof(stallCntrInfo));
+
+    constexpr int32_t overflowDropFlag = (1 << 8);
+    return stallCntrInfo.flags & overflowDropFlag;
+}
+
+// Order of ipDataValues must match stallSamplingReportList
+template <typename Family>
+void L0GfxCoreHelperHw<Family>::stallSumIpDataToTypedValues(uint64_t ip, void *sumIpData, std::vector<zet_typed_value_t> &ipDataValues) {
+    StallSumIpDataXe2_t *stallSumData = reinterpret_cast<StallSumIpDataXe2_t *>(sumIpData);
+    zet_typed_value_t tmpValueData;
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = ip;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->activeCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->tdrCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->controlCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->pipeStallCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->sendCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->distAccCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->sbidCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->syncCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->instFetchCount;
+    ipDataValues.push_back(tmpValueData);
+
+    tmpValueData.type = ZET_VALUE_TYPE_UINT64;
+    tmpValueData.value.ui64 = stallSumData->otherCount;
+    ipDataValues.push_back(tmpValueData);
+}
+
+template <typename Family>
+std::vector<std::pair<const char *, const char *>> L0GfxCoreHelperHw<Family>::getStallSamplingReportMetrics() const {
+    std::vector<std::pair<const char *, const char *>> stallSamplingReportList = {
+        {"Active", "Active cycles"},
+        {"Tdr", "Stall on Timeout Detection and Recovery"},
+        {"ControlStall", "Stall on control"},
+        {"PipeStall", "Stall on pipe"},
+        {"SendStall", "Stall on send"},
+        {"DistStall", "Stall on distance"},
+        {"SbidStall", "Stall on scoreboard"},
+        {"SyncStall", "Stall on sync"},
+        {"InstrFetchStall", "Stall on instruction fetch"},
+        {"OtherStall", "Stall on other condition"},
+    };
+    return stallSamplingReportList;
+}
+
+#include "level_zero/core/source/helpers/l0_gfx_core_helper_factory_init.inl"
+
+template class L0GfxCoreHelperHw<Family>;
+} // namespace L0

level_zero/core/source/xe2_hpg_core/lnl/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_LNL)
+  target_sources(${L0_STATIC_LIB_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_lnl.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/cmdqueue_lnl.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/image_lnl.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/kernel_lnl.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sampler_lnl.cpp
+  )
+  add_subdirectories()
+endif()

level_zero/core/source/xe2_hpg_core/lnl/cmdlist_lnl.cpp

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/xe2_hpg_core/cmdlist_xe2_hpg_core.h"
+
+namespace L0 {
+
+static CommandListPopulateFactory<IGFX_LUNARLAKE, CommandListProductFamily<IGFX_LUNARLAKE>>
+    populateLNL;
+
+static CommandListImmediatePopulateFactory<IGFX_LUNARLAKE, CommandListImmediateProductFamily<IGFX_LUNARLAKE>>
+    populateLNLImmediate;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/lnl/cmdqueue_lnl.cpp

@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_lnl.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/cmdqueue/cmdqueue_hw.inl"
+#include "level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl"
+
+#include "cmdqueue_extended.inl"
+namespace L0 {
+template struct CommandQueueHw<IGFX_XE2_HPG_CORE>;
+static CommandQueuePopulateFactory<IGFX_LUNARLAKE, CommandQueueHw<IGFX_XE2_HPG_CORE>>
+    populateLNL;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/lnl/image_lnl.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/core/source/xe2_hpg_core/image_xe2_hpg_core.inl"
+
+namespace L0 {
+
+template <>
+struct ImageProductFamily<IGFX_LUNARLAKE> : public ImageCoreFamily<IGFX_XE2_HPG_CORE> {
+    using ImageCoreFamily::ImageCoreFamily;
+
+    ze_result_t initialize(Device *device, const ze_image_desc_t *desc) override {
+        return ImageCoreFamily<IGFX_XE2_HPG_CORE>::initialize(device, desc);
+    };
+};
+
+static ImagePopulateFactory<IGFX_LUNARLAKE, ImageProductFamily<IGFX_LUNARLAKE>> populateLNL;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/lnl/kernel_lnl.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/kernel/kernel_hw.h"
+
+namespace L0 {
+
+static KernelPopulateFactory<IGFX_LUNARLAKE, KernelHw<IGFX_XE2_HPG_CORE>> populateLNL;
+
+} // namespace L0

level_zero/core/source/xe2_hpg_core/lnl/sampler_lnl.cpp

@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+
+#include "level_zero/core/source/sampler/sampler_hw.inl"
+
+namespace L0 {
+
+template <>
+struct SamplerProductFamily<IGFX_LUNARLAKE> : public SamplerCoreFamily<IGFX_XE2_HPG_CORE> {
+    using SamplerCoreFamily::SamplerCoreFamily;
+};
+
+static SamplerPopulateFactory<IGFX_LUNARLAKE, SamplerProductFamily<IGFX_LUNARLAKE>> populateLNL;
+
+} // namespace L0

level_zero/core/test/unit_tests/sources/cmdlist/CMakeLists.txt

@@ -38,4 +38,10 @@ if(TESTS_XEHP_AND_LATER)
   )
 endif()
 
+if(TESTS_XE2_AND_LATER)
+  target_sources(${TARGET_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/test_cmdlist_xe2_and_later.cpp
+  )
+endif()
+
 add_subdirectories()

level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_xe2_and_later.cpp

@@ -0,0 +1,387 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/gfx_core_helper.h"
+#include "shared/source/helpers/register_offsets.h"
+#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/mocks/mock_graphics_allocation.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
+#include "level_zero/core/test/unit_tests/fixtures/cmdlist_fixture.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_cmdlist.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_event.h"
+
+namespace L0 {
+namespace ult {
+
+HWTEST_EXCLUDE_PRODUCT(AppendMemoryCopy, givenCopyCommandListWhenTimestampPassedToMemoryCopyRegionBlitThenTimeStampRegistersAreAdded_IsAtLeastSkl, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(AppendMemoryCopy, givenCopyCommandListWhenTimestampPassedToMemoryCopyThenAppendProfilingCalledOnceBeforeAndAfterCommand_IsAtLeastSkl, IGFX_XE2_HPG_CORE);
+
+using Platforms = IsAtLeastXe2HpgCore;
+
+struct CommandListXe2AndLaterFixture : public DeviceFixture {
+    void setUp() {
+        DeviceFixture::setUp();
+
+        constexpr ze_event_pool_desc_t eventPoolDesc = {ZE_STRUCTURE_TYPE_EVENT_POOL_DESC, nullptr, ZE_EVENT_POOL_FLAG_HOST_VISIBLE, 4};
+        auto hDevice = device->toHandle();
+
+        ze_result_t result = ZE_RESULT_SUCCESS;
+        eventPool.reset(static_cast<EventPool *>(EventPool::create(device->getDriverHandle(), context, 1, &hDevice, &eventPoolDesc, result)));
+        EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+        ze_event_handle_t hEvent = 0;
+        ze_event_desc_t eventDesc = {};
+
+        eventDesc.index = 0;
+
+        result = eventPool->createEvent(&eventDesc, &hEvent);
+        EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+        eventObj.reset(L0::Event::fromHandle(hEvent));
+    }
+
+    void tearDown() {
+        eventObj.reset(nullptr);
+        eventPool.reset(nullptr);
+        DeviceFixture::tearDown();
+    }
+
+    template <typename FamilyType>
+    std::vector<GenCmdList::iterator> findAllSrmCommands(void *streamStart, size_t size) {
+        genSrmCommands.clear();
+
+        EXPECT_TRUE(FamilyType::Parse::parseCommandBuffer(genSrmCommands, streamStart, size));
+
+        return findAll<typename FamilyType::MI_STORE_REGISTER_MEM *>(genSrmCommands.begin(), genSrmCommands.end());
+    }
+
+    template <typename FamilyType>
+    std::vector<GenCmdList::iterator> findAllLrrCommands(void *streamStart, size_t size) {
+        genLrrCommands.clear();
+
+        EXPECT_TRUE(FamilyType::Parse::parseCommandBuffer(genLrrCommands, streamStart, size));
+
+        return findAll<typename FamilyType::MI_LOAD_REGISTER_REG *>(genLrrCommands.begin(), genLrrCommands.end());
+    }
+
+    template <typename FamilyType>
+    void validateSrmCommand(const typename FamilyType::MI_STORE_REGISTER_MEM *cmd, uint64_t expectedAddress, uint32_t expectedRegisterOffset) {
+        EXPECT_EQ(expectedRegisterOffset, cmd->getRegisterAddress());
+        EXPECT_EQ(expectedAddress, cmd->getMemoryAddress());
+    }
+
+    template <typename FamilyType>
+    void validateLrrCommand(const typename FamilyType::MI_LOAD_REGISTER_REG *cmd, uint32_t expectedRegisterOffset) {
+        EXPECT_EQ(expectedRegisterOffset, cmd->getSourceRegisterAddress());
+    }
+
+    template <typename FamilyType>
+    void validateCommands(const std::vector<GenCmdList::iterator> &srmCommands, bool beforeWalker, bool useMask) {
+        using MI_STORE_REGISTER_MEM = typename FamilyType::MI_STORE_REGISTER_MEM;
+        using MI_LOAD_REGISTER_REG = typename FamilyType::MI_LOAD_REGISTER_REG;
+
+        auto baseAddr = eventObj->getGpuAddress(device);
+        auto contextOffset = beforeWalker ? eventObj->getContextStartOffset() : eventObj->getContextEndOffset();
+        auto globalOffset = beforeWalker ? eventObj->getGlobalStartOffset() : eventObj->getGlobalEndOffset();
+
+        uint64_t globalAddress = ptrOffset(baseAddr, globalOffset);
+        uint64_t contextAddress = ptrOffset(baseAddr, contextOffset);
+
+        if (useMask) {
+            ASSERT_EQ(8u, srmCommands.size());
+
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[0]), globalAddress, RegisterOffsets::csGprR12);
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[1]), contextAddress, RegisterOffsets::csGprR12);
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[2]), globalAddress + sizeof(uint32_t), RegisterOffsets::csGprR12);
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[3]), contextAddress + sizeof(uint32_t), RegisterOffsets::csGprR12);
+
+            validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[4]), RegisterOffsets::globalTimestampLdw);
+            validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[5]), RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
+            validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[6]), RegisterOffsets::globalTimestampUn);
+            validateLrrCommand<FamilyType>(reinterpret_cast<MI_LOAD_REGISTER_REG *>(*srmCommands[7]), RegisterOffsets::gpThreadTimeRegAddressOffsetHigh);
+
+        } else {
+            ASSERT_EQ(4u, srmCommands.size());
+
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[0]), globalAddress, RegisterOffsets::globalTimestampLdw);
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[1]), contextAddress, RegisterOffsets::gpThreadTimeRegAddressOffsetLow);
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[2]), globalAddress + sizeof(uint32_t), RegisterOffsets::globalTimestampUn);
+            validateSrmCommand<FamilyType>(reinterpret_cast<MI_STORE_REGISTER_MEM *>(*srmCommands[3]), contextAddress + sizeof(uint32_t), RegisterOffsets::gpThreadTimeRegAddressOffsetHigh);
+        }
+    }
+
+    DebugManagerStateRestore restore;
+    std::unique_ptr<EventPool> eventPool;
+    std::unique_ptr<L0::Event> eventObj;
+    GenCmdList genSrmCommands;
+    GenCmdList genLrrCommands;
+};
+
+using CommandListXe2AndLaterTests = Test<CommandListXe2AndLaterFixture>;
+
+HWTEST2_F(CommandListXe2AndLaterTests, given64bEventWhenTimestampIsWrittenThenAddExtraMmioReads, Platforms) {
+    auto commandList = std::make_unique<WhiteBox<L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+
+    NEO::LinearStream *commandStream = commandList->getCmdContainer().getCommandStream();
+
+    commandList->appendWriteKernelTimestamp(eventObj.get(), nullptr, false, false, false, false);
+
+    size_t streamOffset = commandStream->getUsed();
+
+    {
+        auto srmCommands = findAllSrmCommands<FamilyType>(commandStream->getCpuBase(), commandStream->getUsed());
+
+        validateCommands<FamilyType>(srmCommands, false, false);
+    }
+
+    commandList->appendWriteKernelTimestamp(eventObj.get(), nullptr, true, false, false, false);
+
+    {
+        auto srmCommands = findAllSrmCommands<FamilyType>(ptrOffset(commandStream->getCpuBase(), streamOffset),
+                                                          (commandStream->getUsed() - streamOffset));
+        validateCommands<FamilyType>(srmCommands, true, false);
+    }
+}
+
+HWTEST2_F(CommandListXe2AndLaterTests, given64bEventWithLsbMaskingWhenTimestampIsWrittenThenAddExtraMmioReads, Platforms) {
+    auto commandList = std::make_unique<WhiteBox<L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+
+    NEO::LinearStream *commandStream = commandList->getCmdContainer().getCommandStream();
+
+    commandList->appendWriteKernelTimestamp(eventObj.get(), nullptr, false, true, false, false);
+
+    size_t streamOffset = commandStream->getUsed();
+
+    {
+        auto commands = findAllSrmCommands<FamilyType>(commandStream->getCpuBase(), commandStream->getUsed());
+        auto lrrCommands = findAllLrrCommands<FamilyType>(commandStream->getCpuBase(), commandStream->getUsed());
+        commands.insert(commands.end(), lrrCommands.begin(), lrrCommands.end());
+
+        validateCommands<FamilyType>(commands, false, true);
+    }
+
+    commandList->appendWriteKernelTimestamp(eventObj.get(), nullptr, true, true, false, false);
+
+    {
+        auto commands = findAllSrmCommands<FamilyType>(ptrOffset(commandStream->getCpuBase(), streamOffset),
+                                                       (commandStream->getUsed() - streamOffset));
+        auto lrrCommands = findAllLrrCommands<FamilyType>(ptrOffset(commandStream->getCpuBase(), streamOffset),
+                                                          (commandStream->getUsed() - streamOffset));
+        commands.insert(commands.end(), lrrCommands.begin(), lrrCommands.end());
+
+        validateCommands<FamilyType>(commands, true, true);
+    }
+}
+
+using CommandListAppendRangesBarrierXe2AndLater = Test<DeviceFixture>;
+
+HWTEST2_F(CommandListAppendRangesBarrierXe2AndLater, givenCallToAppendRangesBarrierThenPipeControlProgrammed, Platforms) {
+    using GfxFamily = typename NEO::GfxFamilyMapper<gfxCoreFamily>::GfxFamily;
+    using PIPE_CONTROL = typename GfxFamily::PIPE_CONTROL;
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    commandList->initialize(device, NEO::EngineGroupType::copy, 0u);
+    uint64_t gpuAddress = 0x1200;
+    void *buffer = reinterpret_cast<void *>(gpuAddress);
+    size_t size = 0x1100;
+
+    NEO::MockGraphicsAllocation mockAllocation(buffer, gpuAddress, size);
+    NEO::SvmAllocationData allocData(0);
+    allocData.size = size;
+    allocData.gpuAllocations.addAllocation(&mockAllocation);
+    device->getDriverHandle()->getSvmAllocsManager()->insertSVMAlloc(allocData);
+    const void *ranges[] = {buffer};
+    const size_t sizes[] = {size};
+    commandList->applyMemoryRangesBarrier(1, sizes, ranges);
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList, ptrOffset(commandList->getCmdContainer().getCommandStream()->getCpuBase(), 0), commandList->getCmdContainer().getCommandStream()->getUsed()));
+    auto itor = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
+    EXPECT_NE(cmdList.end(), itor);
+    auto pipeControlCmd = reinterpret_cast<PIPE_CONTROL *>(*itor);
+    EXPECT_TRUE(pipeControlCmd->getDataportFlush());
+    EXPECT_TRUE(pipeControlCmd->getUnTypedDataPortCacheFlush());
+    auto expectedDcFlushEnable = NEO::MemorySynchronizationCommands<GfxFamily>::getDcFlushEnable(true, device->getNEODevice()->getRootDeviceEnvironment());
+    EXPECT_EQ(expectedDcFlushEnable, pipeControlCmd->getDcFlushEnable());
+}
+
+using CommandListXe2AndLaterPreemptionTest = Test<ModuleMutableCommandListFixture>;
+HWTEST2_F(CommandListXe2AndLaterPreemptionTest, givenAppendLaunchKernelWhenKernelFlagRequiresDisablePreemptionThenExpectInterfaceDescriptorDataDisablePreemption, Platforms) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+    using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
+
+    auto &container = commandList->getCmdContainer();
+    auto &cmdListStream = *container.getCommandStream();
+
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.requiresDisabledMidThreadPreemption = true;
+
+    ze_group_count_t groupCount{1, 1, 1};
+    CmdListKernelLaunchParams launchParams = {};
+    size_t sizeBefore = cmdListStream.getUsed();
+    auto result = commandList->appendLaunchKernel(kernel->toHandle(), groupCount, nullptr, 0, nullptr, launchParams, false);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    size_t sizeAfter = cmdListStream.getUsed();
+
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList,
+        ptrOffset(cmdListStream.getCpuBase(), sizeBefore),
+        sizeAfter - sizeBefore));
+
+    auto walkerCmds = findAll<DefaultWalkerType *>(cmdList.begin(), cmdList.end());
+    ASSERT_EQ(1u, walkerCmds.size());
+
+    auto walkerCmd = reinterpret_cast<DefaultWalkerType *>(*walkerCmds[0]);
+    auto &idd = walkerCmd->getInterfaceDescriptor();
+    EXPECT_FALSE(idd.getThreadPreemption());
+}
+
+HWTEST2_F(CommandListXe2AndLaterPreemptionTest,
+          givenAppendLaunchKernelWhenKernelRequiresDisablePreemptionForRayTracingAndKernelIsUsingRayTracingCallsThenExpectInterfaceDescriptorDataDisablePreemption,
+          Platforms) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+    using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
+
+    auto &container = commandList->getCmdContainer();
+    auto &cmdListStream = *container.getCommandStream();
+
+    NEO::MockGraphicsAllocation rtMockAllocation;
+    neoDevice->rtMemoryBackedBuffer = &rtMockAllocation;
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.hasRTCalls = true;
+    kernel->midThreadPreemptionDisallowedForRayTracingKernels = true;
+
+    ze_group_count_t groupCount{1, 1, 1};
+    CmdListKernelLaunchParams launchParams = {};
+    size_t sizeBefore = cmdListStream.getUsed();
+    auto result = commandList->appendLaunchKernel(kernel->toHandle(), groupCount, nullptr, 0, nullptr, launchParams, false);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    size_t sizeAfter = cmdListStream.getUsed();
+
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList,
+        ptrOffset(cmdListStream.getCpuBase(), sizeBefore),
+        sizeAfter - sizeBefore));
+
+    auto walkerCmds = findAll<DefaultWalkerType *>(cmdList.begin(), cmdList.end());
+    ASSERT_EQ(1u, walkerCmds.size());
+
+    auto walkerCmd = reinterpret_cast<DefaultWalkerType *>(*walkerCmds[0]);
+    auto &idd = walkerCmd->getInterfaceDescriptor();
+    EXPECT_FALSE(idd.getThreadPreemption());
+
+    neoDevice->rtMemoryBackedBuffer = nullptr;
+}
+
+HWTEST2_F(CommandListXe2AndLaterPreemptionTest,
+          givenAppendLaunchKernelWhenKernelRequiresDisablePreemptionForRayTracingAndKernelIsNotUsingRayTracingCallsThenExpectInterfaceDescriptorDataEnablePreemption,
+          Platforms) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+    using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
+
+    auto &container = commandList->getCmdContainer();
+    auto &cmdListStream = *container.getCommandStream();
+
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.hasRTCalls = false;
+    kernel->midThreadPreemptionDisallowedForRayTracingKernels = true;
+
+    ze_group_count_t groupCount{1, 1, 1};
+    CmdListKernelLaunchParams launchParams = {};
+    size_t sizeBefore = cmdListStream.getUsed();
+    auto result = commandList->appendLaunchKernel(kernel->toHandle(), groupCount, nullptr, 0, nullptr, launchParams, false);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    size_t sizeAfter = cmdListStream.getUsed();
+
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList,
+        ptrOffset(cmdListStream.getCpuBase(), sizeBefore),
+        sizeAfter - sizeBefore));
+
+    auto walkerCmds = findAll<DefaultWalkerType *>(cmdList.begin(), cmdList.end());
+    ASSERT_EQ(1u, walkerCmds.size());
+
+    auto walkerCmd = reinterpret_cast<DefaultWalkerType *>(*walkerCmds[0]);
+    auto &idd = walkerCmd->getInterfaceDescriptor();
+    EXPECT_TRUE(idd.getThreadPreemption());
+}
+
+HWTEST2_F(CommandListXe2AndLaterPreemptionTest,
+          givenAppendLaunchKernelWhenKernelDoNotRequireDisablePreemptionForRayTracingAndKernelIsUsingRayTracingCallsThenExpectInterfaceDescriptorDataEnablePreemption,
+          Platforms) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+    using INTERFACE_DESCRIPTOR_DATA = typename FamilyType::INTERFACE_DESCRIPTOR_DATA;
+
+    auto &container = commandList->getCmdContainer();
+    auto &cmdListStream = *container.getCommandStream();
+
+    NEO::MockGraphicsAllocation rtMockAllocation;
+    neoDevice->rtMemoryBackedBuffer = &rtMockAllocation;
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.hasRTCalls = true;
+    kernel->midThreadPreemptionDisallowedForRayTracingKernels = false;
+
+    ze_group_count_t groupCount{1, 1, 1};
+    CmdListKernelLaunchParams launchParams = {};
+    size_t sizeBefore = cmdListStream.getUsed();
+    auto result = commandList->appendLaunchKernel(kernel->toHandle(), groupCount, nullptr, 0, nullptr, launchParams, false);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    size_t sizeAfter = cmdListStream.getUsed();
+
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList,
+        ptrOffset(cmdListStream.getCpuBase(), sizeBefore),
+        sizeAfter - sizeBefore));
+
+    auto walkerCmds = findAll<DefaultWalkerType *>(cmdList.begin(), cmdList.end());
+    ASSERT_EQ(1u, walkerCmds.size());
+
+    auto walkerCmd = reinterpret_cast<DefaultWalkerType *>(*walkerCmds[0]);
+    auto &idd = walkerCmd->getInterfaceDescriptor();
+    EXPECT_TRUE(idd.getThreadPreemption());
+
+    neoDevice->rtMemoryBackedBuffer = nullptr;
+}
+
+HWTEST2_F(CommandListXe2AndLaterPreemptionTest,
+          givenObtainKernelPreemptionModeWhenInDeviceFrocePreemptionModeDifferentThanMidThreadThenThreadGroupPreemptionModeIsReturned,
+          Platforms) {
+
+    neoDevice->preemptionMode = NEO::PreemptionMode::Disabled;
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.requiresDisabledMidThreadPreemption = false;
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.hasRTCalls = false;
+    kernel->midThreadPreemptionDisallowedForRayTracingKernels = false;
+
+    auto commandListCore = std::make_unique<WhiteBox<L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    commandListCore->initialize(device, NEO::EngineGroupType::compute, 0u);
+
+    auto result = commandListCore->obtainKernelPreemptionMode(kernel.get());
+    EXPECT_EQ(NEO::PreemptionMode::ThreadGroup, result);
+}
+
+HWTEST2_F(CommandListXe2AndLaterPreemptionTest,
+          givenObtainKernelPreemptionModeWhenInDeviceFrocePreemptionModeMidThreadAndOtherKernelFlagsNotSetThenMidThreadPreemptionModeIsReturned,
+          Platforms) {
+
+    neoDevice->preemptionMode = NEO::PreemptionMode::MidThread;
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.requiresDisabledMidThreadPreemption = false;
+    mockKernelImmData->kernelDescriptor->kernelAttributes.flags.hasRTCalls = false;
+    kernel->midThreadPreemptionDisallowedForRayTracingKernels = false;
+
+    auto commandListCore = std::make_unique<WhiteBox<L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    commandListCore->initialize(device, NEO::EngineGroupType::compute, 0u);
+
+    auto result = commandListCore->obtainKernelPreemptionMode(kernel.get());
+    EXPECT_EQ(NEO::PreemptionMode::MidThread, result);
+}
+} // namespace ult
+} // namespace L0

level_zero/core/test/unit_tests/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_XE2_HPG_CORE)
+  target_sources(${TARGET_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/test_cmdlist_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/test_cmdqueue_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/test_device_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/test_l0_gfx_core_helper_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/test_module_xe2_hpg_core.cpp
+  )
+endif()

level_zero/core/test/unit_tests/xe2_hpg_core/test_cmdlist_xe2_hpg_core.cpp

@@ -0,0 +1,460 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/product_helper.h"
+#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "level_zero/core/source/event/event.h"
+#include "level_zero/core/test/unit_tests/fixtures/cmdlist_fixture.inl"
+#include "level_zero/core/test/unit_tests/fixtures/module_fixture.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_cmdlist.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_module.h"
+#include "level_zero/core/test/unit_tests/sources/debugger/l0_debugger_fixture.h"
+
+namespace L0 {
+namespace ult {
+
+struct LocalMemoryModuleFixture : public ModuleFixture {
+    void setUp() {
+        debugManager.flags.EnableLocalMemory.set(1);
+        ModuleFixture::setUp();
+    }
+    DebugManagerStateRestore restore;
+};
+
+using CommandListAppendLaunchKernelXe2HpgCore = Test<LocalMemoryModuleFixture>;
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCore, givenAppendKernelWhenKernelNotUsingSystemMemoryAllocationsAndEventNotHostSignalScopeThenExpectsNoSystemFenceUsed, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_result_t result = ZE_RESULT_SUCCESS;
+
+    constexpr size_t size = 4096u;
+    constexpr size_t alignment = 4096u;
+    void *ptr = nullptr;
+
+    ze_device_mem_alloc_desc_t deviceDesc = {};
+    result = context->allocDeviceMem(device->toHandle(),
+                                     &deviceDesc,
+                                     size, alignment, &ptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_NE(nullptr, ptr);
+
+    Mock<::L0::KernelImp> kernel;
+    auto mockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
+    kernel.module = mockModule.get();
+
+    auto allocData = driverHandle->getSvmAllocsManager()->getSVMAlloc(ptr);
+    ASSERT_NE(nullptr, allocData);
+    auto kernelAllocation = allocData->gpuAllocations.getGraphicsAllocation(device->getRootDeviceIndex());
+    ASSERT_NE(nullptr, kernelAllocation);
+    kernel.residencyContainer.push_back(kernelAllocation);
+
+    ze_event_pool_desc_t eventPoolDesc = {};
+    eventPoolDesc.count = 1;
+    auto eventPool = std::unique_ptr<L0::EventPool>(L0::EventPool::create(driverHandle.get(), context, 0, nullptr, &eventPoolDesc, result));
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    ze_event_desc_t eventDesc = {};
+    eventDesc.index = 0;
+    eventDesc.signal = ZE_EVENT_SCOPE_FLAG_DEVICE;
+    eventDesc.wait = 0;
+    auto event = std::unique_ptr<L0::Event>(L0::Event::create<typename FamilyType::TimestampPacketType>(eventPool.get(), &eventDesc, device));
+
+    kernel.setGroupSize(1, 1, 1);
+    ze_group_count_t groupCount{8, 1, 1};
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    result = commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    CmdListKernelLaunchParams launchParams = {};
+    result = commandList->appendLaunchKernelWithParams(&kernel, groupCount, event.get(), launchParams);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+    GenCmdList commands;
+    ASSERT_TRUE(CmdParse<FamilyType>::parseCommandBuffer(
+        commands,
+        commandList->getCmdContainer().getCommandStream()->getCpuBase(),
+        commandList->getCmdContainer().getCommandStream()->getUsed()));
+
+    auto itor = find<DefaultWalkerType *>(commands.begin(), commands.end());
+    ASSERT_NE(itor, commands.end());
+
+    auto walkerCmd = genCmdCast<DefaultWalkerType *>(*itor);
+    auto &postSyncData = walkerCmd->getPostSync();
+    EXPECT_FALSE(postSyncData.getSystemMemoryFenceRequest());
+
+    result = context->freeMem(ptr);
+    ASSERT_EQ(result, ZE_RESULT_SUCCESS);
+}
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCore,
+          givenAppendKernelWhenKernelUsingUsmHostMemoryAllocationsAndEventNotHostSignalScopeThenExpectsNoSystemFenceUsed, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_result_t result = ZE_RESULT_SUCCESS;
+
+    constexpr size_t size = 4096u;
+    constexpr size_t alignment = 4096u;
+    void *ptr = nullptr;
+
+    ze_host_mem_alloc_desc_t hostDesc = {};
+    result = context->allocHostMem(&hostDesc, size, alignment, &ptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_NE(nullptr, ptr);
+
+    Mock<::L0::KernelImp> kernel;
+    auto mockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
+    kernel.module = mockModule.get();
+
+    auto allocData = driverHandle->getSvmAllocsManager()->getSVMAlloc(ptr);
+    ASSERT_NE(nullptr, allocData);
+    auto kernelAllocation = allocData->gpuAllocations.getGraphicsAllocation(device->getRootDeviceIndex());
+    ASSERT_NE(nullptr, kernelAllocation);
+    kernel.residencyContainer.push_back(kernelAllocation);
+
+    ze_event_pool_desc_t eventPoolDesc = {};
+    eventPoolDesc.count = 1;
+    auto eventPool = std::unique_ptr<L0::EventPool>(L0::EventPool::create(driverHandle.get(), context, 0, nullptr, &eventPoolDesc, result));
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    ze_event_desc_t eventDesc = {};
+    eventDesc.index = 0;
+    eventDesc.signal = ZE_EVENT_SCOPE_FLAG_DEVICE;
+    eventDesc.wait = 0;
+    auto event = std::unique_ptr<L0::Event>(L0::Event::create<typename FamilyType::TimestampPacketType>(eventPool.get(), &eventDesc, device));
+
+    kernel.setGroupSize(1, 1, 1);
+    ze_group_count_t groupCount{8, 1, 1};
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    result = commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    CmdListKernelLaunchParams launchParams = {};
+    result = commandList->appendLaunchKernelWithParams(&kernel, groupCount, event.get(), launchParams);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+    GenCmdList commands;
+    ASSERT_TRUE(CmdParse<FamilyType>::parseCommandBuffer(
+        commands,
+        commandList->getCmdContainer().getCommandStream()->getCpuBase(),
+        commandList->getCmdContainer().getCommandStream()->getUsed()));
+
+    auto itor = find<DefaultWalkerType *>(commands.begin(), commands.end());
+    ASSERT_NE(itor, commands.end());
+
+    auto walkerCmd = genCmdCast<DefaultWalkerType *>(*itor);
+    auto &postSyncData = walkerCmd->getPostSync();
+    EXPECT_FALSE(postSyncData.getSystemMemoryFenceRequest());
+
+    result = context->freeMem(ptr);
+    ASSERT_EQ(result, ZE_RESULT_SUCCESS);
+}
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCore,
+          givenAppendKernelWhenMigrationOnComputeUsingUsmSharedCpuMemoryAllocationsAndEventNotHostSignalScopeThenExpectsNoSystemFenceUsed, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_result_t result = ZE_RESULT_SUCCESS;
+
+    constexpr size_t size = 4096u;
+    constexpr size_t alignment = 4096u;
+    void *ptr = nullptr;
+
+    ze_host_mem_alloc_desc_t hostDesc = {};
+    ze_device_mem_alloc_desc_t deviceDesc = {};
+    result = context->allocSharedMem(device->toHandle(), &deviceDesc, &hostDesc, size, alignment, &ptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_NE(nullptr, ptr);
+
+    auto allocData = driverHandle->getSvmAllocsManager()->getSVMAlloc(ptr);
+    ASSERT_NE(nullptr, allocData);
+    auto dstAllocation = allocData->cpuAllocation;
+    ASSERT_NE(nullptr, dstAllocation);
+    auto srcAllocation = allocData->gpuAllocations.getGraphicsAllocation(device->getRootDeviceIndex());
+    ASSERT_NE(nullptr, srcAllocation);
+
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    result = commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    result = commandList->appendPageFaultCopy(dstAllocation, srcAllocation, size, false);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_TRUE(commandList->usedKernelLaunchParams.isBuiltInKernel);
+    EXPECT_FALSE(commandList->usedKernelLaunchParams.isKernelSplitOperation);
+    EXPECT_TRUE(commandList->usedKernelLaunchParams.isDestinationAllocationInSystemMemory);
+
+    GenCmdList commands;
+    ASSERT_TRUE(CmdParse<FamilyType>::parseCommandBuffer(
+        commands,
+        commandList->getCmdContainer().getCommandStream()->getCpuBase(),
+        commandList->getCmdContainer().getCommandStream()->getUsed()));
+
+    auto itor = find<DefaultWalkerType *>(commands.begin(), commands.end());
+    ASSERT_NE(itor, commands.end());
+
+    auto walkerCmd = genCmdCast<DefaultWalkerType *>(*itor);
+    auto &postSyncData = walkerCmd->getPostSync();
+    EXPECT_FALSE(postSyncData.getSystemMemoryFenceRequest());
+
+    result = context->freeMem(ptr);
+    ASSERT_EQ(result, ZE_RESULT_SUCCESS);
+}
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCore,
+          givenAppendKernelWhenKernelUsingIndirectSystemMemoryAllocationsAndEventNotHostSignalScopeThenExpectsNoSystemFenceUsed, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_result_t result = ZE_RESULT_SUCCESS;
+
+    constexpr size_t size = 4096u;
+    constexpr size_t alignment = 4096u;
+    void *ptr = nullptr;
+
+    ze_device_mem_alloc_desc_t deviceDesc = {};
+    result = context->allocDeviceMem(device->toHandle(),
+                                     &deviceDesc,
+                                     size, alignment, &ptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_NE(nullptr, ptr);
+
+    Mock<::L0::KernelImp> kernel;
+    auto mockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
+    kernel.module = mockModule.get();
+
+    auto allocData = driverHandle->getSvmAllocsManager()->getSVMAlloc(ptr);
+    ASSERT_NE(nullptr, allocData);
+    auto kernelAllocation = allocData->gpuAllocations.getGraphicsAllocation(device->getRootDeviceIndex());
+    ASSERT_NE(nullptr, kernelAllocation);
+    kernel.residencyContainer.push_back(kernelAllocation);
+
+    kernel.unifiedMemoryControls.indirectHostAllocationsAllowed = true;
+
+    ze_event_pool_desc_t eventPoolDesc = {};
+    eventPoolDesc.count = 1;
+    auto eventPool = std::unique_ptr<L0::EventPool>(L0::EventPool::create(driverHandle.get(), context, 0, nullptr, &eventPoolDesc, result));
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    ze_event_desc_t eventDesc = {};
+    eventDesc.index = 0;
+    eventDesc.signal = ZE_EVENT_SCOPE_FLAG_DEVICE;
+    eventDesc.wait = 0;
+    auto event = std::unique_ptr<L0::Event>(L0::Event::create<typename FamilyType::TimestampPacketType>(eventPool.get(), &eventDesc, device));
+
+    kernel.setGroupSize(1, 1, 1);
+    ze_group_count_t groupCount{8, 1, 1};
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    result = commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    CmdListKernelLaunchParams launchParams = {};
+    result = commandList->appendLaunchKernelWithParams(&kernel, groupCount, event.get(), launchParams);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+    GenCmdList commands;
+    ASSERT_TRUE(CmdParse<FamilyType>::parseCommandBuffer(
+        commands,
+        commandList->getCmdContainer().getCommandStream()->getCpuBase(),
+        commandList->getCmdContainer().getCommandStream()->getUsed()));
+
+    auto itor = find<DefaultWalkerType *>(commands.begin(), commands.end());
+    ASSERT_NE(itor, commands.end());
+
+    auto walkerCmd = genCmdCast<DefaultWalkerType *>(*itor);
+    auto &postSyncData = walkerCmd->getPostSync();
+    EXPECT_FALSE(postSyncData.getSystemMemoryFenceRequest());
+
+    result = context->freeMem(ptr);
+    ASSERT_EQ(result, ZE_RESULT_SUCCESS);
+}
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCore,
+          givenAppendKernelWhenKernelUsingDeviceMemoryAllocationsAndEventHostSignalScopeThenExpectsNoSystemFenceUsed, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_result_t result = ZE_RESULT_SUCCESS;
+
+    constexpr size_t size = 4096u;
+    constexpr size_t alignment = 4096u;
+    void *ptr = nullptr;
+
+    ze_device_mem_alloc_desc_t deviceDesc = {};
+    result = context->allocDeviceMem(device->toHandle(),
+                                     &deviceDesc,
+                                     size, alignment, &ptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_NE(nullptr, ptr);
+
+    Mock<::L0::KernelImp> kernel;
+    auto mockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
+    kernel.module = mockModule.get();
+
+    auto allocData = driverHandle->getSvmAllocsManager()->getSVMAlloc(ptr);
+    ASSERT_NE(nullptr, allocData);
+    auto kernelAllocation = allocData->gpuAllocations.getGraphicsAllocation(device->getRootDeviceIndex());
+    ASSERT_NE(nullptr, kernelAllocation);
+    kernel.residencyContainer.push_back(kernelAllocation);
+
+    ze_event_pool_desc_t eventPoolDesc = {};
+    eventPoolDesc.count = 1;
+    auto eventPool = std::unique_ptr<L0::EventPool>(L0::EventPool::create(driverHandle.get(), context, 0, nullptr, &eventPoolDesc, result));
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    ze_event_desc_t eventDesc = {};
+    eventDesc.index = 0;
+    eventDesc.signal = ZE_EVENT_SCOPE_FLAG_HOST;
+    eventDesc.wait = 0;
+    auto event = std::unique_ptr<L0::Event>(L0::Event::create<typename FamilyType::TimestampPacketType>(eventPool.get(), &eventDesc, device));
+
+    kernel.setGroupSize(1, 1, 1);
+    ze_group_count_t groupCount{8, 1, 1};
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    result = commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    CmdListKernelLaunchParams launchParams = {};
+    result = commandList->appendLaunchKernelWithParams(&kernel, groupCount, event.get(), launchParams);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+    GenCmdList commands;
+    ASSERT_TRUE(CmdParse<FamilyType>::parseCommandBuffer(
+        commands,
+        commandList->getCmdContainer().getCommandStream()->getCpuBase(),
+        commandList->getCmdContainer().getCommandStream()->getUsed()));
+
+    auto itor = find<DefaultWalkerType *>(commands.begin(), commands.end());
+    ASSERT_NE(itor, commands.end());
+
+    auto walkerCmd = genCmdCast<DefaultWalkerType *>(*itor);
+    auto &postSyncData = walkerCmd->getPostSync();
+    EXPECT_FALSE(postSyncData.getSystemMemoryFenceRequest());
+
+    result = context->freeMem(ptr);
+    ASSERT_EQ(result, ZE_RESULT_SUCCESS);
+}
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCore,
+          givenAppendKernelWhenKernelUsingUsmHostMemoryAllocationsAndEventHostSignalScopeThenExpectsSystemFenceUsed, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_result_t result = ZE_RESULT_SUCCESS;
+
+    constexpr size_t size = 4096u;
+    constexpr size_t alignment = 4096u;
+    void *ptr = nullptr;
+
+    ze_host_mem_alloc_desc_t hostDesc = {};
+    result = context->allocHostMem(&hostDesc, size, alignment, &ptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_NE(nullptr, ptr);
+
+    Mock<::L0::KernelImp> kernel;
+    auto mockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
+    kernel.module = mockModule.get();
+
+    auto allocData = driverHandle->getSvmAllocsManager()->getSVMAlloc(ptr);
+    ASSERT_NE(nullptr, allocData);
+    auto kernelAllocation = allocData->gpuAllocations.getGraphicsAllocation(device->getRootDeviceIndex());
+    ASSERT_NE(nullptr, kernelAllocation);
+    kernel.residencyContainer.push_back(kernelAllocation);
+
+    ze_event_pool_desc_t eventPoolDesc = {};
+    eventPoolDesc.count = 1;
+    auto eventPool = std::unique_ptr<L0::EventPool>(L0::EventPool::create(driverHandle.get(), context, 0, nullptr, &eventPoolDesc, result));
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    ze_event_desc_t eventDesc = {};
+    eventDesc.index = 0;
+    eventDesc.signal = ZE_EVENT_SCOPE_FLAG_HOST;
+    eventDesc.wait = 0;
+    auto event = std::unique_ptr<L0::Event>(L0::Event::create<typename FamilyType::TimestampPacketType>(eventPool.get(), &eventDesc, device));
+
+    kernel.setGroupSize(1, 1, 1);
+    ze_group_count_t groupCount{8, 1, 1};
+    auto commandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    result = commandList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    CmdListKernelLaunchParams launchParams = {};
+    result = commandList->appendLaunchKernelWithParams(&kernel, groupCount, event.get(), launchParams);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+
+    GenCmdList commands;
+    ASSERT_TRUE(CmdParse<FamilyType>::parseCommandBuffer(
+        commands,
+        commandList->getCmdContainer().getCommandStream()->getCpuBase(),
+        commandList->getCmdContainer().getCommandStream()->getUsed()));
+
+    auto itor = find<DefaultWalkerType *>(commands.begin(), commands.end());
+    ASSERT_NE(itor, commands.end());
+
+    auto walkerCmd = genCmdCast<DefaultWalkerType *>(*itor);
+    auto &postSyncData = walkerCmd->getPostSync();
+    EXPECT_TRUE(postSyncData.getSystemMemoryFenceRequest());
+
+    result = context->freeMem(ptr);
+    ASSERT_EQ(result, ZE_RESULT_SUCCESS);
+}
+
+using CommandListAppendLaunchKernelXe2HpgCoreDebugger = Test<L0DebuggerHwFixture>;
+
+HWTEST2_F(CommandListAppendLaunchKernelXe2HpgCoreDebugger, givenDebuggingEnabledWhenKernelAppendedThenIDDDoesNotHaveMidThreadPreemptionEnabled, IsXe2HpgCore) {
+    using DefaultWalkerType = typename FamilyType::DefaultWalkerType;
+
+    ze_command_queue_desc_t queueDesc = {};
+    auto queue = std::make_unique<Mock<CommandQueue>>(device, device->getNEODevice()->getDefaultEngine().commandStreamReceiver, &queueDesc);
+
+    ze_group_count_t groupCount{128, 1, 1};
+    auto immediateCmdList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<gfxCoreFamily>>>();
+    immediateCmdList->cmdListType = ::L0::CommandList::CommandListType::typeImmediate;
+    immediateCmdList->isFlushTaskSubmissionEnabled = false;
+    immediateCmdList->cmdQImmediate = queue.get();
+    auto result = immediateCmdList->initialize(device, NEO::EngineGroupType::compute, 0u);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+
+    auto cmdStream = immediateCmdList->getCmdContainer().getCommandStream();
+
+    auto sizeBefore = cmdStream->getUsed();
+    CmdListKernelLaunchParams launchParams = {};
+    Mock<::L0::KernelImp> kernel;
+    auto mockModule = std::unique_ptr<Module>(new Mock<Module>(device, nullptr));
+    kernel.module = mockModule.get();
+
+    kernel.setGroupSize(1, 1, 1);
+
+    result = immediateCmdList->appendLaunchKernelWithParams(&kernel, groupCount, nullptr, launchParams);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, result);
+    auto sizeAfter = cmdStream->getUsed();
+
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList,
+        ptrOffset(cmdStream->getCpuBase(), sizeBefore),
+        sizeAfter - sizeBefore));
+
+    auto itorWalker = find<DefaultWalkerType *>(cmdList.begin(), cmdList.end());
+    ASSERT_NE(cmdList.end(), itorWalker);
+    auto cmdWalker = genCmdCast<DefaultWalkerType *>(*itorWalker);
+
+    EXPECT_EQ(0u, cmdWalker->getInterfaceDescriptor().getThreadPreemption());
+}
+
+using CmdListThreadArbitrationTestXe2HpgCore = Test<CmdListThreadArbitrationFixture>;
+
+using ThreadArbitrationSupport = IsAnyProducts<IGFX_BMG, IGFX_LUNARLAKE>;
+HWTEST2_F(CmdListThreadArbitrationTestXe2HpgCore,
+          givenAppendThreadArbitrationKernelToCommandListWhenExecutingCommandListThenStateComputeModeStateIsTrackedCorrectly, ThreadArbitrationSupport) {
+    testBody<FamilyType>();
+}
+
+using CmdListLargeGrfTestXe2Hpg = Test<CmdListLargeGrfFixture>;
+
+using LargeGrfSupport = IsAnyProducts<IGFX_BMG, IGFX_LUNARLAKE>;
+HWTEST2_F(CmdListLargeGrfTestXe2Hpg,
+          givenAppendLargeGrfKernelToCommandListWhenExecutingCommandListThenStateComputeModeStateIsTrackedCorrectly, LargeGrfSupport) {
+    testBody<FamilyType>();
+}
+
+} // namespace ult
+} // namespace L0

level_zero/core/test/unit_tests/xe2_hpg_core/test_cmdqueue_xe2_hpg_core.cpp

@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
+#include "shared/test/common/helpers/default_hw_info.h"
+#include "shared/test/common/mocks/mock_command_stream_receiver.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "level_zero/core/source/cmdlist/cmdlist.h"
+#include "level_zero/core/source/driver/driver_handle_imp.h"
+#include "level_zero/core/test/unit_tests/fixtures/device_fixture.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_cmdqueue.h"
+
+namespace L0 {
+namespace ult {
+
+using CommandQueueCommandsXe2HpgCore = Test<DeviceFixture>;
+
+HWTEST2_F(CommandQueueCommandsXe2HpgCore, givenCommandQueueWhenExecutingCommandListsThenStateSystemMemFenceAddressCmdIsGenerated, IsAtLeastXe2HpgCore) {
+    using STATE_SYSTEM_MEM_FENCE_ADDRESS = typename FamilyType::STATE_SYSTEM_MEM_FENCE_ADDRESS;
+    ze_command_queue_desc_t desc = {};
+    auto csr = neoDevice->getDefaultEngine().commandStreamReceiver;
+
+    auto commandQueue = new MockCommandQueueHw<gfxCoreFamily>(device, csr, &desc);
+    commandQueue->initialize(false, false, false);
+
+    ze_result_t returnValue;
+    std::unique_ptr<L0::CommandList> commandList(CommandList::create(productFamily, device, NEO::EngineGroupType::compute, 0u, returnValue, false));
+    auto commandListHandle = commandList->toHandle();
+    commandList->close();
+
+    commandQueue->executeCommandLists(1, &commandListHandle, nullptr, false, nullptr);
+
+    auto globalFence = csr->getGlobalFenceAllocation();
+
+    auto used = commandQueue->commandStream.getUsed();
+    GenCmdList cmdList;
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(
+        cmdList, commandQueue->commandStream.getCpuBase(), used));
+
+    auto itor = find<STATE_SYSTEM_MEM_FENCE_ADDRESS *>(cmdList.begin(), cmdList.end());
+    ASSERT_NE(cmdList.end(), itor);
+
+    auto systemMemFenceAddressCmd = genCmdCast<STATE_SYSTEM_MEM_FENCE_ADDRESS *>(*itor);
+    EXPECT_EQ(globalFence->getGpuAddress(), systemMemFenceAddressCmd->getSystemMemoryFenceAddress());
+
+    commandQueue->destroy();
+}
+
+HWTEST2_F(CommandQueueCommandsXe2HpgCore, givenCommandQueueWhenExecutingCommandListsForTheSecondTimeThenStateSystemMemFenceAddressCmdIsNotGenerated, IsAtLeastXe2HpgCore) {
+    using STATE_SYSTEM_MEM_FENCE_ADDRESS = typename FamilyType::STATE_SYSTEM_MEM_FENCE_ADDRESS;
+    ze_command_queue_desc_t desc = {};
+    auto csr = neoDevice->getDefaultEngine().commandStreamReceiver;
+
+    auto commandQueue = new MockCommandQueueHw<gfxCoreFamily>(device, csr, &desc);
+    commandQueue->initialize(false, false, false);
+
+    ze_result_t returnValue;
+    std::unique_ptr<L0::CommandList> commandList(CommandList::create(productFamily, device, NEO::EngineGroupType::compute, 0u, returnValue, false));
+    auto commandListHandle = commandList->toHandle();
+    commandList->close();
+
+    commandQueue->executeCommandLists(1, &commandListHandle, nullptr, false, nullptr);
+    auto usedSpaceAfter1stExecute = commandQueue->commandStream.getUsed();
+    commandQueue->executeCommandLists(1, &commandListHandle, nullptr, false, nullptr);
+    auto usedSpaceOn2ndExecute = commandQueue->commandStream.getUsed() - usedSpaceAfter1stExecute;
+
+    GenCmdList cmdList;
+    auto cmdBufferAddress = ptrOffset(commandQueue->commandStream.getCpuBase(), usedSpaceAfter1stExecute);
+    ASSERT_TRUE(FamilyType::Parse::parseCommandBuffer(cmdList, cmdBufferAddress, usedSpaceOn2ndExecute));
+
+    auto itor = find<STATE_SYSTEM_MEM_FENCE_ADDRESS *>(cmdList.begin(), cmdList.end());
+    EXPECT_EQ(cmdList.end(), itor);
+
+    commandQueue->destroy();
+}
+
+} // namespace ult
+} // namespace L0

level_zero/core/test/unit_tests/xe2_hpg_core/test_device_xe2_hpg_core.cpp

@@ -0,0 +1,293 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "level_zero/core/test/unit_tests/fixtures/device_fixture.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_device.h"
+
+namespace L0 {
+namespace ult {
+
+using DeviceXe2HpgCoreTest = Test<DeviceFixture>;
+
+HWTEST2_F(DeviceXe2HpgCoreTest, whenCallingGetMemoryPropertiesWithNonNullPtrThenPropertiesAreReturned, IsXe2HpgCore) {
+    uint32_t count = 0;
+    ze_result_t res = device->getMemoryProperties(&count, nullptr);
+    EXPECT_EQ(res, ZE_RESULT_SUCCESS);
+    EXPECT_EQ(1u, count);
+
+    ze_device_memory_properties_t memProperties = {};
+    res = device->getMemoryProperties(&count, &memProperties);
+    EXPECT_EQ(res, ZE_RESULT_SUCCESS);
+    EXPECT_EQ(1u, count);
+
+    EXPECT_EQ(memProperties.maxClockRate, 0u);
+    EXPECT_EQ(memProperties.maxBusWidth, this->neoDevice->getDeviceInfo().addressBits);
+    EXPECT_EQ(memProperties.totalSize, this->neoDevice->getDeviceInfo().globalMemSize);
+}
+
+HWTEST2_F(DeviceXe2HpgCoreTest, GivenTargetXeHpgCoreWhenGettingDpSupportThenReturnsTrue, IsXe2HpgCore) {
+    ze_device_module_properties_t deviceModProps = {ZE_STRUCTURE_TYPE_DEVICE_MODULE_PROPERTIES};
+    ze_intel_device_module_dp_exp_properties_t moduleDpProps = {ZE_STRUCTURE_INTEL_DEVICE_MODULE_DP_EXP_PROPERTIES};
+    moduleDpProps.flags = 0u;
+    deviceModProps.pNext = &moduleDpProps;
+
+    ze_result_t res = device->getKernelProperties(&deviceModProps);
+    EXPECT_EQ(res, ZE_RESULT_SUCCESS);
+
+    bool dp4a = moduleDpProps.flags & ZE_INTEL_DEVICE_MODULE_EXP_FLAG_DP4A;
+    bool dpas = moduleDpProps.flags & ZE_INTEL_DEVICE_MODULE_EXP_FLAG_DPAS;
+    EXPECT_TRUE(dp4a);
+    EXPECT_TRUE(dpas);
+}
+
+using CommandQueueGroupTest = Test<DeviceFixture>;
+
+HWTEST2_F(CommandQueueGroupTest, givenNoBlitterSupportAndNoCCSThenOneQueueGroupIsReturned, IsXe2HpgCore) {
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = false;
+    hwInfo.capabilityTable.blitterOperationsSupported = false;
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo, rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+    EXPECT_GE(count, 1u);
+}
+
+HWTEST2_F(CommandQueueGroupTest, givenNoBlitterSupportAndCCSThenTwoQueueGroupsAreReturned, IsXe2HpgCore) {
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = true;
+    hwInfo.capabilityTable.blitterOperationsSupported = false;
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo, rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+    EXPECT_GE(count, 2u);
+}
+
+HWTEST2_F(CommandQueueGroupTest, givenBlitterSupportAndCCSThenFourQueueGroupsAreReturned, IsXe2HpgCore) {
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = true;
+    hwInfo.capabilityTable.blitterOperationsSupported = true;
+    hwInfo.featureTable.ftrBcsInfo.set();
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo, rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+    EXPECT_GE(count, 4u);
+
+    std::vector<ze_command_queue_group_properties_t> properties(count);
+    res = deviceImp.getCommandQueueGroupProperties(&count, properties.data());
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+
+    auto &engineGroups = neoMockDevice->getRegularEngineGroups();
+    for (uint32_t i = 0; i < count; i++) {
+        if (engineGroups[i].engineGroupType == NEO::EngineGroupType::renderCompute) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COMPUTE);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COOPERATIVE_KERNELS);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_METRICS);
+            EXPECT_EQ(properties[i].numQueues, 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, std::numeric_limits<size_t>::max());
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::compute) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COMPUTE);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COOPERATIVE_KERNELS);
+            uint32_t numerOfCCSEnabled = hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled;
+            EXPECT_EQ(properties[i].numQueues, numerOfCCSEnabled);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, std::numeric_limits<size_t>::max());
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::copy) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_EQ(properties[i].numQueues, 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, sizeof(uint8_t));
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::linkedCopy) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_EQ(properties[i].numQueues, hwInfo.featureTable.ftrBcsInfo.count() - 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, sizeof(uint8_t));
+        }
+    }
+}
+
+HWTEST2_F(CommandQueueGroupTest, givenBlitterSupportCCSAndLinkedBcsDisabledThenThreeQueueGroupsAreReturned, IsXe2HpgCore) {
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = true;
+    hwInfo.capabilityTable.blitterOperationsSupported = true;
+    hwInfo.featureTable.ftrBcsInfo.set(0);
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo, rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+    EXPECT_GE(count, 3u);
+
+    std::vector<ze_command_queue_group_properties_t> properties(count);
+    res = deviceImp.getCommandQueueGroupProperties(&count, properties.data());
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+
+    auto &engineGroups = neoMockDevice->getRegularEngineGroups();
+    for (uint32_t i = 0; i < count; i++) {
+        if (engineGroups[i].engineGroupType == NEO::EngineGroupType::renderCompute) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COMPUTE);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COOPERATIVE_KERNELS);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_METRICS);
+            EXPECT_EQ(properties[i].numQueues, 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, std::numeric_limits<size_t>::max());
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::compute) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COMPUTE);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COOPERATIVE_KERNELS);
+            uint32_t numerOfCCSEnabled = hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled;
+            EXPECT_EQ(properties[i].numQueues, numerOfCCSEnabled);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, std::numeric_limits<size_t>::max());
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::copy) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_EQ(properties[i].numQueues, 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, sizeof(uint8_t));
+        }
+    }
+}
+
+HWTEST2_F(CommandQueueGroupTest, givenBlitterDisabledAndAllBcsSetThenTwoQueueGroupsAreReturned, IsXe2HpgCore) {
+    DebugManagerStateRestore dbgRestorer;
+    debugManager.flags.EnableBlitterOperationsSupport.set(0);
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = true;
+    hwInfo.featureTable.ftrBcsInfo.set();
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo, rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+    EXPECT_EQ(count, 2u);
+}
+
+class DeviceCopyQueueGroupXe2HpgCoreFixture : public DeviceFixture {
+  public:
+    void setUp() {
+        debugManager.flags.EnableBlitterOperationsSupport.set(0);
+        DeviceFixture::setUp();
+    }
+
+    void tearDown() {
+        DeviceFixture::tearDown();
+    }
+    DebugManagerStateRestore restorer;
+};
+
+using DeviceCopyQueueGroupXe2HpgCoreTest = Test<DeviceCopyQueueGroupXe2HpgCoreFixture>;
+
+HWTEST2_F(DeviceCopyQueueGroupXe2HpgCoreTest,
+          givenBlitterSupportAndEnableBlitterOperationsSupportSetToZeroThenNoCopyEngineIsReturned, IsXe2HpgCore) {
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = false;
+    hwInfo.capabilityTable.blitterOperationsSupported = true;
+    hwInfo.featureTable.ftrBcsInfo.set(0);
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo,
+                                                                                              rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+
+    std::vector<ze_command_queue_group_properties_t> properties(count);
+    res = deviceImp.getCommandQueueGroupProperties(&count, properties.data());
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+
+    for (auto &engineGroup : neoMockDevice->getRegularEngineGroups()) {
+        EXPECT_NE(NEO::EngineGroupType::copy, engineGroup.engineGroupType);
+    }
+}
+
+class CommandQueueGroupTestXe2HpgCore : public DeviceFixture, public testing::TestWithParam<uint32_t> {
+  public:
+    void SetUp() override {
+        DeviceFixture::setUp();
+    }
+
+    void TearDown() override {
+        DeviceFixture::tearDown();
+    }
+};
+
+HWTEST2_P(CommandQueueGroupTestXe2HpgCore, givenVaryingBlitterSupportAndCCSThenBCSGroupContainsCorrectNumberOfEngines, IsXe2HpgCore) {
+    const uint32_t rootDeviceIndex = 0u;
+    NEO::HardwareInfo hwInfo = *NEO::defaultHwInfo.get();
+    hwInfo.featureTable.flags.ftrCCSNode = true;
+    hwInfo.capabilityTable.blitterOperationsSupported = true;
+    hwInfo.featureTable.ftrBcsInfo = maxNBitValue(2);
+    hwInfo.featureTable.ftrBcsInfo.set(GetParam());
+    auto *neoMockDevice = NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(&hwInfo, rootDeviceIndex);
+    MockDeviceImp deviceImp(neoMockDevice, neoMockDevice->getExecutionEnvironment());
+
+    uint32_t count = 0;
+    ze_result_t res = deviceImp.getCommandQueueGroupProperties(&count, nullptr);
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+    EXPECT_GE(count, 3u);
+
+    std::vector<ze_command_queue_group_properties_t> properties(count);
+    res = deviceImp.getCommandQueueGroupProperties(&count, properties.data());
+    EXPECT_EQ(ZE_RESULT_SUCCESS, res);
+
+    auto &engineGroups = neoMockDevice->getRegularEngineGroups();
+    for (uint32_t i = 0; i < count; i++) {
+        if (engineGroups[i].engineGroupType == NEO::EngineGroupType::renderCompute) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COMPUTE);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COOPERATIVE_KERNELS);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_METRICS);
+            EXPECT_EQ(properties[i].numQueues, 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, std::numeric_limits<size_t>::max());
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::compute) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COMPUTE);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COOPERATIVE_KERNELS);
+            uint32_t numerOfCCSEnabled = hwInfo.gtSystemInfo.CCSInfo.NumberOfCCSEnabled;
+            EXPECT_EQ(properties[i].numQueues, numerOfCCSEnabled);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, std::numeric_limits<size_t>::max());
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::copy) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_EQ(properties[i].numQueues, 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, sizeof(uint8_t));
+        } else if (engineGroups[i].engineGroupType == NEO::EngineGroupType::linkedCopy) {
+            EXPECT_TRUE(properties[i].flags & ZE_COMMAND_QUEUE_GROUP_PROPERTY_FLAG_COPY);
+            EXPECT_EQ(properties[i].numQueues, hwInfo.featureTable.ftrBcsInfo.count() - 1u);
+            EXPECT_EQ(properties[i].maxMemoryFillPatternSize, sizeof(uint8_t));
+        }
+    }
+}
+
+INSTANTIATE_TEST_SUITE_P(
+    CommandQueueGroupTestXe2HpgCoreValues,
+    CommandQueueGroupTestXe2HpgCore,
+    testing::Values(0, 1, 2, 3));
+
+HWTEST2_F(DeviceXe2HpgCoreTest, givenReturnedDevicePropertiesThenExpectedPageFaultSupportReturned, IsXe2HpgCore) {
+    ze_device_properties_t deviceProps = {ZE_STRUCTURE_TYPE_DEVICE_PROPERTIES};
+
+    device->getProperties(&deviceProps);
+    EXPECT_NE(0u, deviceProps.flags & ZE_DEVICE_PROPERTY_FLAG_ONDEMANDPAGING);
+}
+} // namespace ult
+} // namespace L0

level_zero/core/test/unit_tests/xe2_hpg_core/test_l0_gfx_core_helper_xe2_hpg_core.cpp

@@ -0,0 +1,139 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/helpers/default_hw_info.h"
+#include "shared/test/common/mocks/mock_execution_environment.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "level_zero/core/source/gfx_core_helpers/l0_gfx_core_helper.h"
+#include "level_zero/core/test/unit_tests/fixtures/device_fixture.h"
+
+namespace L0 {
+namespace ult {
+
+using L0GfxCoreHelperTestXe2Hpg = Test<DeviceFixture>;
+
+HWTEST_EXCLUDE_PRODUCT(L0GfxCoreHelperTest, givenL0GfxCoreHelperWhenAskingForImageCompressionSupportThenReturnFalse, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(L0GfxCoreHelperTest, givenL0GfxCoreHelperWhenAskingForUsmCompressionSupportThenReturnFalse, IGFX_XE2_HPG_CORE);
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, givenL0GfxCoreHelperWhenGetRegsetTypeForLargeGrfDetectionIsCalledThenSrRegsetTypeIsRetuned) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_EQ(ZET_DEBUG_REGSET_TYPE_SR_INTEL_GPU, l0GfxCoreHelper.getRegsetTypeForLargeGrfDetection());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, givenL0GfxCoreHelperWhenAskingForImageCompressionSupportThenReturnCorrectValue) {
+    DebugManagerStateRestore restore;
+
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+
+    HardwareInfo hwInfo = *NEO::defaultHwInfo;
+
+    hwInfo.capabilityTable.ftrRenderCompressedImages = true;
+    EXPECT_TRUE(l0GfxCoreHelper.imageCompressionSupported(hwInfo));
+
+    hwInfo.capabilityTable.ftrRenderCompressedImages = false;
+    EXPECT_FALSE(l0GfxCoreHelper.imageCompressionSupported(hwInfo));
+
+    NEO::debugManager.flags.RenderCompressedImagesEnabled.set(1);
+    EXPECT_TRUE(l0GfxCoreHelper.imageCompressionSupported(hwInfo));
+
+    hwInfo.capabilityTable.ftrRenderCompressedImages = true;
+    NEO::debugManager.flags.RenderCompressedImagesEnabled.set(0);
+    EXPECT_FALSE(l0GfxCoreHelper.imageCompressionSupported(hwInfo));
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, givenL0GfxCoreHelperWhenAskingForUsmCompressionSupportThenReturnCorrectValue) {
+    DebugManagerStateRestore restore;
+
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+
+    EXPECT_TRUE(l0GfxCoreHelper.forceDefaultUsmCompressionSupport());
+
+    HardwareInfo hwInfo = *NEO::defaultHwInfo;
+
+    hwInfo.capabilityTable.ftrRenderCompressedBuffers = true;
+    EXPECT_TRUE(l0GfxCoreHelper.usmCompressionSupported(hwInfo));
+
+    hwInfo.capabilityTable.ftrRenderCompressedBuffers = false;
+    EXPECT_FALSE(l0GfxCoreHelper.usmCompressionSupported(hwInfo));
+
+    NEO::debugManager.flags.RenderCompressedBuffersEnabled.set(1);
+    EXPECT_TRUE(l0GfxCoreHelper.usmCompressionSupported(hwInfo));
+
+    hwInfo.capabilityTable.ftrRenderCompressedBuffers = true;
+    NEO::debugManager.flags.RenderCompressedBuffersEnabled.set(0);
+    EXPECT_FALSE(l0GfxCoreHelper.usmCompressionSupported(hwInfo));
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForMultiTileCapablePlatformThenReturnFalse) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_FALSE(l0GfxCoreHelper.multiTileCapablePlatform());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForCmdListHeapSharingSupportThenReturnTrue) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_TRUE(l0GfxCoreHelper.platformSupportsCmdListHeapSharing());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForStateComputeModeTrackingSupportThenReturnTrue) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_TRUE(l0GfxCoreHelper.platformSupportsStateComputeModeTracking());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForFrontEndTrackingSupportThenReturnTrue) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_TRUE(l0GfxCoreHelper.platformSupportsFrontEndTracking());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForPipelineSelectTrackingSupportThenReturnTrue) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_TRUE(l0GfxCoreHelper.platformSupportsPipelineSelectTracking());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForStateBaseAddressTrackingSupportThenReturnFalse) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_FALSE(l0GfxCoreHelper.platformSupportsStateBaseAddressTracking(device->getNEODevice()->getRootDeviceEnvironment()));
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenGettingPlatformDefaultHeapAddressModelThenReturnPrivateHeaps) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_EQ(NEO::HeapAddressModel::privateHeaps, l0GfxCoreHelper.getPlatformHeapAddressModel(device->getNEODevice()->getRootDeviceEnvironment()));
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForCmdlistPrimaryBufferSupportThenReturnTrue) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_TRUE(l0GfxCoreHelper.platformSupportsPrimaryBatchBufferCmdList());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForPlatformSupportsImmediateFlushTaskThenReturnTrue) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_TRUE(l0GfxCoreHelper.platformSupportsImmediateComputeFlushTask());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenGettingSupportedRTASFormatThenExpectedFormatIsReturned) {
+    const auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_EQ(RTASDeviceFormatInternal::version1, static_cast<RTASDeviceFormatInternal>(l0GfxCoreHelper.getSupportedRTASFormat()));
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenGettingCmdlistUpdateCapabilityThenReturnCorrectValue) {
+    const auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    EXPECT_EQ(63u, l0GfxCoreHelper.getPlatformCmdListUpdateCapabilities());
+}
+
+XE2_HPG_CORETEST_F(L0GfxCoreHelperTestXe2Hpg, GivenXe2HpgWhenCheckingL0HelperForDeletingIpSamplingEntryWithNullValuesThenMapRemainstheSameSize) {
+    auto &l0GfxCoreHelper = getHelper<L0GfxCoreHelper>();
+    std::map<uint64_t, void *> stallSumIpDataMap;
+    stallSumIpDataMap.emplace(std::pair<uint64_t, void *>(0ull, nullptr));
+    l0GfxCoreHelper.stallIpDataMapDelete(stallSumIpDataMap);
+    EXPECT_NE(0u, stallSumIpDataMap.size());
+}
+
+} // namespace ult
+} // namespace L0

level_zero/core/test/unit_tests/xe2_hpg_core/test_module_xe2_hpg_core.cpp

@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/kernel/kernel_properties.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "level_zero/core/test/unit_tests/fixtures/device_fixture.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_device.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_kernel.h"
+#include "level_zero/core/test/unit_tests/mocks/mock_module.h"
+
+namespace L0 {
+namespace ult {
+
+using KernelPropertyTest = Test<DeviceFixture>;
+
+HWTEST2_F(KernelPropertyTest, givenKernelExtendedPropertiesStructureWhenKernelPropertiesCalledThenPropertiesAreCorrectlySet, IsXe2HpgCore) {
+    ze_device_module_properties_t kernelProperties = {};
+    ze_float_atomic_ext_properties_t kernelExtendedProperties = {};
+    kernelExtendedProperties.stype = ZE_STRUCTURE_TYPE_FLOAT_ATOMIC_EXT_PROPERTIES;
+    kernelProperties.pNext = &kernelExtendedProperties;
+    ze_result_t res = device->getKernelProperties(&kernelProperties);
+    EXPECT_EQ(res, ZE_RESULT_SUCCESS);
+
+    const auto &fp16Properties = kernelExtendedProperties.fp16Flags;
+    EXPECT_TRUE(fp16Properties & FpAtomicExtFlags::globalLoadStore);
+    EXPECT_TRUE(fp16Properties & FpAtomicExtFlags::localLoadStore);
+    EXPECT_TRUE(fp16Properties & FpAtomicExtFlags::globalMinMax);
+    EXPECT_TRUE(fp16Properties & FpAtomicExtFlags::localMinMax);
+
+    EXPECT_FALSE(fp16Properties & FpAtomicExtFlags::globalAdd);
+    EXPECT_FALSE(fp16Properties & FpAtomicExtFlags::localAdd);
+
+    const auto &fp32Properties = kernelExtendedProperties.fp32Flags;
+    EXPECT_TRUE(fp32Properties & FpAtomicExtFlags::globalLoadStore);
+    EXPECT_TRUE(fp32Properties & FpAtomicExtFlags::localLoadStore);
+    EXPECT_TRUE(fp32Properties & FpAtomicExtFlags::globalMinMax);
+    EXPECT_TRUE(fp32Properties & FpAtomicExtFlags::localMinMax);
+    EXPECT_TRUE(fp32Properties & FpAtomicExtFlags::globalAdd);
+    EXPECT_TRUE(fp32Properties & FpAtomicExtFlags::localAdd);
+
+    const auto &fp64Properties = kernelExtendedProperties.fp64Flags;
+    EXPECT_TRUE(fp64Properties & FpAtomicExtFlags::globalLoadStore);
+    EXPECT_TRUE(fp64Properties & FpAtomicExtFlags::localLoadStore);
+    EXPECT_TRUE(fp64Properties & FpAtomicExtFlags::globalMinMax);
+    EXPECT_TRUE(fp64Properties & FpAtomicExtFlags::localMinMax);
+    EXPECT_TRUE(fp64Properties & FpAtomicExtFlags::globalAdd);
+    EXPECT_TRUE(fp64Properties & FpAtomicExtFlags::localAdd);
+}
+
+using Xe2KernelSetupTests = ::testing::Test;
+
+XE2_HPG_CORETEST_F(Xe2KernelSetupTests, givenParamsWhenSetupGroupSizeThenNumThreadsPerThreadGroupAreCorrectly) {
+    VariableBackup<HardwareInfo> backupHwInfo(defaultHwInfo.get());
+
+    {
+        NEO::Device *mockNeoDevice(NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(NEO::defaultHwInfo.get(), 0));
+        MockDeviceImp l0Device(mockNeoDevice, mockNeoDevice->getExecutionEnvironment());
+
+        Mock<KernelImp> kernel;
+        kernel.descriptor.kernelAttributes.numGrfRequired = GrfConfig::defaultGrfNumber;
+        kernel.enableForcingOfGenerateLocalIdByHw = true;
+        Mock<Module> module(&l0Device, nullptr);
+        module.getMaxGroupSizeResult = UINT32_MAX;
+        kernel.module = &module;
+
+        std::array<std::array<uint32_t, 3>, 4> values = {{
+            {16u, 1u, 64u}, // SIMT Size, HW local-id generation, Max Num of threads
+            {32u, 1u, 32u},
+            {16u, 0u, 64u},
+            {32u, 0u, 64u},
+
+        }};
+
+        for (auto &[simtSize, isHwLocalIdGeneration, expectedNumThreadsPerThreadGroup] : values) {
+            kernel.descriptor.kernelAttributes.simdSize = simtSize;
+            kernel.forceGenerateLocalIdByHw = isHwLocalIdGeneration;
+            kernel.setGroupSize(1024u, 1024u, 1024u);
+            EXPECT_EQ(expectedNumThreadsPerThreadGroup, kernel.numThreadsPerThreadGroup);
+            kernel.groupSize[0] = kernel.groupSize[1] = kernel.groupSize[2] = 0;
+        }
+    }
+    {
+        NEO::Device *mockNeoDevice(NEO::MockDevice::createWithNewExecutionEnvironment<NEO::MockDevice>(NEO::defaultHwInfo.get(), 0));
+        MockDeviceImp l0Device(mockNeoDevice, mockNeoDevice->getExecutionEnvironment());
+
+        Mock<KernelImp> kernel;
+        kernel.descriptor.kernelAttributes.numGrfRequired = GrfConfig::largeGrfNumber;
+        kernel.enableForcingOfGenerateLocalIdByHw = true;
+        Mock<Module> module(&l0Device, nullptr);
+        module.getMaxGroupSizeResult = UINT32_MAX;
+        kernel.module = &module;
+
+        std::array<std::array<uint32_t, 3>, 4> values = {{
+            {16u, 0u, 32u}, // SIMT Size, HW local-id generation, Max Num of threads
+            {16u, 1u, 32u},
+            {32u, 0u, 32u},
+            {32u, 1u, 32u},
+        }};
+
+        for (auto &[simtSize, isHwLocalIdGeneration, expectedNumThreadsPerThreadGroup] : values) {
+            kernel.descriptor.kernelAttributes.simdSize = simtSize;
+            kernel.forceGenerateLocalIdByHw = isHwLocalIdGeneration;
+            kernel.setGroupSize(1024u, 1024u, 1024u);
+            EXPECT_EQ(expectedNumThreadsPerThreadGroup, kernel.numThreadsPerThreadGroup);
+            kernel.groupSize[0] = kernel.groupSize[1] = kernel.groupSize[2] = 0;
+        }
+    }
+}
+} // namespace ult
+} // namespace L0

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+add_subdirectories()

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/bmg/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_BMG)
+  target_sources(${L0_STATIC_LIB_NAME}
+                 PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_sysman_product_helper_bmg.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sysman_product_helper_bmg.cpp
+  )
+endif()
+

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/bmg/enable_sysman_product_helper_bmg.cpp

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.h"
+
+namespace L0 {
+namespace Sysman {
+
+static EnableSysmanProductHelper<IGFX_BMG> enableBMG;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/bmg/sysman_product_helper_bmg.cpp

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.h"
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.inl"
+
+namespace L0 {
+namespace Sysman {
+constexpr static auto gfxProduct = IGFX_BMG;
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_xe_hp_and_later.inl"
+
+template <>
+RasInterfaceType SysmanProductHelperHw<gfxProduct>::getGtRasUtilInterface() {
+    return RasInterfaceType::netlink;
+}
+
+template <>
+RasInterfaceType SysmanProductHelperHw<gfxProduct>::getHbmRasUtilInterface() {
+    return RasInterfaceType::netlink;
+}
+
+template class SysmanProductHelperHw<gfxProduct>;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/lnl/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_LNL)
+  target_sources(${L0_STATIC_LIB_NAME}
+                 PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_sysman_product_helper_lnl.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sysman_product_helper_lnl.cpp
+  )
+endif()
+

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/lnl/enable_sysman_product_helper_lnl.cpp

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.h"
+
+namespace L0 {
+namespace Sysman {
+
+static EnableSysmanProductHelper<IGFX_LUNARLAKE> enableLNL;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/linux/product_helper/xe2_hpg_core/lnl/sysman_product_helper_lnl.cpp

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.h"
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_hw.inl"
+
+namespace L0 {
+namespace Sysman {
+constexpr static auto gfxProduct = IGFX_LUNARLAKE;
+
+#include "level_zero/sysman/source/shared/linux/product_helper/sysman_product_helper_xe_hp_and_later.inl"
+
+template <>
+RasInterfaceType SysmanProductHelperHw<gfxProduct>::getGtRasUtilInterface() {
+    return RasInterfaceType::netlink;
+}
+
+template <>
+RasInterfaceType SysmanProductHelperHw<gfxProduct>::getHbmRasUtilInterface() {
+    return RasInterfaceType::netlink;
+}
+
+template class SysmanProductHelperHw<gfxProduct>;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+add_subdirectories()

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/bmg/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_BMG)
+  target_sources(${L0_STATIC_LIB_NAME}
+                 PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_sysman_product_helper_bmg.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sysman_product_helper_bmg.cpp
+  )
+endif()
+

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/bmg/enable_sysman_product_helper_bmg.cpp

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.h"
+
+namespace L0 {
+namespace Sysman {
+
+static EnableSysmanProductHelper<IGFX_BMG> enableBmg;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/bmg/sysman_product_helper_bmg.cpp

@@ -0,0 +1,501 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/debug_helpers.h"
+
+#include "level_zero/sysman/source/shared/windows/pmt/sysman_pmt.h"
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.h"
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.inl"
+#include "level_zero/sysman/source/sysman_const.h"
+
+#include <utility>
+#include <vector>
+
+namespace L0 {
+namespace Sysman {
+
+#define PACK_INTO_64BIT(valueH, valueL) ((static_cast<uint64_t>(valueH) << 32) | static_cast<uint64_t>(valueL))
+
+constexpr static auto gfxProduct = IGFX_BMG;
+
+static std::map<unsigned long, std::map<std::string, uint32_t>> guidToKeyOffsetMap = {
+    {0x1e2f8201, // BMG OOBMSM rev 1
+     {{"SOC_THERMAL_SENSORS_TEMPERATURE_0_2_0_GTTMMADR[2]", 14},
+      {"Package_Temperature_0_0_0_MCHBAR_PCU", 39},
+      {"VRAM_TEMPERATURE_0_2_0_GTTMMADR", 43},
+      {"REG_RX_BYTECOUNT_LSB", 100},
+      {"REG_TX_BYTECOUNT_LSB", 101},
+      {"REG_RX_PKTCOUNT_LSB", 102},
+      {"REG_TX_PKTCOUNT_LSB", 103}}},
+    {0x1e2f8200, // BMG PUNIT rev 1
+     {{"VRAM_BANDWIDTH", 14}}},
+    {0x5e2f8210, // BMG OOBMSM rev 15
+     {{"GDDR_TELEM_CAPTURE_TIMESTAMP_UPPER", 92},
+      {"GDDR_TELEM_CAPTURE_TIMESTAMP_LOWER", 93},
+      {"GDDR0_CH0_GT_32B_RD_REQ_UPPER", 94},
+      {"GDDR0_CH0_GT_32B_RD_REQ_LOWER", 95},
+      {"GDDR1_CH0_GT_32B_RD_REQ_UPPER", 134},
+      {"GDDR1_CH0_GT_32B_RD_REQ_LOWER", 135},
+      {"GDDR2_CH0_GT_32B_RD_REQ_UPPER", 174},
+      {"GDDR2_CH0_GT_32B_RD_REQ_LOWER", 175},
+      {"GDDR3_CH0_GT_32B_RD_REQ_UPPER", 214},
+      {"GDDR3_CH0_GT_32B_RD_REQ_LOWER", 215},
+      {"GDDR4_CH0_GT_32B_RD_REQ_UPPER", 254},
+      {"GDDR4_CH0_GT_32B_RD_REQ_LOWER", 255},
+      {"GDDR5_CH0_GT_32B_RD_REQ_UPPER", 294},
+      {"GDDR5_CH0_GT_32B_RD_REQ_LOWER", 295},
+      {"GDDR0_CH1_GT_32B_RD_REQ_UPPER", 114},
+      {"GDDR0_CH1_GT_32B_RD_REQ_LOWER", 115},
+      {"GDDR1_CH1_GT_32B_RD_REQ_UPPER", 154},
+      {"GDDR1_CH1_GT_32B_RD_REQ_LOWER", 155},
+      {"GDDR2_CH1_GT_32B_RD_REQ_UPPER", 194},
+      {"GDDR2_CH1_GT_32B_RD_REQ_LOWER", 195},
+      {"GDDR3_CH1_GT_32B_RD_REQ_UPPER", 234},
+      {"GDDR3_CH1_GT_32B_RD_REQ_LOWER", 235},
+      {"GDDR4_CH1_GT_32B_RD_REQ_UPPER", 274},
+      {"GDDR4_CH1_GT_32B_RD_REQ_LOWER", 275},
+      {"GDDR5_CH1_GT_32B_RD_REQ_UPPER", 314},
+      {"GDDR5_CH1_GT_32B_RD_REQ_LOWER", 315},
+      {"GDDR0_CH0_GT_32B_WR_REQ_UPPER", 98},
+      {"GDDR0_CH0_GT_32B_WR_REQ_LOWER", 99},
+      {"GDDR1_CH0_GT_32B_WR_REQ_UPPER", 138},
+      {"GDDR1_CH0_GT_32B_WR_REQ_LOWER", 139},
+      {"GDDR2_CH0_GT_32B_WR_REQ_UPPER", 178},
+      {"GDDR2_CH0_GT_32B_WR_REQ_LOWER", 179},
+      {"GDDR3_CH0_GT_32B_WR_REQ_UPPER", 218},
+      {"GDDR3_CH0_GT_32B_WR_REQ_LOWER", 219},
+      {"GDDR4_CH0_GT_32B_WR_REQ_UPPER", 258},
+      {"GDDR4_CH0_GT_32B_WR_REQ_LOWER", 259},
+      {"GDDR5_CH0_GT_32B_WR_REQ_UPPER", 298},
+      {"GDDR5_CH0_GT_32B_WR_REQ_LOWER", 299},
+      {"GDDR0_CH1_GT_32B_WR_REQ_UPPER", 118},
+      {"GDDR0_CH1_GT_32B_WR_REQ_LOWER", 119},
+      {"GDDR1_CH1_GT_32B_WR_REQ_UPPER", 158},
+      {"GDDR1_CH1_GT_32B_WR_REQ_LOWER", 159},
+      {"GDDR2_CH1_GT_32B_WR_REQ_UPPER", 198},
+      {"GDDR2_CH1_GT_32B_WR_REQ_LOWER", 199},
+      {"GDDR3_CH1_GT_32B_WR_REQ_UPPER", 238},
+      {"GDDR3_CH1_GT_32B_WR_REQ_LOWER", 239},
+      {"GDDR4_CH1_GT_32B_WR_REQ_UPPER", 278},
+      {"GDDR4_CH1_GT_32B_WR_REQ_LOWER", 279},
+      {"GDDR5_CH1_GT_32B_WR_REQ_UPPER", 318},
+      {"GDDR5_CH1_GT_32B_WR_REQ_LOWER", 319},
+      {"GDDR0_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 102},
+      {"GDDR0_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 103},
+      {"GDDR1_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 142},
+      {"GDDR1_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 143},
+      {"GDDR2_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 182},
+      {"GDDR2_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 183},
+      {"GDDR3_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 222},
+      {"GDDR3_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 223},
+      {"GDDR4_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 262},
+      {"GDDR4_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 263},
+      {"GDDR5_CH0_DISPLAYVC0_32B_RD_REQ_UPPER", 302},
+      {"GDDR5_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", 303},
+      {"GDDR0_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 122},
+      {"GDDR0_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 123},
+      {"GDDR1_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 162},
+      {"GDDR1_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 163},
+      {"GDDR2_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 202},
+      {"GDDR2_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 203},
+      {"GDDR3_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 242},
+      {"GDDR3_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 243},
+      {"GDDR4_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 282},
+      {"GDDR4_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 283},
+      {"GDDR5_CH1_DISPLAYVC0_32B_RD_REQ_UPPER", 322},
+      {"GDDR5_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", 323},
+      {"GDDR0_CH0_SOC_32B_RD_REQ_UPPER", 106},
+      {"GDDR0_CH0_SOC_32B_RD_REQ_LOWER", 107},
+      {"GDDR1_CH0_SOC_32B_RD_REQ_UPPER", 146},
+      {"GDDR1_CH0_SOC_32B_RD_REQ_LOWER", 147},
+      {"GDDR2_CH0_SOC_32B_RD_REQ_UPPER", 186},
+      {"GDDR2_CH0_SOC_32B_RD_REQ_LOWER", 187},
+      {"GDDR3_CH0_SOC_32B_RD_REQ_UPPER", 226},
+      {"GDDR3_CH0_SOC_32B_RD_REQ_LOWER", 227},
+      {"GDDR4_CH0_SOC_32B_RD_REQ_UPPER", 266},
+      {"GDDR4_CH0_SOC_32B_RD_REQ_LOWER", 267},
+      {"GDDR5_CH0_SOC_32B_RD_REQ_UPPER", 306},
+      {"GDDR5_CH0_SOC_32B_RD_REQ_LOWER", 307},
+      {"GDDR0_CH1_SOC_32B_RD_REQ_UPPER", 126},
+      {"GDDR0_CH1_SOC_32B_RD_REQ_LOWER", 127},
+      {"GDDR1_CH1_SOC_32B_RD_REQ_UPPER", 166},
+      {"GDDR1_CH1_SOC_32B_RD_REQ_LOWER", 167},
+      {"GDDR2_CH1_SOC_32B_RD_REQ_UPPER", 206},
+      {"GDDR2_CH1_SOC_32B_RD_REQ_LOWER", 207},
+      {"GDDR3_CH1_SOC_32B_RD_REQ_UPPER", 246},
+      {"GDDR3_CH1_SOC_32B_RD_REQ_LOWER", 247},
+      {"GDDR4_CH1_SOC_32B_RD_REQ_UPPER", 286},
+      {"GDDR4_CH1_SOC_32B_RD_REQ_LOWER", 287},
+      {"GDDR5_CH1_SOC_32B_RD_REQ_UPPER", 326},
+      {"GDDR5_CH1_SOC_32B_RD_REQ_LOWER", 327},
+      {"GDDR0_CH0_SOC_32B_WR_REQ_UPPER", 110},
+      {"GDDR0_CH0_SOC_32B_WR_REQ_LOWER", 111},
+      {"GDDR1_CH0_SOC_32B_WR_REQ_UPPER", 150},
+      {"GDDR1_CH0_SOC_32B_WR_REQ_LOWER", 151},
+      {"GDDR2_CH0_SOC_32B_WR_REQ_UPPER", 190},
+      {"GDDR2_CH0_SOC_32B_WR_REQ_LOWER", 191},
+      {"GDDR3_CH0_SOC_32B_WR_REQ_UPPER", 230},
+      {"GDDR3_CH0_SOC_32B_WR_REQ_LOWER", 231},
+      {"GDDR4_CH0_SOC_32B_WR_REQ_UPPER", 270},
+      {"GDDR4_CH0_SOC_32B_WR_REQ_LOWER", 271},
+      {"GDDR5_CH0_SOC_32B_WR_REQ_UPPER", 310},
+      {"GDDR5_CH0_SOC_32B_WR_REQ_LOWER", 311},
+      {"GDDR0_CH1_SOC_32B_WR_REQ_UPPER", 130},
+      {"GDDR0_CH1_SOC_32B_WR_REQ_LOWER", 131},
+      {"GDDR1_CH1_SOC_32B_WR_REQ_UPPER", 170},
+      {"GDDR1_CH1_SOC_32B_WR_REQ_LOWER", 171},
+      {"GDDR2_CH1_SOC_32B_WR_REQ_UPPER", 210},
+      {"GDDR2_CH1_SOC_32B_WR_REQ_LOWER", 211},
+      {"GDDR3_CH1_SOC_32B_WR_REQ_UPPER", 250},
+      {"GDDR3_CH1_SOC_32B_WR_REQ_LOWER", 251},
+      {"GDDR4_CH1_SOC_32B_WR_REQ_UPPER", 290},
+      {"GDDR4_CH1_SOC_32B_WR_REQ_LOWER", 291},
+      {"GDDR5_CH1_SOC_32B_WR_REQ_UPPER", 330},
+      {"GDDR5_CH1_SOC_32B_WR_REQ_LOWER", 331},
+      {"MSU_BITMASK", 922},
+      {"GDDR0_CH0_GT_64B_RD_REQ_UPPER", 96},
+      {"GDDR0_CH0_GT_64B_RD_REQ_LOWER", 97},
+      {"GDDR1_CH0_GT_64B_RD_REQ_UPPER", 136},
+      {"GDDR1_CH0_GT_64B_RD_REQ_LOWER", 137},
+      {"GDDR2_CH0_GT_64B_RD_REQ_UPPER", 176},
+      {"GDDR2_CH0_GT_64B_RD_REQ_LOWER", 177},
+      {"GDDR3_CH0_GT_64B_RD_REQ_UPPER", 216},
+      {"GDDR3_CH0_GT_64B_RD_REQ_LOWER", 217},
+      {"GDDR4_CH0_GT_64B_RD_REQ_UPPER", 256},
+      {"GDDR4_CH0_GT_64B_RD_REQ_LOWER", 257},
+      {"GDDR5_CH0_GT_64B_RD_REQ_UPPER", 296},
+      {"GDDR5_CH0_GT_64B_RD_REQ_LOWER", 297},
+      {"GDDR0_CH1_GT_64B_RD_REQ_UPPER", 116},
+      {"GDDR0_CH1_GT_64B_RD_REQ_LOWER", 117},
+      {"GDDR1_CH1_GT_64B_RD_REQ_UPPER", 156},
+      {"GDDR1_CH1_GT_64B_RD_REQ_LOWER", 157},
+      {"GDDR2_CH1_GT_64B_RD_REQ_UPPER", 196},
+      {"GDDR2_CH1_GT_64B_RD_REQ_LOWER", 197},
+      {"GDDR3_CH1_GT_64B_RD_REQ_UPPER", 236},
+      {"GDDR3_CH1_GT_64B_RD_REQ_LOWER", 237},
+      {"GDDR4_CH1_GT_64B_RD_REQ_UPPER", 276},
+      {"GDDR4_CH1_GT_64B_RD_REQ_LOWER", 277},
+      {"GDDR5_CH1_GT_64B_RD_REQ_UPPER", 316},
+      {"GDDR5_CH1_GT_64B_RD_REQ_LOWER", 317},
+      {"GDDR0_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 104},
+      {"GDDR0_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 105},
+      {"GDDR1_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 144},
+      {"GDDR1_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 145},
+      {"GDDR2_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 184},
+      {"GDDR2_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 185},
+      {"GDDR3_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 224},
+      {"GDDR3_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 225},
+      {"GDDR4_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 264},
+      {"GDDR4_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 265},
+      {"GDDR5_CH0_DISPLAYVC0_64B_RD_REQ_UPPER", 304},
+      {"GDDR5_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", 305},
+      {"GDDR0_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 124},
+      {"GDDR0_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 125},
+      {"GDDR1_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 164},
+      {"GDDR1_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 165},
+      {"GDDR2_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 204},
+      {"GDDR2_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 205},
+      {"GDDR3_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 244},
+      {"GDDR3_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 245},
+      {"GDDR4_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 284},
+      {"GDDR4_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 285},
+      {"GDDR5_CH1_DISPLAYVC0_64B_RD_REQ_UPPER", 324},
+      {"GDDR5_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", 325},
+      {"GDDR0_CH0_SOC_64B_RD_REQ_UPPER", 108},
+      {"GDDR0_CH0_SOC_64B_RD_REQ_LOWER", 109},
+      {"GDDR1_CH0_SOC_64B_RD_REQ_UPPER", 148},
+      {"GDDR1_CH0_SOC_64B_RD_REQ_LOWER", 149},
+      {"GDDR2_CH0_SOC_64B_RD_REQ_UPPER", 188},
+      {"GDDR2_CH0_SOC_64B_RD_REQ_LOWER", 189},
+      {"GDDR3_CH0_SOC_64B_RD_REQ_UPPER", 228},
+      {"GDDR3_CH0_SOC_64B_RD_REQ_LOWER", 229},
+      {"GDDR4_CH0_SOC_64B_RD_REQ_UPPER", 268},
+      {"GDDR4_CH0_SOC_64B_RD_REQ_LOWER", 269},
+      {"GDDR5_CH0_SOC_64B_RD_REQ_UPPER", 308},
+      {"GDDR5_CH0_SOC_64B_RD_REQ_LOWER", 309},
+      {"GDDR0_CH1_SOC_64B_RD_REQ_UPPER", 128},
+      {"GDDR0_CH1_SOC_64B_RD_REQ_LOWER", 129},
+      {"GDDR1_CH1_SOC_64B_RD_REQ_UPPER", 168},
+      {"GDDR1_CH1_SOC_64B_RD_REQ_LOWER", 169},
+      {"GDDR2_CH1_SOC_64B_RD_REQ_UPPER", 208},
+      {"GDDR2_CH1_SOC_64B_RD_REQ_LOWER", 209},
+      {"GDDR3_CH1_SOC_64B_RD_REQ_UPPER", 248},
+      {"GDDR3_CH1_SOC_64B_RD_REQ_LOWER", 249},
+      {"GDDR4_CH1_SOC_64B_RD_REQ_UPPER", 288},
+      {"GDDR4_CH1_SOC_64B_RD_REQ_LOWER", 289},
+      {"GDDR5_CH1_SOC_64B_RD_REQ_UPPER", 328},
+      {"GDDR5_CH1_SOC_64B_RD_REQ_LOWER", 329},
+      {"GDDR0_CH0_SOC_64B_WR_REQ_UPPER", 112},
+      {"GDDR0_CH0_SOC_64B_WR_REQ_LOWER", 113},
+      {"GDDR1_CH0_SOC_64B_WR_REQ_UPPER", 152},
+      {"GDDR1_CH0_SOC_64B_WR_REQ_LOWER", 153},
+      {"GDDR2_CH0_SOC_64B_WR_REQ_UPPER", 192},
+      {"GDDR2_CH0_SOC_64B_WR_REQ_LOWER", 193},
+      {"GDDR3_CH0_SOC_64B_WR_REQ_UPPER", 232},
+      {"GDDR3_CH0_SOC_64B_WR_REQ_LOWER", 233},
+      {"GDDR4_CH0_SOC_64B_WR_REQ_UPPER", 272},
+      {"GDDR4_CH0_SOC_64B_WR_REQ_LOWER", 273},
+      {"GDDR5_CH0_SOC_64B_WR_REQ_UPPER", 312},
+      {"GDDR5_CH0_SOC_64B_WR_REQ_LOWER", 313},
+      {"GDDR0_CH1_SOC_64B_WR_REQ_UPPER", 132},
+      {"GDDR0_CH1_SOC_64B_WR_REQ_LOWER", 133},
+      {"GDDR1_CH1_SOC_64B_WR_REQ_UPPER", 172},
+      {"GDDR1_CH1_SOC_64B_WR_REQ_LOWER", 173},
+      {"GDDR2_CH1_SOC_64B_WR_REQ_UPPER", 212},
+      {"GDDR2_CH1_SOC_64B_WR_REQ_LOWER", 213},
+      {"GDDR3_CH1_SOC_64B_WR_REQ_UPPER", 252},
+      {"GDDR3_CH1_SOC_64B_WR_REQ_LOWER", 253},
+      {"GDDR4_CH1_SOC_64B_WR_REQ_UPPER", 292},
+      {"GDDR4_CH1_SOC_64B_WR_REQ_LOWER", 293},
+      {"GDDR5_CH1_SOC_64B_WR_REQ_UPPER", 332},
+      {"GDDR5_CH1_SOC_64B_WR_REQ_LOWER", 333},
+      {"GDDR0_CH0_GT_64B_WR_REQ_UPPER", 100},
+      {"GDDR0_CH0_GT_64B_WR_REQ_LOWER", 101},
+      {"GDDR1_CH0_GT_64B_WR_REQ_UPPER", 140},
+      {"GDDR1_CH0_GT_64B_WR_REQ_LOWER", 141},
+      {"GDDR2_CH0_GT_64B_WR_REQ_UPPER", 180},
+      {"GDDR2_CH0_GT_64B_WR_REQ_LOWER", 181},
+      {"GDDR3_CH0_GT_64B_WR_REQ_UPPER", 220},
+      {"GDDR3_CH0_GT_64B_WR_REQ_LOWER", 221},
+      {"GDDR4_CH0_GT_64B_WR_REQ_UPPER", 260},
+      {"GDDR4_CH0_GT_64B_WR_REQ_LOWER", 261},
+      {"GDDR5_CH0_GT_64B_WR_REQ_UPPER", 300},
+      {"GDDR5_CH0_GT_64B_WR_REQ_LOWER", 301},
+      {"GDDR0_CH1_GT_64B_WR_REQ_UPPER", 120},
+      {"GDDR0_CH1_GT_64B_WR_REQ_LOWER", 121},
+      {"GDDR1_CH1_GT_64B_WR_REQ_UPPER", 160},
+      {"GDDR1_CH1_GT_64B_WR_REQ_LOWER", 161},
+      {"GDDR2_CH1_GT_64B_WR_REQ_UPPER", 200},
+      {"GDDR2_CH1_GT_64B_WR_REQ_LOWER", 201},
+      {"GDDR3_CH1_GT_64B_WR_REQ_UPPER", 240},
+      {"GDDR3_CH1_GT_64B_WR_REQ_LOWER", 241},
+      {"GDDR4_CH1_GT_64B_WR_REQ_UPPER", 280},
+      {"GDDR4_CH1_GT_64B_WR_REQ_LOWER", 281},
+      {"GDDR5_CH1_GT_64B_WR_REQ_UPPER", 320},
+      {"GDDR5_CH1_GT_64B_WR_REQ_LOWER", 321}}}};
+
+template <>
+ze_result_t SysmanProductHelperHw<gfxProduct>::getSensorTemperature(double *pTemperature, zes_temp_sensors_t type, WddmSysmanImp *pWddmSysmanImp) {
+    ze_result_t status = ZE_RESULT_SUCCESS;
+    uint32_t val;
+    std::string key;
+
+    PlatformMonitoringTech *pPmt = pWddmSysmanImp->getSysmanPmt();
+    if (pPmt == nullptr) {
+        *pTemperature = 0;
+        return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
+    }
+
+    switch (type) {
+    case ZES_TEMP_SENSORS_GLOBAL:
+        key = "Package_Temperature_0_0_0_MCHBAR_PCU";
+        break;
+    case ZES_TEMP_SENSORS_GPU:
+        key = "SOC_THERMAL_SENSORS_TEMPERATURE_0_2_0_GTTMMADR[2]";
+        break;
+    case ZES_TEMP_SENSORS_MEMORY:
+        key = "VRAM_TEMPERATURE_0_2_0_GTTMMADR";
+        break;
+    default:
+        DEBUG_BREAK_IF(true);
+        *pTemperature = 0;
+        return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
+        break;
+    }
+    status = pPmt->readValue(key, val);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    *pTemperature = static_cast<double>(val);
+    return status;
+}
+
+template <>
+bool SysmanProductHelperHw<gfxProduct>::isTempModuleSupported(zes_temp_sensors_t type, WddmSysmanImp *pWddmSysmanImp) {
+    if (type != ZES_TEMP_SENSORS_GLOBAL && type != ZES_TEMP_SENSORS_GPU && type != ZES_TEMP_SENSORS_MEMORY) {
+        return false;
+    }
+    PlatformMonitoringTech *pPmt = pWddmSysmanImp->getSysmanPmt();
+    return (pPmt != nullptr);
+}
+
+template <>
+ze_result_t SysmanProductHelperHw<gfxProduct>::getPciStats(zes_pci_stats_t *pStats, WddmSysmanImp *pWddmSysmanImp) {
+    ze_result_t status = ZE_RESULT_SUCCESS;
+    pStats->speed.gen = -1;
+    pStats->speed.width = -1;
+    pStats->speed.maxBandwidth = -1;
+    pStats->replayCounter = 0;
+
+    PlatformMonitoringTech *pPmt = pWddmSysmanImp->getSysmanPmt();
+    if (pPmt == nullptr) {
+        return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
+    }
+
+    uint64_t rxCounter;
+    status = pPmt->readValue("REG_RX_BYTECOUNT_LSB", rxCounter);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    uint64_t txCounter;
+    status = pPmt->readValue("REG_TX_BYTECOUNT_LSB", txCounter);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    uint64_t rxPacketCounter;
+    status = pPmt->readValue("REG_RX_PKTCOUNT_LSB", rxPacketCounter);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    uint64_t txPacketCounter;
+    status = pPmt->readValue("REG_TX_PKTCOUNT_LSB", txPacketCounter);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    pStats->txCounter = txCounter;
+    pStats->rxCounter = rxCounter;
+    pStats->packetCounter = rxPacketCounter + txPacketCounter;
+    pStats->timestamp = SysmanDevice::getSysmanTimestamp();
+
+    return status;
+}
+
+template <>
+ze_result_t SysmanProductHelperHw<gfxProduct>::getMemoryBandWidth(zes_mem_bandwidth_t *pBandwidth, WddmSysmanImp *pWddmSysmanImp) {
+    ze_result_t status = ZE_RESULT_SUCCESS;
+    PlatformMonitoringTech *pPmt = pWddmSysmanImp->getSysmanPmt();
+    if (pPmt == nullptr) {
+        return ZE_RESULT_ERROR_UNSUPPORTED_FEATURE;
+    }
+
+    uint32_t supportedMsu = 0;
+    status = pPmt->readValue("MSU_BITMASK", supportedMsu);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    constexpr uint64_t transactionSize = 32;
+    constexpr uint64_t maxSupportedMsu = 8;
+    memset(pBandwidth, 0, sizeof(zes_mem_bandwidth_t));
+
+    std::vector<std::pair<std::string, std::string>> readBwRegisterList{{"_CH0_GT_32B_RD_REQ_LOWER", "_CH0_GT_32B_RD_REQ_UPPER"},
+                                                                        {"_CH0_DISPLAYVC0_32B_RD_REQ_LOWER", "_CH0_DISPLAYVC0_32B_RD_REQ_UPPER"},
+                                                                        {"_CH0_SOC_32B_RD_REQ_LOWER", "_CH0_SOC_32B_RD_REQ_UPPER"},
+                                                                        {"_CH1_GT_32B_RD_REQ_LOWER", "_CH1_GT_32B_RD_REQ_UPPER"},
+                                                                        {"_CH1_DISPLAYVC0_32B_RD_REQ_LOWER", "_CH1_DISPLAYVC0_32B_RD_REQ_UPPER"},
+                                                                        {"_CH1_SOC_32B_RD_REQ_LOWER", "_CH1_SOC_32B_RD_REQ_UPPER"},
+                                                                        {"_CH0_GT_64B_RD_REQ_LOWER", "_CH0_GT_64B_RD_REQ_UPPER"},
+                                                                        {"_CH0_DISPLAYVC0_64B_RD_REQ_LOWER", "_CH0_DISPLAYVC0_64B_RD_REQ_UPPER"},
+                                                                        {"_CH0_SOC_64B_RD_REQ_LOWER", "_CH0_SOC_64B_RD_REQ_UPPER"},
+                                                                        {"_CH1_GT_64B_RD_REQ_LOWER", "_CH1_GT_64B_RD_REQ_UPPER"},
+                                                                        {"_CH1_DISPLAYVC0_64B_RD_REQ_LOWER", "_CH1_DISPLAYVC0_64B_RD_REQ_UPPER"},
+                                                                        {"_CH1_SOC_64B_RD_REQ_LOWER", "_CH1_SOC_64B_RD_REQ_UPPER"}};
+
+    std::vector<std::pair<std::string, std::string>> writeBwRegisterList{{"_CH0_GT_32B_WR_REQ_LOWER", "_CH0_GT_32B_WR_REQ_UPPER"},
+                                                                         {"_CH0_SOC_32B_WR_REQ_LOWER", "_CH0_SOC_32B_WR_REQ_UPPER"},
+                                                                         {"_CH1_GT_32B_WR_REQ_LOWER", "_CH1_GT_32B_WR_REQ_UPPER"},
+                                                                         {"_CH1_SOC_32B_WR_REQ_LOWER", "_CH1_SOC_32B_WR_REQ_UPPER"},
+                                                                         {"_CH0_GT_64B_WR_REQ_LOWER", "_CH0_GT_64B_WR_REQ_UPPER"},
+                                                                         {"_CH0_SOC_64B_WR_REQ_LOWER", "_CH0_SOC_64B_WR_REQ_UPPER"},
+                                                                         {"_CH1_GT_64B_WR_REQ_LOWER", "_CH1_GT_64B_WR_REQ_UPPER"},
+                                                                         {"_CH1_SOC_64B_WR_REQ_LOWER", "_CH1_SOC_64B_WR_REQ_UPPER"}};
+
+    for (uint16_t i = 0; i < maxSupportedMsu; i++) {
+        if (supportedMsu & 1 << i) {
+            std::string memorySubSystemUnit = "GDDR" + std::to_string(i);
+
+            // Read BW calculation
+            for (uint32_t j = 0; j < readBwRegisterList.size(); j++) {
+                uint32_t readRegisterL = 0;
+                uint32_t readRegisterH = 0;
+
+                std::string readCounterKey = memorySubSystemUnit + readBwRegisterList[j].first;
+                status = pPmt->readValue(readCounterKey, readRegisterL);
+                if (status != ZE_RESULT_SUCCESS) {
+                    return status;
+                }
+
+                readCounterKey = memorySubSystemUnit + readBwRegisterList[j].second;
+                status = pPmt->readValue(readCounterKey, readRegisterH);
+                if (status != ZE_RESULT_SUCCESS) {
+                    return status;
+                }
+
+                uint64_t readCounter = PACK_INTO_64BIT(readRegisterH, readRegisterL);
+
+                pBandwidth->readCounter += readCounter;
+            }
+
+            // Write BW calculation
+            for (uint32_t j = 0; j < writeBwRegisterList.size(); j++) {
+                uint32_t writeRegisterL = 0;
+                uint32_t writeRegisterH = 0;
+
+                std::string readCounterKey = memorySubSystemUnit + writeBwRegisterList[j].first;
+                status = pPmt->readValue(readCounterKey, writeRegisterL);
+                if (status != ZE_RESULT_SUCCESS) {
+                    return status;
+                }
+
+                readCounterKey = memorySubSystemUnit + writeBwRegisterList[j].second;
+                status = pPmt->readValue(readCounterKey, writeRegisterH);
+                if (status != ZE_RESULT_SUCCESS) {
+                    return status;
+                }
+
+                uint64_t writeCounter = PACK_INTO_64BIT(writeRegisterH, writeRegisterL);
+
+                pBandwidth->writeCounter += writeCounter;
+            }
+        }
+    }
+
+    pBandwidth->readCounter = (pBandwidth->readCounter * transactionSize) / microFactor;
+    pBandwidth->writeCounter = (pBandwidth->writeCounter * transactionSize) / microFactor;
+
+    // Max BW
+    uint32_t maxBandwidth = 0;
+    status = pPmt->readValue("VRAM_BANDWIDTH", maxBandwidth);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    maxBandwidth = maxBandwidth >> 16;
+    pBandwidth->maxBandwidth = static_cast<uint64_t>(maxBandwidth) * mbpsToBytesPerSecond;
+
+    // timestamp calcuation
+    uint32_t timeStampL = 0;
+    uint32_t timeStampH = 0;
+
+    status = pPmt->readValue("GDDR_TELEM_CAPTURE_TIMESTAMP_UPPER", timeStampH);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+    status = pPmt->readValue("GDDR_TELEM_CAPTURE_TIMESTAMP_LOWER", timeStampL);
+    if (status != ZE_RESULT_SUCCESS) {
+        return status;
+    }
+
+    pBandwidth->timestamp = PACK_INTO_64BIT(timeStampH, timeStampL);
+
+    return status;
+}
+
+template <>
+std::map<unsigned long, std::map<std::string, uint32_t>> *SysmanProductHelperHw<gfxProduct>::getGuidToKeyOffsetMap() {
+    return &guidToKeyOffsetMap;
+}
+
+template class SysmanProductHelperHw<gfxProduct>;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/lnl/CMakeLists.txt

@@ -0,0 +1,14 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_LNL)
+  target_sources(${L0_STATIC_LIB_NAME}
+                 PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enable_sysman_product_helper_lnl.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/sysman_product_helper_lnl.cpp
+  )
+endif()
+

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/lnl/enable_sysman_product_helper_lnl.cpp

@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.h"
+
+namespace L0 {
+namespace Sysman {
+
+static EnableSysmanProductHelper<IGFX_LUNARLAKE> enableLnl;
+
+} // namespace Sysman
+} // namespace L0

level_zero/sysman/source/shared/windows/product_helper/xe2_hpg_core/lnl/sysman_product_helper_lnl.cpp

@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.h"
+#include "level_zero/sysman/source/shared/windows/product_helper/sysman_product_helper_hw.inl"
+
+namespace L0 {
+namespace Sysman {
+constexpr static auto gfxProduct = IGFX_LUNARLAKE;
+
+template class SysmanProductHelperHw<gfxProduct>;
+
+} // namespace Sysman
+} // namespace L0

level_zero/tools/test/unit_tests/sources/debug/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_XE2_HPG_CORE)
+  target_sources(${TARGET_NAME} PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/debug_session_tests_xe2_hpg_core.cpp
+  )
+endif()

level_zero/tools/test/unit_tests/sources/debug/xe2_hpg_core/debug_session_tests_xe2_hpg_core.cpp

@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/mocks/mock_sip.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "level_zero/core/test/unit_tests/mocks/mock_built_ins.h"
+#include "level_zero/tools/source/debug/debug_session_imp.h"
+#include "level_zero/tools/test/unit_tests/sources/debug/debug_session_common.h"
+#include "level_zero/tools/test/unit_tests/sources/debug/debug_session_registers_access.h"
+#include "level_zero/tools/test/unit_tests/sources/debug/mock_debug_session.h"
+
+namespace L0 {
+namespace ult {
+
+using Xe2HpgCoreDebugSessionTest = Test<L0::ult::DebugSessionRegistersAccess>;
+
+HWTEST2_F(Xe2HpgCoreDebugSessionTest,
+          givenGetThreadRegisterSetPropertiesCalledWhenLargeGrfIsSetThen256GrfRegisterCountIsReported, IsXe2HpgCore) {
+    auto mockBuiltins = new L0::ult::MockBuiltins();
+    mockBuiltins->stateSaveAreaHeader = NEO::MockSipData::createStateSaveAreaHeader(2, 256);
+    MockRootDeviceEnvironment::resetBuiltins(neoDevice->executionEnvironment->rootDeviceEnvironments[0].get(), mockBuiltins);
+
+    {
+        auto pStateSaveAreaHeader = reinterpret_cast<SIP::StateSaveAreaHeader *>(session->stateSaveAreaHeader.data());
+        auto size = pStateSaveAreaHeader->versionHeader.size * 8 +
+                    pStateSaveAreaHeader->regHeader.state_area_offset +
+                    pStateSaveAreaHeader->regHeader.state_save_size * 16;
+        session->stateSaveAreaHeader.resize(size);
+    }
+
+    ze_device_thread_t thread = stoppedThread;
+
+    auto *regdesc = &(reinterpret_cast<SIP::StateSaveAreaHeader *>(session->stateSaveAreaHeader.data()))->regHeader.sr;
+    uint32_t sr0[8] = {0, 0, 0, 0, 0, 0, 0, 0};
+    sr0[1] = 0x80006000;
+    session->registersAccessHelper(session->allThreads[stoppedThreadId].get(), regdesc, 0, 1, sr0, true);
+
+    uint32_t threadCount = 0;
+    EXPECT_EQ(ZE_RESULT_SUCCESS, zetDebugGetThreadRegisterSetProperties(session->toHandle(), thread, &threadCount, nullptr));
+    std::vector<zet_debug_regset_properties_t> threadRegsetProps(threadCount);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, zetDebugGetThreadRegisterSetProperties(session->toHandle(), thread, &threadCount, threadRegsetProps.data()));
+    EXPECT_EQ(256u, threadRegsetProps[0].count);
+}
+
+HWTEST2_F(Xe2HpgCoreDebugSessionTest,
+          givenGetThreadRegisterSetPropertiesCalledWhenLargeGrfIsNotSetThen128GrfRegisterCountIsReported, IsXe2HpgCore) {
+    auto mockBuiltins = new L0::ult::MockBuiltins();
+    mockBuiltins->stateSaveAreaHeader = NEO::MockSipData::createStateSaveAreaHeader(2, 256);
+    MockRootDeviceEnvironment::resetBuiltins(neoDevice->executionEnvironment->rootDeviceEnvironments[0].get(), mockBuiltins);
+
+    {
+        auto pStateSaveAreaHeader = reinterpret_cast<SIP::StateSaveAreaHeader *>(session->stateSaveAreaHeader.data());
+        auto size = pStateSaveAreaHeader->versionHeader.size * 8 +
+                    pStateSaveAreaHeader->regHeader.state_area_offset +
+                    pStateSaveAreaHeader->regHeader.state_save_size * 16;
+        session->stateSaveAreaHeader.resize(size);
+    }
+
+    ze_device_thread_t thread = stoppedThread;
+
+    auto *regdesc = &(reinterpret_cast<SIP::StateSaveAreaHeader *>(session->stateSaveAreaHeader.data()))->regHeader.sr;
+    uint32_t sr0[8] = {0, 0, 0, 0, 0, 0, 0, 0};
+    sr0[1] = 0x80003000;
+    session->registersAccessHelper(session->allThreads[stoppedThreadId].get(), regdesc, 0, 1, sr0, true);
+
+    uint32_t threadCount = 0;
+    EXPECT_EQ(ZE_RESULT_SUCCESS, zetDebugGetThreadRegisterSetProperties(session->toHandle(), thread, &threadCount, nullptr));
+    std::vector<zet_debug_regset_properties_t> threadRegsetProps(threadCount);
+    ASSERT_EQ(ZE_RESULT_SUCCESS, zetDebugGetThreadRegisterSetProperties(session->toHandle(), thread, &threadCount, threadRegsetProps.data()));
+    EXPECT_EQ(128u, threadRegsetProps[0].count);
+}
+
+using DebugApiTest = Test<DebugApiFixture>;
+using isDebugSupportedProduct = IsAtLeastProduct<IGFX_BMG>;
+HWTEST2_F(DebugApiTest, givenDeviceWhenDebugAttachIsAvaialbleThenGetPropertiesReturnsCorrectFlag2, isDebugSupportedProduct) {
+    zet_device_debug_properties_t debugProperties = {};
+    debugProperties.flags = ZET_DEVICE_DEBUG_PROPERTY_FLAG_FORCE_UINT32;
+
+    neoDevice->executionEnvironment->rootDeviceEnvironments[0]->osInterface.reset(new OsInterfaceWithDebugAttach);
+
+    auto result = zetDeviceGetDebugProperties(device->toHandle(), &debugProperties);
+
+    EXPECT_EQ(ZE_RESULT_SUCCESS, result);
+    EXPECT_EQ(ZET_DEVICE_DEBUG_PROPERTY_FLAG_ATTACH, debugProperties.flags);
+}
+
+} // namespace ult
+} // namespace L0

level_zero/tools/test/unit_tests/sources/metrics/linux/test_metric_ip_sampling_linux.cpp

@@ -27,9 +27,7 @@ class MetricIpSamplingLinuxTest : public DeviceFixture,
     std::unique_ptr<MetricIpSamplingOsInterface> metricIpSamplingOsInterface = nullptr;
 };
 
-using IsNotGen9ThruPVC = IsNotWithinProducts<IGFX_SKYLAKE, IGFX_PVC>;
-
-HWTEST2_F(MetricIpSamplingLinuxTest, GivenUnsupportedProductFamilyIsUsedWhenIsDependencyAvailableIsCalledThenReturnFailure, IsNotGen9ThruPVC) {
+HWTEST2_F(MetricIpSamplingLinuxTest, GivenUnsupportedProductFamilyIsUsedWhenIsDependencyAvailableIsCalledThenReturnFailure, IsXeHpgCore) {
 
     EXPECT_FALSE(metricIpSamplingOsInterface->isDependencyAvailable());
 }

manifests/manifest.yml

@@ -42,7 +42,7 @@ components:
     dest_dir: kernels_bin
     type: git
     branch: kernels_bin
-    revision: 2925-1969
+    revision: 2925-1993
   kmdaf:
     branch: kmdaf
     dest_dir: kmdaf

opencl/source/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,15 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(SUPPORT_XE2_HPG_CORE)
+  set(RUNTIME_SRCS_XE2_HPG_CORE
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+  )
+
+  target_sources(${NEO_STATIC_LIB_NAME} PRIVATE ${RUNTIME_SRCS_XE2_HPG_CORE})
+  set_property(GLOBAL PROPERTY RUNTIME_SRCS_XE2_HPG_CORE ${RUNTIME_SRCS_XE2_HPG_CORE})
+endif()
+

opencl/source/xe2_hpg_core/buffer_xe2_hpg_core.cpp

@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "opencl/source/mem_obj/buffer_base.inl"
+
+namespace NEO {
+
+using Family = Xe2HpgCoreFamily;
+static auto gfxCore = IGFX_XE2_HPG_CORE;
+
+template class BufferHw<Family>;
+
+#include "opencl/source/mem_obj/buffer_factory_init.inl"
+} // namespace NEO

opencl/source/xe2_hpg_core/cl_gfx_core_helper_xe2_hpg_core.cpp

@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/populate_factory.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "opencl/source/helpers/cl_gfx_core_helper_base.inl"
+#include "opencl/source/helpers/cl_gfx_core_helper_xehp_and_later.inl"
+
+namespace NEO {
+
+using Family = Xe2HpgCoreFamily;
+static auto gfxCore = IGFX_XE2_HPG_CORE;
+
+#include "opencl/source/helpers/cl_gfx_core_helper_factory_init.inl"
+#include "opencl/source/helpers/cl_gfx_core_helper_pvc_and_later.inl"
+
+template <>
+bool ClGfxCoreHelperHw<Family>::requiresAuxResolves(const KernelInfo &kernelInfo) const {
+    return false;
+}
+
+template <>
+bool ClGfxCoreHelperHw<Family>::isLimitationForPreemptionNeeded() const {
+    // mid thread preemption will disable with protected mode
+    return true;
+}
+
+template class ClGfxCoreHelperHw<Family>;
+
+} // namespace NEO

opencl/source/xe2_hpg_core/command_queue_xe2_hpg_core.cpp

@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/populate_factory.h"
+#include "shared/source/memory_manager/unified_memory_manager.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "opencl/source/command_queue/command_queue_hw.h"
+#include "opencl/source/command_queue/enqueue_resource_barrier.h"
+
+namespace NEO {
+using Family = Xe2HpgCoreFamily;
+static auto gfxCore = IGFX_XE2_HPG_CORE;
+} // namespace NEO
+
+#include "opencl/source/command_queue/command_queue_hw_xehp_and_later.inl"
+
+namespace NEO {
+
+template <>
+void populateFactoryTable<CommandQueueHw<Family>>() {
+    extern CommandQueueCreateFunc commandQueueFactory[IGFX_MAX_CORE];
+    commandQueueFactory[gfxCore] = CommandQueueHw<Family>::create;
+}
+
+template <>
+bool CommandQueueHw<Family>::isCacheFlushForBcsRequired() const {
+    if (debugManager.flags.ForceCacheFlushForBcs.get() != -1) {
+        return !!debugManager.flags.ForceCacheFlushForBcs.get();
+    }
+
+    const auto &productHelper = this->device->getProductHelper();
+    return productHelper.isDcFlushAllowed();
+}
+
+} // namespace NEO
+
+template class NEO::CommandQueueHw<NEO::Family>;

opencl/source/xe2_hpg_core/enable_family_full_ocl_xe2_hpg_core.cpp

@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/populate_factory.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "opencl/source/command_queue/command_queue_hw.h"
+#include "opencl/source/helpers/cl_gfx_core_helper.h"
+#include "opencl/source/mem_obj/buffer.h"
+#include "opencl/source/mem_obj/image.h"
+#include "opencl/source/sampler/sampler.h"
+
+namespace NEO {
+
+using Family = Xe2HpgCoreFamily;
+
+struct EnableOCLXe2HpgCore {
+    EnableOCLXe2HpgCore() {
+        populateFactoryTable<BufferHw<Family>>();
+        populateFactoryTable<ClGfxCoreHelperHw<Family>>();
+        populateFactoryTable<CommandQueueHw<Family>>();
+        populateFactoryTable<ImageHw<Family>>();
+        populateFactoryTable<SamplerHw<Family>>();
+    }
+};
+
+static EnableOCLXe2HpgCore enable;
+} // namespace NEO

opencl/source/xe2_hpg_core/gpgpu_walker_xe2_hpg_core.cpp

@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "opencl/source/command_queue/gpgpu_walker_xehp_and_later.inl"
+#include "opencl/source/command_queue/hardware_interface_xehp_and_later.inl"
+
+namespace NEO {
+
+using Family = Xe2HpgCoreFamily;
+
+template class GpgpuWalkerHelper<Family>;
+template void GpgpuWalkerHelper<Family>::setupTimestampPacket<Family::DefaultWalkerType>(LinearStream *cmdStream, Family::DefaultWalkerType *walkerCmd, TagNodeBase *timestampPacketNode, const RootDeviceEnvironment &rootDeviceEnvironment);
+template size_t GpgpuWalkerHelper<Family>::setGpgpuWalkerThreadData<Family::DefaultWalkerType>(Family::DefaultWalkerType *walkerCmd, const KernelDescriptor &kernelDescriptor, const size_t globalOffsets[3], const size_t startWorkGroups[3],
+                                                                                               const size_t numWorkGroups[3], const size_t localWorkSizesIn[3], uint32_t simd, uint32_t workDim, bool localIdsGenerationByRuntime, bool inlineDataProgrammingRequired, uint32_t requiredWorkGroupOrder);
+
+template class HardwareInterface<Family>;
+
+template void HardwareInterface<Family>::dispatchWalker<Family::DefaultWalkerType>(CommandQueue &commandQueue, const MultiDispatchInfo &multiDispatchInfo, const CsrDependencies &csrDependencies, HardwareInterfaceWalkerArgs &walkerArgs);
+template void HardwareInterface<Family>::programWalker<Family::DefaultWalkerType>(LinearStream &commandStream, Kernel &kernel, CommandQueue &commandQueue, IndirectHeap &dsh, IndirectHeap &ioh, IndirectHeap &ssh, const DispatchInfo &dispatchInfo, HardwareInterfaceWalkerArgs &walkerArgs);
+template void HardwareInterface<Family>::dispatchKernelCommands<Family::DefaultWalkerType>(CommandQueue &commandQueue, const DispatchInfo &dispatchInfo, LinearStream &commandStream, IndirectHeap &dsh, IndirectHeap &ioh, IndirectHeap &ssh, HardwareInterfaceWalkerArgs &walkerArgs);
+template Family::DefaultWalkerType *HardwareInterface<Family>::allocateWalkerSpace<Family::DefaultWalkerType>(LinearStream &commandStream, const Kernel &kernel);
+
+template struct EnqueueOperation<Family>;
+
+} // namespace NEO

opencl/source/xe2_hpg_core/gtpin_setup_xe2_hpg_core.cpp

@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/compiler_interface/external_functions.h"
+#include "shared/source/kernel/implicit_args_helper.h"
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+
+#include "opencl/source/gtpin/gtpin_gfx_core_helper.h"
+#include "opencl/source/gtpin/gtpin_gfx_core_helper.inl"
+#include "opencl/source/gtpin/gtpin_gfx_core_helper_xehp_and_later.inl"
+
+#include "ocl_igc_shared/gtpin/gtpin_ocl_interface.h"
+
+namespace NEO {
+
+extern GTPinGfxCoreHelperCreateFunctionType gtpinGfxCoreHelperFactory[IGFX_MAX_CORE];
+
+using Family = Xe2HpgCoreFamily;
+static const auto gfxFamily = IGFX_XE2_HPG_CORE;
+
+template <>
+uint32_t GTPinGfxCoreHelperHw<Family>::getGenVersion() const {
+    return gtpin::GTPIN_XE_HPG_CORE;
+}
+
+template class GTPinGfxCoreHelperHw<Family>;
+
+struct GTPinEnableXe2HpgCore {
+    GTPinEnableXe2HpgCore() {
+        gtpinGfxCoreHelperFactory[gfxFamily] = GTPinGfxCoreHelperHw<Family>::create;
+    }
+};
+
+static GTPinEnableXe2HpgCore gtpinEnable;
+
+} // namespace NEO

opencl/source/xe2_hpg_core/hardware_commands_helper_xe2_hpg_core.cpp

@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/cache_flush_xehp_and_later.inl"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+
+#include "opencl/source/helpers/hardware_commands_helper.h"
+#include "opencl/source/helpers/hardware_commands_helper_base.inl"
+#include "opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl"
+
+namespace NEO {
+using FamilyType = Xe2HpgCoreFamily;
+} // namespace NEO
+
+#include "opencl/source/helpers/enable_hardware_commands_helper_cw.inl"

opencl/source/xe2_hpg_core/image_xe2_hpg_core.cpp

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+
+#include "opencl/source/mem_obj/image.inl"
+
+namespace NEO {
+
+using Family = Xe2HpgCoreFamily;
+static auto gfxCore = IGFX_XE2_HPG_CORE;
+
+} // namespace NEO
+#include "opencl/source/mem_obj/image_tgllp_and_later.inl"
+
+// factory initializer
+#include "opencl/source/mem_obj/image_factory_init.inl"

opencl/source/xe2_hpg_core/sampler_xe2_hpg_core.cpp

@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+using Family = NEO::Xe2HpgCoreFamily;
+constexpr static auto gfxCore = IGFX_XE2_HPG_CORE;
+#include "opencl/source/sampler/sampler_tgllp_and_later.inl"

opencl/test/unit_test/aub_tests/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,17 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_XE2_HPG_CORE)
+  target_sources(igdrcl_aub_tests PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/aub_mem_dump_tests_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/aub_tests_excludes_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/copy_engine_aub_tests_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/enqueue_kernel_aub_tests_xe2_hpg_core.cpp
+                 ${CMAKE_CURRENT_SOURCE_DIR}/system_memfence_aub_tests_xe2_hpg_core.cpp
+  )
+  add_subdirectories()
+endif()

opencl/test/unit_test/aub_tests/xe2_hpg_core/aub_mem_dump_tests_xe2_hpg_core.cpp

@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/mocks/mock_device.h"
+
+#include "opencl/test/unit_test/aub_tests/command_stream/aub_mem_dump_tests.h"
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+
+using Xe2HpgCoreAubMemDumpTests = Test<NEO::ClDeviceFixture>;
+
+XE2_HPG_CORETEST_F(Xe2HpgCoreAubMemDumpTests, GivenCcsThenExpectationsAreMet) {
+    setupAUB<FamilyType>(pDevice, aub_stream::ENGINE_CCS);
+}

opencl/test/unit_test/aub_tests/xe2_hpg_core/aub_tests_excludes_xe2_hpg_core.cpp

@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/test_macros/hw_test_base.h"
+
+using namespace NEO;
+
+HWTEST_EXCLUDE_PRODUCT(MultiContextLargeGrfKernelAubTest, givenLargeAndSmallGrfWhenParallelRunOnCcsAndRcsThenResultsAreOk, IGFX_XE2_HPG_CORE);

opencl/test/unit_test/aub_tests/xe2_hpg_core/bmg/CMakeLists.txt

@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_BMG)
+  target_sources(igdrcl_aub_tests PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/aub_tests_excludes_bmg.cpp
+  )
+endif()

opencl/test/unit_test/aub_tests/xe2_hpg_core/bmg/aub_tests_excludes_bmg.cpp

@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_bmg.h"
+#include "shared/test/common/test_macros/hw_test_base.h"
+
+HWTEST_EXCLUDE_PRODUCT(CompressionSystemXeHPAndLater, givenCompressedBuffersWhenWritingAndCopyingThenResultsAreCorrect, IGFX_BMG);
+HWTEST_EXCLUDE_PRODUCT(CompressionSystemXeHPAndLater, givenCompressedImage2DFromBufferWhenItIsUsedThenDataIsCorrect, IGFX_BMG);
+HWTEST_EXCLUDE_PRODUCT(CompressionSystemXeHPAndLater, givenCompressedImageWhenReadingThenResultsAreCorrect, IGFX_BMG);

opencl/test/unit_test/aub_tests/xe2_hpg_core/copy_engine_aub_tests_xe2_hpg_core.cpp

@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/source/helpers/hardware_commands_helper.h"
+#include "opencl/test/unit_test/aub_tests/command_stream/copy_engine_aub_tests_xehp_and_later.h"
+
+using namespace NEO;
+
+template <uint32_t numTiles, typename FamilyType, bool useLocalMemory>
+struct CopyEnginesXe2HpgCoreFixture : public CopyEngineXeHPAndLater<numTiles, useLocalMemory> {
+    using MEM_COPY = typename FamilyType::MEM_COPY;
+
+    void SetUp() override {
+        this->bcsEngineType = aub_stream::EngineType::ENGINE_BCS;
+        CopyEngineXeHPAndLater<numTiles, useLocalMemory>::SetUp();
+    }
+};
+
+using SingleTileXe2HpgCoreTests = CopyEnginesXe2HpgCoreFixture<1, Xe2HpgCoreFamily, true>;
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenNotCompressedBufferWhenBltExecutedThenCompressDataAndResolve) {
+    givenNotCompressedBufferWhenBltExecutedThenCompressDataAndResolveImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenHostPtrWhenBlitCommandToCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenHostPtrWhenBlitCommandToCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenDstHostPtrWhenBlitCommandFromCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenDstHostPtrWhenBlitCommandFromCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenDstHostPtrWhenBlitCommandFromNotCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenDstHostPtrWhenBlitCommandFromNotCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenSrcHostPtrWhenBlitCommandToNotCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenSrcHostPtrWhenBlitCommandToNotCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedFromHostPtrThenDataIsCorrectlyCopied) {
+    givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedFromHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopied) {
+    givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenOffsetsWhenBltExecutedThenCopiedDataIsValid) {
+    givenOffsetsWhenBltExecutedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenSrcCompressedBufferWhenBlitCommandToDstCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenSrcCompressedBufferWhenBlitCommandToDstCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenCompressedBufferWhenAuxTranslationCalledThenResolveAndCompress) {
+    givenCompressedBufferWhenAuxTranslationCalledThenResolveAndCompressImpl<FamilyType>();
+}
+
+using SingleTileSystemMemoryXe2HpgCoreTests = CopyEnginesXe2HpgCoreFixture<1, Xe2HpgCoreFamily, false>;
+
+XE2_HPG_CORETEST_F(SingleTileSystemMemoryXe2HpgCoreTests, givenSrcSystemBufferWhenBlitCommandToDstSystemBufferIsDispatchedThenCopiedDataIsValid) {
+    givenSrcSystemBufferWhenBlitCommandToDstSystemBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenReadBufferRectWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopied) {
+    givenReadBufferRectWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenWriteBufferRectWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopied) {
+    givenWriteBufferRectWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}
+
+XE2_HPG_CORETEST_F(SingleTileXe2HpgCoreTests, givenCopyBufferRectWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopied) {
+    givenCopyBufferRectWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}

opencl/test/unit_test/aub_tests/xe2_hpg_core/enqueue_kernel_aub_tests_xe2_hpg_core.cpp

@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "opencl/source/command_queue/command_queue.h"
+#include "opencl/source/mem_obj/buffer.h"
+#include "opencl/test/unit_test/aub_tests/fixtures/aub_fixture.h"
+#include "opencl/test/unit_test/fixtures/simple_arg_fixture.h"
+
+using namespace NEO;
+
+extern const HardwareInfo *defaultHwInfo;
+
+using AUBSimpleKernelStatelessTestXe2HpgCore = Test<KernelAUBFixture<SimpleKernelStatelessFixture>>;
+
+HWTEST2_F(AUBSimpleKernelStatelessTestXe2HpgCore, givenPrefetchEnabledWhenEnqueuedKernelThenDataIsCorrect, IsXe2HpgCore) {
+    DebugManagerStateRestore restore;
+    debugManager.flags.EnableMemoryPrefetch.set(1);
+
+    constexpr size_t bufferSize = MemoryConstants::pageSize;
+
+    cl_uint workDim = 1;
+    size_t globalWorkOffset[3] = {0, 0, 0};
+    size_t globalWorkSize[3] = {bufferSize, 1, 1};
+    size_t localWorkSize[3] = {1, 1, 1};
+
+    uint8_t bufferData[bufferSize] = {};
+    uint8_t bufferExpected[bufferSize];
+    memset(bufferExpected, 0xCD, bufferSize);
+
+    auto buffer = std::unique_ptr<Buffer>(Buffer::create(context, CL_MEM_USE_HOST_PTR | CL_MEM_ALLOW_UNRESTRICTED_SIZE_INTEL,
+                                                         bufferSize, bufferData, retVal));
+    ASSERT_NE(nullptr, buffer);
+
+    kernel->setArg(0, buffer.get());
+
+    retVal = this->pCmdQ->enqueueKernel(kernel.get(), workDim, globalWorkOffset, globalWorkSize,
+                                        localWorkSize, 0, nullptr, nullptr);
+
+    this->pCmdQ->flush();
+    expectMemory<FamilyType>(addrToPtr(ptrOffset(buffer->getGraphicsAllocation(rootDeviceIndex)->getGpuAddress(), buffer->getOffset())),
+                             bufferExpected, bufferSize);
+}

opencl/test/unit_test/aub_tests/xe2_hpg_core/lnl/CMakeLists.txt

@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_LNL)
+  target_sources(igdrcl_aub_tests PRIVATE
+                 ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+                 ${CMAKE_CURRENT_SOURCE_DIR}/copy_engine_aub_tests_lnl.cpp
+  )
+endif()

opencl/test/unit_test/aub_tests/xe2_hpg_core/lnl/copy_engine_aub_tests_lnl.cpp

@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_lnl.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/source/helpers/hardware_commands_helper.h"
+#include "opencl/test/unit_test/aub_tests/command_stream/copy_engine_aub_tests_xehp_and_later.h"
+
+using namespace NEO;
+
+template <uint32_t numTiles, typename FamilyType, bool useLocalMemory>
+struct CopyEnginesLnlFixture : public CopyEngineXeHPAndLater<numTiles, useLocalMemory> {
+
+    bool compressionSupported() const override {
+        auto &ftrTable = MulticontextOclAubFixture::rootDevice->getHardwareInfo().featureTable;
+        return (ftrTable.flags.ftrFlatPhysCCS);
+    }
+};
+
+using SingleTileSystemMemLnlCoreTests = CopyEnginesLnlFixture<1, Xe2HpgCoreFamily, false>;
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenNotCompressedBufferWhenBltExecutedThenCompressDataAndResolve) {
+    givenNotCompressedBufferWhenBltExecutedThenCompressDataAndResolveImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenHostPtrWhenBlitCommandToCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenHostPtrWhenBlitCommandToCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenDstHostPtrWhenBlitCommandFromCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenDstHostPtrWhenBlitCommandFromCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenDstHostPtrWhenBlitCommandFromNotCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenDstHostPtrWhenBlitCommandFromNotCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenSrcHostPtrWhenBlitCommandToNotCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenSrcHostPtrWhenBlitCommandToNotCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedFromHostPtrThenDataIsCorrectlyCopied) {
+    givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedFromHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopied) {
+    givenBufferWithOffsetWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenOffsetsWhenBltExecutedThenCopiedDataIsValid) {
+    givenOffsetsWhenBltExecutedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenSrcCompressedBufferWhenBlitCommandToDstCompressedBufferIsDispatchedThenCopiedDataIsValid) {
+    givenSrcCompressedBufferWhenBlitCommandToDstCompressedBufferIsDispatchedThenCopiedDataIsValidImpl<FamilyType>();
+}
+
+LNLTEST_F(SingleTileSystemMemLnlCoreTests, givenCompressedBufferWhenAuxTranslationCalledThenResolveAndCompress) {
+    givenCompressedBufferWhenAuxTranslationCalledThenResolveAndCompressImpl<FamilyType>();
+}

opencl/test/unit_test/aub_tests/xe2_hpg_core/system_memfence_aub_tests_xe2_hpg_core.cpp

@@ -0,0 +1,172 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/os_interface/product_helper.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/mocks/mock_execution_environment.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+#include "shared/test/common/utilities/base_object_utils.h"
+
+#include "opencl/source/api/api.h"
+#include "opencl/test/unit_test/aub_tests/fixtures/aub_fixture.h"
+#include "opencl/test/unit_test/aub_tests/fixtures/multicontext_ocl_aub_fixture.h"
+#include "opencl/test/unit_test/mocks/mock_kernel.h"
+
+using namespace NEO;
+
+class SystemMemFenceViaMiMemFence : public AUBFixture,
+                                    public ::testing::Test {
+  public:
+    void SetUp() override {
+        debugManager.flags.ProgramGlobalFenceAsMiMemFenceCommandInCommandStream.set(1);
+        debugManager.flags.ProgramGlobalFenceAsPostSyncOperationInComputeWalker.set(0);
+        debugManager.flags.ProgramGlobalFenceAsKernelInstructionInEUKernel.set(0);
+        AUBFixture::setUp(defaultHwInfo.get());
+    }
+    void TearDown() override {
+        AUBFixture::tearDown();
+    }
+
+    DebugManagerStateRestore debugRestorer;
+    cl_int retVal = CL_SUCCESS;
+};
+
+using SystemMemFenceViaMiMemFenceXe2HpgCore = SystemMemFenceViaMiMemFence;
+
+XE2_HPG_CORETEST_F(SystemMemFenceViaMiMemFenceXe2HpgCore, WhenGeneratedAsMiMemFenceCommandInCommandStreamThenWritesToSystemMemoryAreGloballyObservable) {
+    const size_t bufferSize = MemoryConstants::kiloByte;
+    std::vector<char> buffer(bufferSize, 0x11);
+
+    auto deviceMemAlloc = clDeviceMemAllocINTEL(this->context, this->device.get(), nullptr, bufferSize, 0, &retVal);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+    ASSERT_NE(nullptr, deviceMemAlloc);
+
+    retVal = clEnqueueMemcpyINTEL(this->pCmdQ, true, deviceMemAlloc, buffer.data(), bufferSize, 0, nullptr, nullptr);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    expectMemory<FamilyType>(deviceMemAlloc, buffer.data(), bufferSize);
+
+    auto hostMemAlloc = clHostMemAllocINTEL(this->context, nullptr, bufferSize, 0, &retVal);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+    ASSERT_NE(nullptr, hostMemAlloc);
+
+    retVal = clEnqueueMemcpyINTEL(this->pCmdQ, true, hostMemAlloc, deviceMemAlloc, bufferSize, 0, nullptr, nullptr);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    expectMemory<FamilyType>(hostMemAlloc, buffer.data(), bufferSize);
+
+    retVal = clMemFreeINTEL(this->context, deviceMemAlloc);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    retVal = clMemFreeINTEL(this->context, hostMemAlloc);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+}
+
+class SystemMemFenceViaComputeWalker : public AUBFixture,
+                                       public ::testing::Test {
+  public:
+    void SetUp() override {
+        debugManager.flags.ProgramGlobalFenceAsMiMemFenceCommandInCommandStream.set(0);
+        debugManager.flags.ProgramGlobalFenceAsPostSyncOperationInComputeWalker.set(1);
+        debugManager.flags.ProgramGlobalFenceAsKernelInstructionInEUKernel.set(0);
+        AUBFixture::setUp(defaultHwInfo.get());
+    }
+    void TearDown() override {
+        AUBFixture::tearDown();
+    }
+
+    DebugManagerStateRestore debugRestorer;
+    cl_int retVal = CL_SUCCESS;
+};
+
+using SystemMemFenceViaComputeWalkerXe2HpgCore = SystemMemFenceViaComputeWalker;
+
+XE2_HPG_CORETEST_F(SystemMemFenceViaComputeWalkerXe2HpgCore, WhenGeneratedAsPostSyncOperationInWalkerThenWritesToSystemMemoryAreGloballyObservable) {
+    const size_t bufferSize = MemoryConstants::kiloByte;
+    std::vector<char> buffer(bufferSize, 0x11);
+
+    auto deviceMemAlloc = clDeviceMemAllocINTEL(this->context, this->device.get(), nullptr, bufferSize, 0, &retVal);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+    ASSERT_NE(nullptr, deviceMemAlloc);
+
+    retVal = clEnqueueMemcpyINTEL(this->pCmdQ, true, deviceMemAlloc, buffer.data(), bufferSize, 0, nullptr, nullptr);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    expectMemory<FamilyType>(deviceMemAlloc, buffer.data(), bufferSize);
+
+    auto hostMemAlloc = clHostMemAllocINTEL(this->context, nullptr, bufferSize, 0, &retVal);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+    ASSERT_NE(nullptr, hostMemAlloc);
+
+    retVal = clEnqueueMemcpyINTEL(this->pCmdQ, true, hostMemAlloc, deviceMemAlloc, bufferSize, 0, nullptr, nullptr);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    expectMemory<FamilyType>(hostMemAlloc, buffer.data(), bufferSize);
+
+    retVal = clMemFreeINTEL(this->context, deviceMemAlloc);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    retVal = clMemFreeINTEL(this->context, hostMemAlloc);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+}
+
+class SystemMemFenceWithBlitterXe2HpgCore : public MulticontextOclAubFixture,
+                                            public ::testing::Test {
+  public:
+    void SetUp() override {
+        debugManager.flags.ProgramGlobalFenceAsMiMemFenceCommandInCommandStream.set(1);
+        debugManager.flags.ProgramGlobalFenceAsPostSyncOperationInComputeWalker.set(0);
+        debugManager.flags.ProgramGlobalFenceAsKernelInstructionInEUKernel.set(0);
+
+        debugManager.flags.EnableBlitterOperationsSupport.set(1);
+        debugManager.flags.EnableBlitterForEnqueueOperations.set(1);
+        MockExecutionEnvironment mockExecutionEnvironment{};
+        auto &productHelper = mockExecutionEnvironment.rootDeviceEnvironments[0]->getHelper<ProductHelper>();
+        if (!productHelper.obtainBlitterPreference(*defaultHwInfo.get())) {
+            GTEST_SKIP();
+        }
+
+        MulticontextOclAubFixture::setUp(1, EnabledCommandStreamers::single, false);
+    }
+    void TearDown() override {
+        MulticontextOclAubFixture::tearDown();
+    }
+
+    DebugManagerStateRestore debugRestorer;
+    cl_int retVal = CL_SUCCESS;
+};
+
+XE2_HPG_CORETEST_F(SystemMemFenceWithBlitterXe2HpgCore, givenSystemMemFenceWhenGeneratedAsMiMemFenceCmdInBCSThenWritesToSystemMemoryAreGloballyObservable) {
+    const size_t bufferSize = MemoryConstants::kiloByte;
+    std::vector<char> buffer(bufferSize, 0x11);
+
+    auto deviceMemAlloc = clDeviceMemAllocINTEL(context.get(), tileDevices[0], nullptr, bufferSize, 0, &retVal);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+    ASSERT_NE(nullptr, deviceMemAlloc);
+
+    retVal = clEnqueueMemcpyINTEL(commandQueues[0][0].get(), true, deviceMemAlloc, buffer.data(), bufferSize, 0, nullptr, nullptr);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    expectMemory<FamilyType>(deviceMemAlloc, buffer.data(), bufferSize, 0, 0);
+
+    auto hostMemAlloc = clHostMemAllocINTEL(context.get(), nullptr, bufferSize, 0, &retVal);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+    ASSERT_NE(nullptr, hostMemAlloc);
+
+    retVal = clEnqueueMemcpyINTEL(commandQueues[0][0].get(), true, hostMemAlloc, deviceMemAlloc, bufferSize, 0, nullptr, nullptr);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    expectMemory<FamilyType>(hostMemAlloc, buffer.data(), bufferSize, 0, 0);
+
+    retVal = clMemFreeINTEL(context.get(), deviceMemAlloc);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    retVal = clMemFreeINTEL(context.get(), hostMemAlloc);
+    EXPECT_EQ(CL_SUCCESS, retVal);
+}

opencl/test/unit_test/command_stream/CMakeLists.txt

@@ -42,5 +42,11 @@ if(TESTS_DG2_AND_LATER)
   )
 endif()
 
+if(TESTS_XE2_AND_LATER)
+  list(APPEND IGDRCL_SRCS_tests_command_stream
+       ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_hw_tests_xe2_and_later.cpp
+  )
+endif()
+
 target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_command_stream})
 add_subdirectories()

opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_xe2_and_later.cpp

@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/libult/ult_command_stream_receiver.h"
+#include "shared/test/common/test_macros/hw_test.h"
+
+#include "opencl/test/unit_test/fixtures/ult_command_stream_receiver_fixture.h"
+
+#include "gtest/gtest.h"
+
+using CommandStreamReceiverXe2AndLater = UltCommandStreamReceiverTest;
+
+HWTEST2_F(CommandStreamReceiverXe2AndLater, GivenPreambleNotSentAndDebugFlagEnabledWhenFlushingTaskThenPipelineSelectIsSent, IsAtLeastXe2HpgCore) {
+    DebugManagerStateRestore restorer{};
+    debugManager.flags.PipelinedPipelineSelect.set(true);
+
+    auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
+    commandStreamReceiver.isPreambleSent = false;
+
+    flushTask(commandStreamReceiver);
+    parseCommands<FamilyType>(commandStreamReceiver.commandStream, 0);
+    EXPECT_NE(nullptr, getCommand<typename FamilyType::PIPELINE_SELECT>());
+}
+
+HWTEST2_F(CommandStreamReceiverXe2AndLater, GivenPreambleNotSentAndDebugFlagDisabledWhenFlushingTaskThenPipelineSelectIsNotSent, IsAtLeastXe2HpgCore) {
+    DebugManagerStateRestore restorer{};
+    debugManager.flags.PipelinedPipelineSelect.set(false);
+
+    auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
+    commandStreamReceiver.isPreambleSent = false;
+
+    flushTask(commandStreamReceiver);
+    parseCommands<FamilyType>(commandStreamReceiver.commandStream, 0);
+    EXPECT_EQ(nullptr, getCommand<typename FamilyType::PIPELINE_SELECT>());
+}

opencl/test/unit_test/xe2_hpg_core/CMakeLists.txt

@@ -0,0 +1,35 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_XE2_HPG_CORE)
+  set(IGDRCL_SRCS_tests_xe2_hpg_core_excludes
+      ${CMAKE_CURRENT_SOURCE_DIR}/excludes_ocl_xe2_hpg_core.cpp
+  )
+  set_property(GLOBAL APPEND PROPERTY IGDRCL_SRCS_tests_excludes ${IGDRCL_SRCS_tests_xe2_hpg_core_excludes})
+
+  set(IGDRCL_SRCS_tests_xe2_hpg_core
+      ${IGDRCL_SRCS_tests_xe2_hpg_core_excludes}
+      ${CMAKE_CURRENT_SOURCE_DIR}/cl_gfx_core_helper_tests_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+      ${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_tests_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_hw_tests_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/copy_engine_tests_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/dispatch_walker_tests_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/enqueue_tests_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_cmds_programming_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_cl_device_caps_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_platform_caps_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_preamble_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_preemption_xe2_hpg_core.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_sample_xe2_hpg_core.cpp
+  )
+
+  get_property(NEO_CORE_TESTS_XE2_HPG_CORE GLOBAL PROPERTY NEO_CORE_TESTS_XE2_HPG_CORE)
+  list(APPEND IGDRCL_SRCS_tests_xe2_hpg_core ${NEO_CORE_TESTS_XE2_HPG_CORE})
+
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_xe2_hpg_core})
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe2_hpg_core/bmg/CMakeLists.txt

@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_BMG)
+  set(IGDRCL_SRCS_tests_xe2_hpg_core_bmg
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+      ${CMAKE_CURRENT_SOURCE_DIR}/device_info_tests_bmg.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_cl_device_caps_bmg.cpp
+  )
+
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_xe2_hpg_core_bmg})
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe2_hpg_core/bmg/device_info_tests_bmg.cpp

@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_bmg.h"
+#include "shared/source/xe2_hpg_core/hw_info_bmg.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/test/unit_test/fixtures/device_info_fixture.h"
+
+using GetDeviceInfoMemCapabilitiesTestBmgLinux = NEO::GetDeviceInfoMemCapabilitiesTest;
+
+BMGTEST_F(GetDeviceInfoMemCapabilitiesTestBmgLinux, GivenValidParametersWhenGetDeviceInfoIsCalledForBmgLinuxThenClSuccessIsReturned) {
+    std::vector<TestParams> params = {
+        {CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL,
+         0}};
+
+    check(params);
+}

opencl/test/unit_test/xe2_hpg_core/bmg/linux/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(UNIX)
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe2_hpg_core/bmg/linux/dll/CMakeLists.txt

@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set(IGDRCL_SRCS_linux_dll_tests_xe2_hpg_core_bmg
+    ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+    ${CMAKE_CURRENT_SOURCE_DIR}/device_id_tests_bmg.cpp
+)
+target_sources(igdrcl_linux_dll_tests PRIVATE ${IGDRCL_SRCS_linux_dll_tests_xe2_hpg_core_bmg})
+add_subdirectories()

opencl/test/unit_test/xe2_hpg_core/bmg/linux/dll/device_id_tests_bmg.cpp

@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/fixtures/linux/device_id_fixture.h"
+
+using namespace NEO;
+
+TEST_F(DeviceIdTests, GivenBmgSupportedDeviceIdThenDeviceDescriptorTableExists) {
+    std::array<DeviceDescriptor, 5> expectedDescriptors = {{
+        {0xE202, &BmgHwConfig::hwInfo, &BmgHwConfig::setupHardwareInfo},
+        {0xE20B, &BmgHwConfig::hwInfo, &BmgHwConfig::setupHardwareInfo},
+        {0xE20C, &BmgHwConfig::hwInfo, &BmgHwConfig::setupHardwareInfo},
+        {0xE20D, &BmgHwConfig::hwInfo, &BmgHwConfig::setupHardwareInfo},
+        {0xE212, &BmgHwConfig::hwInfo, &BmgHwConfig::setupHardwareInfo},
+    }};
+
+    testImpl(expectedDescriptors);
+}

opencl/test/unit_test/xe2_hpg_core/bmg/test_cl_device_caps_bmg.cpp

@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_bmg.h"
+#include "shared/source/xe2_hpg_core/hw_info_bmg.h"
+#include "shared/test/common/helpers/gtest_helpers.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+#include "opencl/test/unit_test/mocks/mock_cl_device.h"
+
+using namespace NEO;
+
+using BmgClDeviceIdTest = Test<ClDeviceFixture>;
+
+BMGTEST_F(BmgClDeviceIdTest, givenDeviceExtensionsWhenDeviceCapsInitializedThenAddProperExtensions) {
+    const auto &dInfo = pClDevice->getDeviceInfo();
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_create_buffer_with_properties")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_subgroup_local_block_io")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_subgroup_matrix_multiply_accumulate")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_khr_subgroup_named_barrier")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_subgroup_extended_block_read")));
+}

opencl/test/unit_test/xe2_hpg_core/cl_gfx_core_helper_tests_xe2_hpg_core.cpp

@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/program/kernel_info.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/helpers/gfx_core_helper_tests.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+
+#include "opencl/source/helpers/cl_gfx_core_helper.h"
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+
+using ClGfxCoreHelperTestsXe2HpgCore = Test<ClDeviceFixture>;
+
+XE2_HPG_CORETEST_F(ClGfxCoreHelperTestsXe2HpgCore, givenXe2HpgCoreThenAuxTranslationIsNotRequired) {
+    auto &clGfxCoreHelper = getHelper<ClGfxCoreHelper>();
+    KernelInfo kernelInfo{};
+
+    EXPECT_FALSE(clGfxCoreHelper.requiresAuxResolves(kernelInfo));
+}
+XE2_HPG_CORETEST_F(ClGfxCoreHelperTestsXe2HpgCore, WhenCheckingPreferenceForBlitterForLocalToLocalTransfersThenReturnFalse) {
+    auto &clGfxCoreHelper = getHelper<ClGfxCoreHelper>();
+
+    EXPECT_FALSE(clGfxCoreHelper.preferBlitterForLocalToLocalTransfers());
+}
+XE2_HPG_CORETEST_F(ClGfxCoreHelperTestsXe2HpgCore, WhenCheckingIsLimitationForPreemptionNeededThenReturnTrue) {
+    auto &clGfxCoreHelper = getHelper<ClGfxCoreHelper>();
+
+    EXPECT_TRUE(clGfxCoreHelper.isLimitationForPreemptionNeeded());
+}

opencl/test/unit_test/xe2_hpg_core/cmd_parse_tests_xe2_hpg_core.cpp

@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_base.h"
+#include "shared/source/xe2_hpg_core/hw_info.h"
+#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
+#include "shared/test/common/cmd_parse/hw_parse.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+
+using namespace NEO;
+
+using CmdParseTestsXe2HpgCore = ::testing::Test;
+
+XE2_HPG_CORETEST_F(CmdParseTestsXe2HpgCore, givenMiMemFenceCmdWhenParsingThenFindCommandAndsItsName) {
+    using MI_MEM_FENCE = typename FamilyType::MI_MEM_FENCE;
+
+    uint32_t buffer[64] = {};
+    LinearStream cmdStream(buffer, sizeof(buffer));
+
+    auto miMemFenceCmd = cmdStream.getSpaceForCmd<MI_MEM_FENCE>();
+    miMemFenceCmd->init();
+
+    EXPECT_NE(nullptr, genCmdCast<MI_MEM_FENCE *>(buffer));
+
+    auto commandName = CmdParse<FamilyType>::getCommandName(buffer);
+    EXPECT_EQ(0, strcmp(commandName, "MI_MEM_FENCE"));
+
+    HardwareParse hwParser;
+
+    hwParser.parseCommands<FamilyType>(cmdStream, 0);
+
+    EXPECT_EQ(1u, hwParser.cmdList.size());
+}
+
+XE2_HPG_CORETEST_F(CmdParseTestsXe2HpgCore, givenStateSystemMemFenceAddrCmdWhenParsingThenFindCommandAndsItsName) {
+    using STATE_SYSTEM_MEM_FENCE_ADDRESS = typename FamilyType::STATE_SYSTEM_MEM_FENCE_ADDRESS;
+
+    uint32_t buffer[64] = {};
+    LinearStream cmdStream(buffer, sizeof(buffer));
+
+    auto stateSystemMemFenceCmd = cmdStream.getSpaceForCmd<STATE_SYSTEM_MEM_FENCE_ADDRESS>();
+    stateSystemMemFenceCmd->init();
+
+    EXPECT_NE(nullptr, genCmdCast<STATE_SYSTEM_MEM_FENCE_ADDRESS *>(buffer));
+
+    auto commandName = CmdParse<FamilyType>::getCommandName(buffer);
+    EXPECT_EQ(0, strcmp(commandName, "STATE_SYSTEM_MEM_FENCE_ADDRESS"));
+
+    HardwareParse hwParser;
+
+    hwParser.parseCommands<FamilyType>(cmdStream, 0);
+
+    EXPECT_EQ(1u, hwParser.cmdList.size());
+}

opencl/test/unit_test/xe2_hpg_core/copy_engine_tests_xe2_hpg_core.cpp

@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/gmm_helper/gmm_helper.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/cmd_parse/hw_parse.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/libult/ult_command_stream_receiver.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/mocks/mock_graphics_allocation.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+#include "shared/test/common/utilities/base_object_utils.h"
+
+#include "opencl/source/command_queue/command_queue_hw.h"
+#include "opencl/source/mem_obj/buffer.h"
+#include "opencl/test/unit_test/mocks/mock_cl_device.h"
+#include "opencl/test/unit_test/mocks/mock_context.h"
+
+using namespace NEO;
+
+struct BlitXe2HpgCoreTests : public ::testing::Test {
+    void SetUp() override {
+        if (is32bit) {
+            GTEST_SKIP();
+        }
+        debugManager.flags.RenderCompressedBuffersEnabled.set(true);
+        debugManager.flags.EnableLocalMemory.set(true);
+        HardwareInfo hwInfo = *defaultHwInfo;
+        hwInfo.capabilityTable.blitterOperationsSupported = true;
+
+        clDevice = std::make_unique<MockClDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(&hwInfo));
+    }
+
+    std::optional<TaskCountType> flushBcsTask(CommandStreamReceiver *csr, const BlitProperties &blitProperties, bool blocking, Device &device) {
+        BlitPropertiesContainer blitPropertiesContainer;
+        blitPropertiesContainer.push_back(blitProperties);
+
+        return csr->flushBcsTask(blitPropertiesContainer, blocking, false, device);
+    }
+
+    std::unique_ptr<MockClDevice> clDevice;
+    TimestampPacketContainer timestampPacketContainer;
+    CsrDependencies csrDependencies;
+    DebugManagerStateRestore debugRestorer;
+};
+
+XE2_HPG_CORETEST_F(BlitXe2HpgCoreTests, givenBufferWhenProgrammingBltCommandThenSetMocs) {
+    using MEM_COPY = typename FamilyType::MEM_COPY;
+
+    auto &bcsEngine = clDevice->getEngine(aub_stream::EngineType::ENGINE_BCS, EngineUsage::regular);
+    auto csr = static_cast<UltCommandStreamReceiver<FamilyType> *>(bcsEngine.commandStreamReceiver);
+    MockContext context(clDevice.get());
+    MockGraphicsAllocation clearColorAlloc;
+
+    cl_int retVal = CL_SUCCESS;
+    auto buffer = clUniquePtr<Buffer>(Buffer::create(&context, CL_MEM_READ_WRITE, 1, nullptr, retVal));
+    auto blitProperties = BlitProperties::constructPropertiesForCopy(buffer->getGraphicsAllocation(clDevice->getRootDeviceIndex()),
+                                                                     buffer->getGraphicsAllocation(clDevice->getRootDeviceIndex()),
+                                                                     0, 0, {1, 1, 1}, 0, 0, 0, 0, &clearColorAlloc);
+
+    flushBcsTask(csr, blitProperties, true, clDevice->getDevice());
+
+    HardwareParse hwParser;
+    hwParser.parseCommands<FamilyType>(csr->commandStream);
+
+    auto itorBltCmd = find<MEM_COPY *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
+    ASSERT_NE(hwParser.cmdList.end(), itorBltCmd);
+    MEM_COPY *bltCmd = (MEM_COPY *)*itorBltCmd;
+
+    if (clDevice->getGmmHelper()->deferMOCSToPatIndex()) {
+        EXPECT_EQ(0u, bltCmd->getDestinationMOCS());
+        EXPECT_EQ(0u, bltCmd->getSourceMOCS());
+    } else {
+        auto mocsL3Enabled = 0x10u;
+        EXPECT_EQ(mocsL3Enabled, bltCmd->getDestinationMOCS());
+        EXPECT_EQ(mocsL3Enabled, bltCmd->getSourceMOCS());
+    }
+}
+
+XE2_HPG_CORETEST_F(BlitXe2HpgCoreTests, givenBufferWhenProgrammingBltCommandThenSetMocsToValueOfDebugKey) {
+    uint32_t expectedMocs = 0;
+
+    DebugManagerStateRestore restorer;
+    debugManager.flags.OverrideBlitterMocs.set(expectedMocs);
+    using MEM_COPY = typename FamilyType::MEM_COPY;
+
+    auto &bcsEngine = clDevice->getEngine(aub_stream::EngineType::ENGINE_BCS, EngineUsage::regular);
+    auto csr = static_cast<UltCommandStreamReceiver<FamilyType> *>(bcsEngine.commandStreamReceiver);
+    MockContext context(clDevice.get());
+    MockGraphicsAllocation clearColorAlloc;
+
+    cl_int retVal = CL_SUCCESS;
+    auto buffer = clUniquePtr<Buffer>(Buffer::create(&context, CL_MEM_READ_WRITE, 1, nullptr, retVal));
+    auto blitProperties = BlitProperties::constructPropertiesForCopy(buffer->getGraphicsAllocation(clDevice->getRootDeviceIndex()),
+                                                                     buffer->getGraphicsAllocation(clDevice->getRootDeviceIndex()),
+                                                                     0, 0, {1, 1, 1}, 0, 0, 0, 0, &clearColorAlloc);
+
+    flushBcsTask(csr, blitProperties, true, clDevice->getDevice());
+
+    HardwareParse hwParser;
+    hwParser.parseCommands<FamilyType>(csr->commandStream);
+
+    auto itorBltCmd = find<MEM_COPY *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
+    ASSERT_NE(hwParser.cmdList.end(), itorBltCmd);
+    MEM_COPY *bltCmd = (MEM_COPY *)*itorBltCmd;
+
+    EXPECT_EQ(expectedMocs, bltCmd->getDestinationMOCS());
+    EXPECT_EQ(expectedMocs, bltCmd->getSourceMOCS());
+}
+
+XE2_HPG_CORETEST_F(BlitXe2HpgCoreTests, given2dBlitCommandWhenDispatchingThenSetValidSurfaceType) {
+    using MEM_COPY = typename FamilyType::MEM_COPY;
+
+    auto &bcsEngine = clDevice->getEngine(aub_stream::EngineType::ENGINE_BCS, EngineUsage::regular);
+    auto csr = static_cast<UltCommandStreamReceiver<FamilyType> *>(bcsEngine.commandStreamReceiver);
+    MockContext context(clDevice.get());
+
+    cl_int retVal = CL_SUCCESS;
+    auto buffer = clUniquePtr<Buffer>(Buffer::create(&context, CL_MEM_READ_WRITE, 1, nullptr, retVal));
+    auto allocation = buffer->getGraphicsAllocation(clDevice->getRootDeviceIndex());
+    MockGraphicsAllocation clearColorAlloc;
+
+    size_t offset = 0;
+    {
+        // 1D
+        auto blitProperties = BlitProperties::constructPropertiesForCopy(allocation, allocation,
+                                                                         0, 0, {BlitterConstants::maxBlitWidth - 1, 1, 1}, 0, 0, 0, 0, &clearColorAlloc);
+        flushBcsTask(csr, blitProperties, false, clDevice->getDevice());
+
+        HardwareParse hwParser;
+        hwParser.parseCommands<FamilyType>(csr->commandStream);
+
+        auto cmdIterator = find<MEM_COPY *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
+        ASSERT_NE(hwParser.cmdList.end(), cmdIterator);
+
+        auto bltCmd = genCmdCast<MEM_COPY *>(*cmdIterator);
+        EXPECT_NE(nullptr, bltCmd);
+
+        EXPECT_EQ(MEM_COPY::COPY_TYPE::COPY_TYPE_LINEAR_COPY, bltCmd->getCopyType());
+
+        offset = csr->commandStream.getUsed();
+    }
+
+    {
+        // 2D
+        auto blitProperties = BlitProperties::constructPropertiesForCopy(allocation, allocation,
+                                                                         0, 0, {(2 * BlitterConstants::maxBlitWidth) + 1, 1, 1}, 0, 0, 0, 0, &clearColorAlloc);
+        flushBcsTask(csr, blitProperties, false, clDevice->getDevice());
+
+        HardwareParse hwParser;
+        hwParser.parseCommands<FamilyType>(csr->commandStream, offset);
+
+        auto cmdIterator = find<MEM_COPY *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
+        ASSERT_NE(hwParser.cmdList.end(), cmdIterator);
+
+        auto bltCmd = genCmdCast<MEM_COPY *>(*cmdIterator);
+        EXPECT_NE(nullptr, bltCmd);
+
+        EXPECT_EQ(MEM_COPY::COPY_TYPE::COPY_TYPE_MATRIX_COPY, bltCmd->getCopyType());
+    }
+}
+
+using Xe2HpgCoreCopyEngineTests = ::testing::Test;
+XE2_HPG_CORETEST_F(Xe2HpgCoreCopyEngineTests, givenCommandQueueWhenAskingForCacheFlushOnBcsThenReturnCorrectValue) {
+    auto clDevice = std::make_unique<MockClDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(defaultHwInfo.get()));
+    MockContext context(clDevice.get());
+
+    cl_int retVal = CL_SUCCESS;
+    auto commandQueue = std::unique_ptr<CommandQueue>(CommandQueue::create(&context, clDevice.get(), nullptr, false, retVal));
+    auto commandQueueHw = static_cast<CommandQueueHw<FamilyType> *>(commandQueue.get());
+
+    const auto &productHelper = clDevice->getProductHelper();
+    EXPECT_EQ(productHelper.isDcFlushAllowed(), commandQueueHw->isCacheFlushForBcsRequired());
+}
+
+XE2_HPG_CORETEST_F(Xe2HpgCoreCopyEngineTests, givenDebugFlagSetWhenCheckingBcsCacheFlushRequirementThenReturnCorrectValue) {
+    DebugManagerStateRestore restorer;
+    auto clDevice = std::make_unique<MockClDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(defaultHwInfo.get()));
+    MockContext context(clDevice.get());
+
+    cl_int retVal = CL_SUCCESS;
+    auto commandQueue = std::unique_ptr<CommandQueue>(CommandQueue::create(&context, clDevice.get(), nullptr, false, retVal));
+    auto commandQueueHw = static_cast<CommandQueueHw<FamilyType> *>(commandQueue.get());
+
+    debugManager.flags.ForceCacheFlushForBcs.set(0);
+    EXPECT_FALSE(commandQueueHw->isCacheFlushForBcsRequired());
+
+    debugManager.flags.ForceCacheFlushForBcs.set(1);
+    EXPECT_TRUE(commandQueueHw->isCacheFlushForBcsRequired());
+}

opencl/test/unit_test/xe2_hpg_core/dispatch_walker_tests_xe2_hpg_core.cpp

@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_container/command_encoder.h"
+#include "shared/source/kernel/kernel_descriptor.h"
+#include "shared/source/os_interface/product_helper.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/helpers/default_hw_info.h"
+#include "shared/test/common/mocks/mock_execution_environment.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+using namespace NEO;
+
+using WalkerDispatchTestsXe2HpGCore = ::testing::Test;
+
+XE2_HPG_CORETEST_F(WalkerDispatchTestsXe2HpGCore, whenEncodeAdditionalWalkerFieldsIsCalledThenComputeDispatchAllIsCorrectlySet) {
+    using COMPUTE_WALKER = typename FamilyType::COMPUTE_WALKER;
+
+    DebugManagerStateRestore debugRestorer;
+    auto walkerCmd = FamilyType::cmdInitGpgpuWalker;
+    MockExecutionEnvironment mockExecutionEnvironment{};
+    auto &rootDeviceEnvironment = *mockExecutionEnvironment.rootDeviceEnvironments[0];
+
+    KernelDescriptor kernelDescriptor;
+    EncodeWalkerArgs walkerArgs{KernelExecutionType::concurrent, true, kernelDescriptor, NEO::RequiredDispatchWalkOrder::none, 0, 0};
+    {
+        EncodeDispatchKernel<FamilyType>::encodeAdditionalWalkerFields(rootDeviceEnvironment, walkerCmd, walkerArgs);
+        EXPECT_TRUE(walkerCmd.getComputeDispatchAllWalkerEnable());
+    }
+
+    {
+        walkerArgs.kernelExecutionType = KernelExecutionType::defaultType;
+        debugManager.flags.ComputeDispatchAllWalkerEnableInComputeWalker.set(1);
+        EncodeDispatchKernel<FamilyType>::encodeAdditionalWalkerFields(rootDeviceEnvironment, walkerCmd, walkerArgs);
+
+        EXPECT_TRUE(walkerCmd.getComputeDispatchAllWalkerEnable());
+    }
+}

opencl/test/unit_test/xe2_hpg_core/enqueue_tests_xe2_hpg_core.cpp

@@ -0,0 +1,172 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_container/command_encoder.h"
+#include "shared/source/helpers/gfx_core_helper.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
+#include "shared/test/common/cmd_parse/hw_parse.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/mocks/mock_graphics_allocation.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/source/command_queue/hardware_interface.h"
+#include "opencl/test/unit_test/command_queue/hardware_interface_helper.h"
+#include "opencl/test/unit_test/mocks/mock_cl_device.h"
+#include "opencl/test/unit_test/mocks/mock_command_queue.h"
+#include "opencl/test/unit_test/mocks/mock_context.h"
+#include "opencl/test/unit_test/mocks/mock_kernel.h"
+
+using namespace NEO;
+
+struct EnqueueFixtureXe2HpgCore : public ::testing::Test {
+    void SetUp() override {
+        debugManager.flags.EnableMemoryPrefetch.set(1);
+
+        clDevice = std::make_unique<MockClDevice>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(defaultHwInfo.get(), mockRootDeviceIndex));
+        context = std::make_unique<MockContext>(clDevice.get());
+
+        mockKernel = std::make_unique<MockKernelWithInternals>(*clDevice, context.get());
+        mockKernel->kernelInfo.createKernelAllocation(clDevice->getDevice(), false);
+
+        dispatchInfo = {clDevice.get(), mockKernel->mockKernel, 1, 0, 0, 0};
+    }
+
+    void TearDown() override {
+        clDevice->getMemoryManager()->freeGraphicsMemory(mockKernel->kernelInfo.getGraphicsAllocation());
+    }
+
+    template <typename FamilyType>
+    std::unique_ptr<MockCommandQueueHw<FamilyType>> createCommandQueue() {
+        return std::make_unique<MockCommandQueueHw<FamilyType>>(context.get(), clDevice.get(), nullptr);
+    }
+
+    DebugManagerStateRestore restore;
+    std::unique_ptr<MockClDevice> clDevice;
+    std::unique_ptr<MockContext> context;
+    std::unique_ptr<MockKernelWithInternals> mockKernel;
+    DispatchInfo dispatchInfo;
+};
+
+using MemoryPrefetchTestsXe2HpgCore = EnqueueFixtureXe2HpgCore;
+
+XE2_HPG_CORETEST_F(MemoryPrefetchTestsXe2HpgCore, givenKernelWhenWalkerIsProgrammedThenPrefetchIsaBeforeWalker) {
+    using COMPUTE_WALKER = typename FamilyType::COMPUTE_WALKER;
+    using STATE_PREFETCH = typename FamilyType::STATE_PREFETCH;
+
+    auto commandQueue = createCommandQueue<FamilyType>();
+    auto &commandStream = commandQueue->getCS(1024);
+
+    auto &heap = commandQueue->getIndirectHeap(IndirectHeap::Type::dynamicState, 1);
+    size_t workSize[] = {1, 1, 1};
+    Vec3<size_t> wgInfo = {1, 1, 1};
+
+    mockKernel->kernelInfo.heapInfo.kernelHeapSize = 1;
+
+    HardwareInterfaceWalkerArgs walkerArgs = createHardwareInterfaceWalkerArgs(workSize, wgInfo, PreemptionMode::Disabled);
+
+    HardwareInterface<FamilyType>::template programWalker<COMPUTE_WALKER>(commandStream, *mockKernel->mockKernel, *commandQueue, heap, heap, heap, dispatchInfo, walkerArgs);
+
+    HardwareParse hwParse;
+    hwParse.parseCommands<FamilyType>(commandStream, 0);
+    auto itorWalker = find<COMPUTE_WALKER *>(hwParse.cmdList.begin(), hwParse.cmdList.end());
+    EXPECT_NE(hwParse.cmdList.end(), itorWalker);
+
+    auto itorStatePrefetch = find<STATE_PREFETCH *>(hwParse.cmdList.begin(), itorWalker);
+    EXPECT_NE(itorWalker, itorStatePrefetch);
+
+    auto statePrefetchCmd = genCmdCast<STATE_PREFETCH *>(*itorStatePrefetch);
+    EXPECT_NE(nullptr, statePrefetchCmd);
+
+    EXPECT_EQ(mockKernel->kernelInfo.getGraphicsAllocation()->getGpuAddress(), statePrefetchCmd->getAddress());
+    EXPECT_TRUE(statePrefetchCmd->getKernelInstructionPrefetch());
+}
+
+XE2_HPG_CORETEST_F(MemoryPrefetchTestsXe2HpgCore, givenPrefetchEnabledWhenEstimatingCommandsSizeThenAddStatePrefetch) {
+    auto commandQueue = createCommandQueue<FamilyType>();
+
+    size_t numPipeControls = MemorySynchronizationCommands<FamilyType>::isBarrierWaRequired(clDevice->getRootDeviceEnvironment()) ? 2 : 1;
+
+    size_t expected = sizeof(typename FamilyType::COMPUTE_WALKER) +
+                      (sizeof(typename FamilyType::PIPE_CONTROL) * numPipeControls) +
+                      HardwareCommandsHelper<FamilyType>::getSizeRequiredCS() +
+                      EncodeMemoryPrefetch<FamilyType>::getSizeForMemoryPrefetch(mockKernel->kernelInfo.heapInfo.kernelHeapSize, clDevice->getRootDeviceEnvironment());
+
+    EXPECT_EQ(expected, EnqueueOperation<FamilyType>::getSizeRequiredCS(CL_COMMAND_NDRANGE_KERNEL, false, false, *commandQueue, mockKernel->mockKernel, {}));
+}
+
+using ProgramWalkerTestsXe2HpgCore = EnqueueFixtureXe2HpgCore;
+
+XE2_HPG_CORETEST_F(ProgramWalkerTestsXe2HpgCore, givenDebugVariableSetWhenProgrammingWalkerThenSetL3Prefetch) {
+    using COMPUTE_WALKER = typename FamilyType::COMPUTE_WALKER;
+
+    auto commandQueue = createCommandQueue<FamilyType>();
+    auto &commandStream = commandQueue->getCS(1024);
+
+    auto &heap = commandQueue->getIndirectHeap(IndirectHeap::Type::dynamicState, 1);
+    size_t workSize[] = {1, 1, 1};
+    Vec3<size_t> wgInfo = {1, 1, 1};
+
+    size_t commandsOffset = 0;
+
+    HardwareInterfaceWalkerArgs walkerArgs = createHardwareInterfaceWalkerArgs(workSize, wgInfo, PreemptionMode::Disabled);
+
+    {
+        // default
+        HardwareInterface<FamilyType>::template programWalker<COMPUTE_WALKER>(commandStream, *mockKernel->mockKernel, *commandQueue,
+                                                                              heap, heap, heap, dispatchInfo, walkerArgs);
+
+        HardwareParse hwParse;
+        hwParse.parseCommands<FamilyType>(commandStream, 0);
+        auto itorWalker = find<COMPUTE_WALKER *>(hwParse.cmdList.begin(), hwParse.cmdList.end());
+        EXPECT_NE(hwParse.cmdList.end(), itorWalker);
+        auto walkerCmd = genCmdCast<COMPUTE_WALKER *>(*itorWalker);
+        EXPECT_NE(nullptr, walkerCmd);
+
+        EXPECT_FALSE(walkerCmd->getL3PrefetchDisable());
+    }
+
+    {
+        // debug flag == 1
+
+        commandsOffset = commandStream.getUsed();
+        debugManager.flags.ForceL3PrefetchForComputeWalker.set(1);
+
+        HardwareInterface<FamilyType>::template programWalker<COMPUTE_WALKER>(commandStream, *mockKernel->mockKernel, *commandQueue,
+                                                                              heap, heap, heap, dispatchInfo, walkerArgs);
+
+        HardwareParse hwParse;
+        hwParse.parseCommands<FamilyType>(commandStream, commandsOffset);
+        auto itorWalker = find<COMPUTE_WALKER *>(hwParse.cmdList.begin(), hwParse.cmdList.end());
+        EXPECT_NE(hwParse.cmdList.end(), itorWalker);
+        auto walkerCmd = genCmdCast<COMPUTE_WALKER *>(*itorWalker);
+        EXPECT_NE(nullptr, walkerCmd);
+
+        EXPECT_FALSE(walkerCmd->getL3PrefetchDisable());
+    }
+
+    {
+        // debug flag == 0
+
+        commandsOffset = commandStream.getUsed();
+        debugManager.flags.ForceL3PrefetchForComputeWalker.set(0);
+
+        HardwareInterface<FamilyType>::template programWalker<COMPUTE_WALKER>(commandStream, *mockKernel->mockKernel, *commandQueue,
+                                                                              heap, heap, heap, dispatchInfo, walkerArgs);
+
+        HardwareParse hwParse;
+        hwParse.parseCommands<FamilyType>(commandStream, commandsOffset);
+        auto itorWalker = find<COMPUTE_WALKER *>(hwParse.cmdList.begin(), hwParse.cmdList.end());
+        EXPECT_NE(hwParse.cmdList.end(), itorWalker);
+        auto walkerCmd = genCmdCast<COMPUTE_WALKER *>(*itorWalker);
+        EXPECT_NE(nullptr, walkerCmd);
+
+        EXPECT_TRUE(walkerCmd->getL3PrefetchDisable());
+    }
+}

opencl/test/unit_test/xe2_hpg_core/excludes_ocl_xe2_hpg_core.cpp

@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/test_macros/hw_test_base.h"
+
+HWTEST_EXCLUDE_PRODUCT(BufferSetSurfaceTests, givenAlignedCacheableReadOnlyBufferThenChoseOclBufferPolicy, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(BufferSetSurfaceTests, givenBufferSetSurfaceThatMemoryIsUnalignedToCachelineButReadOnlyThenL3CacheShouldBeStillOn, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(ImageSetArgTest, givenMcsAllocationWhenSetArgIsCalledWithUnifiedAuxCapabilityThenProgramAuxFieldsForCcs, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(ImageSetArgTest, givenCompressedResourceWhenSettingImgArgThenSetCorrectAuxParams, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(XeHPAndLaterImageTests, givenCompressionEnabledWhenAppendingSurfaceStateParamsThenProgramCompressionFormat, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(QueueFamilyNameTest, givenRcsWhenGettingQueueFamilyNameThenReturnProperValue, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(DeviceGetCapsTest, givenDeviceWhenAskingForSubGroupSizesThenReturnCorrectValues, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(DeviceGetCapsTest, givenDisabledFtrPooledEuWhenCalculatingMaxEuPerSSThenIgnoreEuCountPerPoolMin, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(DeviceGetCapsTest, givenEnabledFtrPooledEuWhenCalculatingMaxEuPerSSThenDontIgnoreEuCountPerPoolMin, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(CommandQueueHwTest, givenCommandQueueWhenAskingForCacheFlushOnBcsThenReturnTrue, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(CommandStreamReceiverFlushTaskTests, givenOverrideThreadArbitrationPolicyDebugVariableSetWhenFlushingThenRequestRequiredMode, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(ClGfxCoreHelperTest, givenKernelInfoWhenCheckingRequiresAuxResolvesThenCorrectValuesAreReturned, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(MidThreadPreemptionTests, GivenValueArgWhenOverrideMidThreadPreemptionSupportThenNothingChange, IGFX_XE2_HPG_CORE);
+HWTEST_EXCLUDE_PRODUCT(ClGfxCoreHelperTest, WhenCheckingIsLimitationForPreemptionNeededThenReturnFalse, IGFX_XE2_HPG_CORE);

opencl/test/unit_test/xe2_hpg_core/lnl/CMakeLists.txt

@@ -0,0 +1,16 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(TESTS_LNL)
+  set(IGDRCL_SRCS_tests_xe2_hpg_core_lnl
+      ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+      ${CMAKE_CURRENT_SOURCE_DIR}/device_info_tests_lnl.cpp
+      ${CMAKE_CURRENT_SOURCE_DIR}/test_cl_device_caps_lnl.cpp
+  )
+
+  target_sources(igdrcl_tests PRIVATE ${IGDRCL_SRCS_tests_xe2_hpg_core_lnl})
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe2_hpg_core/lnl/device_info_tests_lnl.cpp

@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_lnl.h"
+#include "shared/source/xe2_hpg_core/hw_info_lnl.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/test/unit_test/fixtures/device_info_fixture.h"
+
+using GetDeviceInfoMemCapabilitiesTestLnlLinux = NEO::GetDeviceInfoMemCapabilitiesTest;
+
+LNLTEST_F(GetDeviceInfoMemCapabilitiesTestLnlLinux, GivenValidParametersWhenGetDeviceInfoIsCalledForLnlLinuxThenClSuccessIsReturned) {
+    std::vector<TestParams> params = {
+        {CL_DEVICE_HOST_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_DEVICE_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_SINGLE_DEVICE_SHARED_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_CROSS_DEVICE_SHARED_MEM_CAPABILITIES_INTEL,
+         (CL_UNIFIED_SHARED_MEMORY_ACCESS_INTEL | CL_UNIFIED_SHARED_MEMORY_ATOMIC_ACCESS_INTEL)},
+        {CL_DEVICE_SHARED_SYSTEM_MEM_CAPABILITIES_INTEL,
+         0}};
+
+    check(params);
+}

opencl/test/unit_test/xe2_hpg_core/lnl/linux/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+if(UNIX)
+  add_subdirectories()
+endif()

opencl/test/unit_test/xe2_hpg_core/lnl/linux/dll/CMakeLists.txt

@@ -0,0 +1,11 @@
+#
+# Copyright (C) 2024 Intel Corporation
+#
+# SPDX-License-Identifier: MIT
+#
+
+set(IGDRCL_SRCS_linux_dll_tests_xe2_hpg_core_lnl
+    ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
+    ${CMAKE_CURRENT_SOURCE_DIR}/device_id_tests_lnl.cpp
+)
+target_sources(igdrcl_linux_dll_tests PRIVATE ${IGDRCL_SRCS_linux_dll_tests_xe2_hpg_core_lnl})

opencl/test/unit_test/xe2_hpg_core/lnl/linux/dll/device_id_tests_lnl.cpp

@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/fixtures/linux/device_id_fixture.h"
+
+using namespace NEO;
+
+TEST_F(DeviceIdTests, GivenLnlSupportedDeviceIdThenDeviceDescriptorTableExists) {
+    std::array<DeviceDescriptor, 3> expectedDescriptors = {{
+        {0x6420, &LnlHwConfig::hwInfo, &LnlHwConfig::setupHardwareInfo},
+        {0x64A0, &LnlHwConfig::hwInfo, &LnlHwConfig::setupHardwareInfo},
+        {0x64B0, &LnlHwConfig::hwInfo, &LnlHwConfig::setupHardwareInfo},
+    }};
+
+    testImpl(expectedDescriptors);
+}

opencl/test/unit_test/xe2_hpg_core/lnl/test_cl_device_caps_lnl.cpp

@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds_lnl.h"
+#include "shared/source/xe2_hpg_core/hw_info_lnl.h"
+#include "shared/test/common/helpers/gtest_helpers.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+#include "opencl/test/unit_test/mocks/mock_cl_device.h"
+
+using namespace NEO;
+
+using LnlClDeviceIdTest = Test<ClDeviceFixture>;
+
+LNLTEST_F(LnlClDeviceIdTest, givenDeviceExtensionsWhenDeviceCapsInitializedThenAddProperExtensions) {
+    const auto &dInfo = pClDevice->getDeviceInfo();
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_create_buffer_with_properties")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_subgroup_local_block_io")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_subgroup_matrix_multiply_accumulate")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_khr_subgroup_named_barrier")));
+    EXPECT_TRUE(hasSubstr(dInfo.deviceExtensions, std::string("cl_intel_subgroup_extended_block_read")));
+}

opencl/test/unit_test/xe2_hpg_core/test_cl_device_caps_xe2_hpg_core.cpp

@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/helpers/basic_math.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/helpers/gtest_helpers.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+#include "opencl/test/unit_test/fixtures/device_info_fixture.h"
+
+using namespace NEO;
+
+using Xe2HpgCoreClDeviceCaps = Test<ClDeviceFixture>;
+
+XE2_HPG_CORETEST_F(Xe2HpgCoreClDeviceCaps, givenXe2HpgCoreWhenCheckExtensionsThenDeviceDoesNotReportClKhrSubgroupsExtension) {
+    const auto &caps = pClDevice->getDeviceInfo();
+
+    EXPECT_TRUE(hasSubstr(caps.deviceExtensions, std::string("cl_khr_subgroups")));
+    EXPECT_TRUE(hasSubstr(caps.deviceExtensions, std::string("cl_intel_bfloat16_conversions")));
+}
+
+XE2_HPG_CORETEST_F(Xe2HpgCoreClDeviceCaps, givenXe2HpgCoreWhenCheckingCapsThenDeviceDoesNotSupportIndependentForwardProgress) {
+    const auto &caps = pClDevice->getDeviceInfo();
+
+    EXPECT_TRUE(caps.independentForwardProgress);
+}
+
+XE2_HPG_CORETEST_F(Xe2HpgCoreClDeviceCaps, givenXe2HpgCoreWhenCalculatingMaxEuPerSSThenDontIgnoreEuCountPerPoolMin) {
+    HardwareInfo myHwInfo = *defaultHwInfo;
+    GT_SYSTEM_INFO &mySysInfo = myHwInfo.gtSystemInfo;
+    FeatureTable &mySkuTable = myHwInfo.featureTable;
+
+    mySysInfo.EUCount = 20;
+    mySysInfo.EuCountPerPoolMin = 99999;
+    mySkuTable.flags.ftrPooledEuEnabled = 1;
+
+    auto device = std::unique_ptr<Device>(MockDevice::createWithNewExecutionEnvironment<MockDevice>(&myHwInfo));
+
+    auto expectedMaxWGS = mySysInfo.EuCountPerPoolMin * (mySysInfo.ThreadCount / mySysInfo.EUCount) * 8;
+    expectedMaxWGS = std::min(Math::prevPowerOfTwo(expectedMaxWGS), 2048u);
+
+    EXPECT_EQ(expectedMaxWGS, device->getDeviceInfo().maxWorkGroupSize);
+}
+
+using QueueFamilyNameTestXe2HpgCore = QueueFamilyNameTest;
+
+XE2_HPG_CORETEST_F(QueueFamilyNameTestXe2HpgCore, givenCccsWhenGettingQueueFamilyNameThenReturnProperValue) {
+    verify(EngineGroupType::renderCompute, "cccs");
+}
+
+XE2_HPG_CORETEST_F(QueueFamilyNameTestXe2HpgCore, givenLinkedBcsWhenGettingQueueFamilyNameThenReturnProperValue) {
+    verify(EngineGroupType::linkedCopy, "linked bcs");
+}

opencl/test/unit_test/xe2_hpg_core/test_cmds_programming_xe2_hpg_core.cpp

@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_container/encode_surface_state.h"
+#include "shared/source/gmm_helper/client_context/gmm_client_context.h"
+#include "shared/source/gmm_helper/gmm_helper.h"
+#include "shared/source/helpers/state_base_address.h"
+#include "shared/source/memory_manager/allocation_properties.h"
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/helpers/debug_manager_state_restore.h"
+#include "shared/test/common/libult/ult_command_stream_receiver.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/source/mem_obj/buffer.h"
+#include "opencl/test/unit_test/fixtures/ult_command_stream_receiver_fixture.h"
+#include "opencl/test/unit_test/mocks/mock_cl_device.h"
+#include "opencl/test/unit_test/mocks/mock_context.h"
+
+#include "encode_surface_state_args.h"
+
+using namespace NEO;
+using CmdsProgrammingTestsXe2HpgCore = UltCommandStreamReceiverTest;
+
+XE2_HPG_CORETEST_F(CmdsProgrammingTestsXe2HpgCore, givenL3ToL1DebugFlagWhenStatelessMocsIsProgrammedThenItHasL1CachingOn) {
+    using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS;
+
+    DebugManagerStateRestore restore;
+    debugManager.flags.ForceL1Caching.set(1u);
+
+    auto &commandStreamReceiver = pDevice->getUltCommandStreamReceiver<FamilyType>();
+    flushTask(commandStreamReceiver);
+
+    HardwareParse hwParserCsr;
+    hwParserCsr.parseCommands<FamilyType>(commandStreamReceiver.commandStream, 0);
+    hwParserCsr.findHardwareCommands<FamilyType>();
+    ASSERT_NE(nullptr, hwParserCsr.cmdStateBaseAddress);
+
+    auto stateBaseAddress = static_cast<STATE_BASE_ADDRESS *>(hwParserCsr.cmdStateBaseAddress);
+
+    auto actualL1CachePolocy = static_cast<uint8_t>(stateBaseAddress->getL1CachePolicyL1CacheControl());
+
+    const uint8_t expectedL1CachePolicy = 0;
+    EXPECT_EQ(expectedL1CachePolicy, actualL1CachePolocy);
+}
+
+XE2_HPG_CORETEST_F(CmdsProgrammingTestsXe2HpgCore, whenAppendingRssThenProgramWtL1CachePolicy) {
+    auto memoryManager = pDevice->getExecutionEnvironment()->memoryManager.get();
+    size_t allocationSize = MemoryConstants::pageSize;
+    AllocationProperties properties(pDevice->getRootDeviceIndex(), allocationSize, AllocationType::buffer, pDevice->getDeviceBitfield());
+    auto allocation = memoryManager->allocateGraphicsMemoryWithProperties(properties);
+
+    auto rssCmd = FamilyType::cmdInitRenderSurfaceState;
+
+    MockContext context(pClDevice);
+    auto multiGraphicsAllocation = MultiGraphicsAllocation(pClDevice->getRootDeviceIndex());
+    multiGraphicsAllocation.addAllocation(allocation);
+
+    std::unique_ptr<BufferHw<FamilyType>> buffer(static_cast<BufferHw<FamilyType> *>(
+        BufferHw<FamilyType>::create(&context, {}, 0, 0, allocationSize, nullptr, nullptr, std::move(multiGraphicsAllocation), false, false, false)));
+
+    NEO::EncodeSurfaceStateArgs args;
+    args.outMemory = &rssCmd;
+    args.graphicsAddress = allocation->getGpuAddress();
+    args.size = allocation->getUnderlyingBufferSize();
+    args.mocs = buffer->getMocsValue(false, false, pClDevice->getRootDeviceIndex());
+    args.numAvailableDevices = pClDevice->getNumGenericSubDevices();
+    args.allocation = allocation;
+    args.gmmHelper = pClDevice->getGmmHelper();
+    args.areMultipleSubDevicesInContext = true;
+
+    EncodeSurfaceState<FamilyType>::encodeBuffer(args);
+
+    EXPECT_EQ(FamilyType::RENDER_SURFACE_STATE::L1_CACHE_POLICY_WBP, rssCmd.getL1CachePolicyL1CacheControl());
+}
+
+XE2_HPG_CORETEST_F(CmdsProgrammingTestsXe2HpgCore, givenAlignedCacheableReadOnlyBufferThenChoseOclBufferConstPolicy) {
+    MockContext context;
+    const auto size = MemoryConstants::pageSize;
+    const auto ptr = (void *)alignedMalloc(size * 2, MemoryConstants::pageSize);
+    const auto flags = CL_MEM_USE_HOST_PTR | CL_MEM_READ_ONLY;
+
+    auto retVal = CL_SUCCESS;
+    auto buffer = std::unique_ptr<Buffer>(Buffer::create(
+        &context,
+        flags,
+        size,
+        ptr,
+        retVal));
+    EXPECT_EQ(CL_SUCCESS, retVal);
+
+    typename FamilyType::RENDER_SURFACE_STATE surfaceState = {};
+    buffer->setArgStateful(&surfaceState, false, false, false, false, context.getDevice(0)->getDevice(), false);
+
+    const auto expectedMocs = context.getDevice(0)->getGmmHelper()->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
+    const auto actualMocs = surfaceState.getMemoryObjectControlState();
+    EXPECT_EQ(expectedMocs, actualMocs);
+
+    auto actualL1CachePolocy = static_cast<uint8_t>(surfaceState.getL1CachePolicyL1CacheControl());
+
+    const uint8_t expectedL1CachePolicy = 0;
+    EXPECT_EQ(expectedL1CachePolicy, actualL1CachePolocy);
+
+    alignedFree(ptr);
+}

opencl/test/unit_test/xe2_hpg_core/test_platform_caps_xe2_hpg_core.cpp

@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/source/platform/platform_info.h"
+#include "opencl/test/unit_test/fixtures/platform_fixture.h"
+
+using namespace NEO;
+
+struct Xe2HpgCorePlatformCaps : public PlatformFixture, public ::testing::Test {
+    void SetUp() override {
+        PlatformFixture::setUp();
+    }
+
+    void TearDown() override {
+        PlatformFixture::tearDown();
+    }
+};
+
+XE2_HPG_CORETEST_F(Xe2HpgCorePlatformCaps, givenXe2HpgCoreSkusThenItSupportFP64) {
+    const auto &caps = pPlatform->getPlatformInfo();
+
+    EXPECT_NE(std::string::npos, caps.extensions.find(std::string("cl_khr_fp64")));
+}

opencl/test/unit_test/xe2_hpg_core/test_preamble_xe2_hpg_core.cpp

@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/command_stream/stream_properties.h"
+#include "shared/source/helpers/gfx_core_helper.h"
+#include "shared/test/common/fixtures/preamble_fixture.h"
+
+using namespace NEO;
+
+using PreambleCfeState = PreambleFixture;
+XE2_HPG_CORETEST_F(PreambleCfeState, givenXe2HpgCoreAndConcurrentKernelExecutionTypeWhenCallingProgramVFEStateThenSingleSpliceDispatchCcsModeIsEnabled) {
+    using CFE_STATE = typename FamilyType::CFE_STATE;
+
+    auto pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, *defaultHwInfo, EngineGroupType::renderCompute);
+    StreamProperties streamProperties{};
+    streamProperties.initSupport(pDevice->getRootDeviceEnvironment());
+    streamProperties.frontEndState.setPropertiesAll(true, false, false, false);
+    PreambleHelper<FamilyType>::programVfeState(pVfeCmd, pDevice->getRootDeviceEnvironment(), 0u, 0, 0, streamProperties);
+    parseCommands<FamilyType>(linearStream);
+    auto cfeStateIt = find<CFE_STATE *>(cmdList.begin(), cmdList.end());
+    ASSERT_NE(cmdList.end(), cfeStateIt);
+    auto cfeState = reinterpret_cast<CFE_STATE *>(*cfeStateIt);
+    EXPECT_FALSE(cfeState->getComputeOverdispatchDisable());
+    EXPECT_FALSE(cfeState->getSingleSliceDispatchCcsMode());
+}
+
+XE2_HPG_CORETEST_F(PreambleCfeState, givenXe2HpgCoreAndDefaultKernelExecutionTypeWhenCallingProgramVFEStateThenSingleSpliceDispatchCcsModeIsDisabled) {
+    using CFE_STATE = typename FamilyType::CFE_STATE;
+
+    auto pVfeCmd = PreambleHelper<FamilyType>::getSpaceForVfeState(&linearStream, *defaultHwInfo, EngineGroupType::renderCompute);
+    StreamProperties streamProperties{};
+    streamProperties.initSupport(pDevice->getRootDeviceEnvironment());
+    streamProperties.frontEndState.setPropertiesAll(false, false, false, false);
+    PreambleHelper<FamilyType>::programVfeState(pVfeCmd, pDevice->getRootDeviceEnvironment(), 0u, 0, 0, streamProperties);
+    parseCommands<FamilyType>(linearStream);
+    auto cfeStateIt = find<CFE_STATE *>(cmdList.begin(), cmdList.end());
+    ASSERT_NE(cmdList.end(), cfeStateIt);
+    auto cfeState = reinterpret_cast<CFE_STATE *>(*cfeStateIt);
+    EXPECT_FALSE(cfeState->getComputeOverdispatchDisable());
+    EXPECT_FALSE(cfeState->getSingleSliceDispatchCcsMode());
+}

opencl/test/unit_test/xe2_hpg_core/test_preemption_xe2_hpg_core.cpp

@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/source/helpers/cl_preemption_helper.h"
+#include "opencl/test/unit_test/fixtures/cl_preemption_fixture.h"
+
+using Xe2HpgMidThreadPreemptionTests = DevicePreemptionTests;
+
+XE2_HPG_CORETEST_F(Xe2HpgMidThreadPreemptionTests, GivenValueArgSetWhenOverrideMidThreadPreemptionSupportThenPreemptionModeDisabled) {
+    device->setPreemptionMode(PreemptionMode::MidThread);
+    bool value = true;
+    ClPreemptionHelper::overrideMidThreadPreemptionSupport(*context.get(), value);
+    EXPECT_EQ(PreemptionMode::Disabled, device->getPreemptionMode());
+}
+
+XE2_HPG_CORETEST_F(Xe2HpgMidThreadPreemptionTests, GivenValueArgNotSetWhenOverrideMidThreadPreemptionSupportThenMidThreadPreemptionMode) {
+    device->setPreemptionMode(PreemptionMode::MidThread);
+    bool value = false;
+    ClPreemptionHelper::overrideMidThreadPreemptionSupport(*context.get(), value);
+    EXPECT_EQ(PreemptionMode::MidThread, device->getPreemptionMode());
+}
+
+XE2_HPG_CORETEST_F(Xe2HpgMidThreadPreemptionTests, GivenFlagForcePreemptionModeSetAsDisabledWhenOverrideMidThreadPreemptionSupportThenNothingChanged) {
+    device->setPreemptionMode(PreemptionMode::Disabled);
+    debugManager.flags.ForcePreemptionMode.set(PreemptionMode::Disabled);
+    bool value = true;
+    ClPreemptionHelper::overrideMidThreadPreemptionSupport(*context.get(), value);
+    EXPECT_EQ(PreemptionMode::Disabled, device->getPreemptionMode());
+    value = false;
+    ClPreemptionHelper::overrideMidThreadPreemptionSupport(*context.get(), value);
+    EXPECT_EQ(PreemptionMode::Disabled, device->getPreemptionMode());
+}

opencl/test/unit_test/xe2_hpg_core/test_sample_xe2_hpg_core.cpp

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2024 Intel Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ */
+
+#include "shared/source/xe2_hpg_core/hw_cmds.h"
+#include "shared/test/common/mocks/mock_device.h"
+#include "shared/test/common/test_macros/header/per_product_test_definitions.h"
+#include "shared/test/common/test_macros/test.h"
+
+#include "opencl/test/unit_test/fixtures/cl_device_fixture.h"
+
+using namespace NEO;
+
+using Xe2HpgCoreOnlyTest = Test<ClDeviceFixture>;
+
+XE2_HPG_CORETEST_F(Xe2HpgCoreOnlyTest, WhenGettingRenderCoreFamilyThenOnlyHpgCoreIsReturned) {
+    EXPECT_EQ(IGFX_XE2_HPG_CORE, pDevice->getRenderCoreFamily());
+}

shared/offline_compiler/source/CMakeLists.txt

@@ -62,6 +62,7 @@ set(CLOC_LIB_SRCS_LIB
     ${NEO_SHARED_DIRECTORY}/helpers/compiler_product_helper_bdw_and_later.inl
     ${NEO_SHARED_DIRECTORY}/helpers/compiler_product_helper_before_xe_hpc.inl
     ${NEO_SHARED_DIRECTORY}/helpers/compiler_product_helper_xe_hpc_and_later.inl
+    ${NEO_SHARED_DIRECTORY}/helpers/compiler_product_helper_xe2_hpg_and_later.inl
     ${NEO_SHARED_DIRECTORY}/helpers/compiler_options_parser.cpp
     ${NEO_SHARED_DIRECTORY}/helpers/compiler_options_parser.h
     ${NEO_SHARED_DIRECTORY}/helpers/cache_policy.h