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refactor: move csrBaseAddress cmdCast to separate file

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Related-To: NEO-10641
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
This commit is contained in:
Kamil Kopryk
2024-08-07 17:33:43 +00:00
committed by Compute-Runtime-Automation
parent 22a382b7a2
commit 8210997f17
9 changed files with 37 additions and 46 deletions
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3
shared/test/common/cmd_parse/CMakeLists.txt
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@@ -1,5 +1,5 @@
#
# Copyright (C) 2020-2022 Intel Corporation
# Copyright (C) 2020-2024 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@@ -12,6 +12,7 @@ target_sources(neo_libult_common PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_compute_mi_arb.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_compute_mode.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_compute_walker.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_csr_base_address.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_gpgpu_walker.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_l3_control.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmd_parse_mi_arb.inl

23
shared/test/common/cmd_parse/cmd_parse_csr_base_address.inl Normal file
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@@ -0,0 +1,23 @@
/*
* Copyright (C) 2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
// clang-format off
using namespace NEO;
using GPGPU_CSR_BASE_ADDRESS = GenStruct::GPGPU_CSR_BASE_ADDRESS;
// clang-format on
template <>
GPGPU_CSR_BASE_ADDRESS *genCmdCast<GPGPU_CSR_BASE_ADDRESS *>(void *buffer) {
auto pCmd = reinterpret_cast<GPGPU_CSR_BASE_ADDRESS *>(buffer);
return GPGPU_CSR_BASE_ADDRESS::COMMAND_TYPE_GFXPIPE == pCmd->TheStructure.Common.CommandType &&
GPGPU_CSR_BASE_ADDRESS::COMMAND_SUBTYPE_GFXPIPE_COMMON == pCmd->TheStructure.Common.CommandSubtype &&
GPGPU_CSR_BASE_ADDRESS::_3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED == pCmd->TheStructure.Common._3DCommandOpcode &&
GPGPU_CSR_BASE_ADDRESS::_3D_COMMAND_SUB_OPCODE_GPGPU_CSR_BASE_ADDRESS == pCmd->TheStructure.Common._3DCommandSubOpcode
? pCmd
: nullptr;
}

15
shared/test/common/cmd_parse/cmd_parse_pvc_and_later.inl
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2023 Intel Corporation
* Copyright (C) 2021-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -12,6 +12,7 @@
#include "shared/test/common/cmd_parse/cmd_parse_compute_mi_arb.inl"
#include "shared/test/common/cmd_parse/cmd_parse_compute_mode.inl"
#include "shared/test/common/cmd_parse/cmd_parse_compute_walker.inl"
#include "shared/test/common/cmd_parse/cmd_parse_sip.inl"
#include "shared/test/common/cmd_parse/hw_parse.h"
#include "shared/test/common/cmd_parse/hw_parse.inl"
@@ -19,18 +20,6 @@
using STATE_SIP = GenStruct::STATE_SIP;
template <>
STATE_SIP *genCmdCast<STATE_SIP *>(void *buffer) {
auto pCmd = reinterpret_cast<STATE_SIP *>(buffer);
return STATE_SIP::COMMAND_TYPE_GFXPIPE == pCmd->TheStructure.Common.CommandType &&
STATE_SIP::COMMAND_SUBTYPE_GFXPIPE_COMMON == pCmd->TheStructure.Common.CommandSubtype &&
STATE_SIP::_3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED == pCmd->TheStructure.Common._3DCommandOpcode &&
STATE_SIP::_3D_COMMAND_SUB_OPCODE_STATE_SIP == pCmd->TheStructure.Common._3DCommandSubOpcode
? pCmd
: nullptr;
}
template <>
XY_BLOCK_COPY_BLT *genCmdCast<XY_BLOCK_COPY_BLT *>(void *buffer) {
auto pCmd = reinterpret_cast<XY_BLOCK_COPY_BLT *>(buffer);

15
shared/test/common/cmd_parse/cmd_parse_sip.inl
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2018-2021 Intel Corporation
* Copyright (C) 2018-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -7,22 +7,9 @@
// clang-format off
using namespace NEO;
using GPGPU_CSR_BASE_ADDRESS = GenStruct::GPGPU_CSR_BASE_ADDRESS;
using STATE_SIP = GenStruct::STATE_SIP;
// clang-format on
template <>
GPGPU_CSR_BASE_ADDRESS *genCmdCast<GPGPU_CSR_BASE_ADDRESS *>(void *buffer) {
auto pCmd = reinterpret_cast<GPGPU_CSR_BASE_ADDRESS *>(buffer);
return GPGPU_CSR_BASE_ADDRESS::COMMAND_TYPE_GFXPIPE == pCmd->TheStructure.Common.CommandType &&
GPGPU_CSR_BASE_ADDRESS::COMMAND_SUBTYPE_GFXPIPE_COMMON == pCmd->TheStructure.Common.CommandSubtype &&
GPGPU_CSR_BASE_ADDRESS::_3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED == pCmd->TheStructure.Common._3DCommandOpcode &&
GPGPU_CSR_BASE_ADDRESS::_3D_COMMAND_SUB_OPCODE_GPGPU_CSR_BASE_ADDRESS == pCmd->TheStructure.Common._3DCommandSubOpcode
? pCmd
: nullptr;
}
template <>
STATE_SIP *genCmdCast<STATE_SIP *>(void *buffer) {
auto pCmd = reinterpret_cast<STATE_SIP *>(buffer);

15
shared/test/common/cmd_parse/cmd_parse_xehp_and_later.inl
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@@ -13,25 +13,12 @@
#include "shared/test/common/cmd_parse/cmd_parse_compute_mode.inl"
#include "shared/test/common/cmd_parse/cmd_parse_compute_walker.inl"
#include "shared/test/common/cmd_parse/cmd_parse_l3_control_xehp_and_later.inl"
#include "shared/test/common/cmd_parse/cmd_parse_sip.inl"
#include "shared/test/common/cmd_parse/hw_parse.h"
#include "shared/test/common/cmd_parse/hw_parse.inl"
#include "gtest/gtest.h"
using STATE_SIP = GenStruct::STATE_SIP;
template <>
STATE_SIP *genCmdCast<STATE_SIP *>(void *buffer) {
auto pCmd = reinterpret_cast<STATE_SIP *>(buffer);
return STATE_SIP::COMMAND_TYPE_GFXPIPE == pCmd->TheStructure.Common.CommandType &&
STATE_SIP::COMMAND_SUBTYPE_GFXPIPE_COMMON == pCmd->TheStructure.Common.CommandSubtype &&
STATE_SIP::_3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED == pCmd->TheStructure.Common._3DCommandOpcode &&
STATE_SIP::_3D_COMMAND_SUB_OPCODE_STATE_SIP == pCmd->TheStructure.Common._3DCommandSubOpcode
? pCmd
: nullptr;
}
template <>
size_t CmdParse<GenGfxFamily>::getCommandLengthHwSpecific(void *cmd) {
{

3
shared/test/common/gen11/cmd_parse_gen11.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
* Copyright (C) 2021-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -11,6 +11,7 @@ using GenGfxFamily = NEO::Gen11Family;
#include "shared/test/common/cmd_parse/cmd_parse_base.inl"
#include "shared/test/common/cmd_parse/cmd_parse_base_mi_arb.inl"
#include "shared/test/common/cmd_parse/cmd_parse_csr_base_address.inl"
#include "shared/test/common/cmd_parse/cmd_parse_gpgpu_walker.inl"
#include "shared/test/common/cmd_parse/cmd_parse_sip.inl"
#include "shared/test/common/cmd_parse/gen_cmd_parse.h"

3
shared/test/common/gen12lp/cmd_parse_gen12lp.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
* Copyright (C) 2021-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -11,6 +11,7 @@ using GenGfxFamily = NEO::Gen12LpFamily;
#include "shared/test/common/cmd_parse/cmd_parse_base.inl"
#include "shared/test/common/cmd_parse/cmd_parse_compute_mode.inl"
#include "shared/test/common/cmd_parse/cmd_parse_csr_base_address.inl"
#include "shared/test/common/cmd_parse/cmd_parse_gpgpu_walker.inl"
#include "shared/test/common/cmd_parse/cmd_parse_l3_control.inl"
#include "shared/test/common/cmd_parse/cmd_parse_mi_arb.inl"

3
shared/test/common/gen8/cmd_parse_gen8.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
* Copyright (C) 2021-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -11,6 +11,7 @@ using GenGfxFamily = NEO::Gen8Family;
#include "shared/test/common/cmd_parse/cmd_parse_base.inl"
#include "shared/test/common/cmd_parse/cmd_parse_base_mi_arb.inl"
#include "shared/test/common/cmd_parse/cmd_parse_csr_base_address.inl"
#include "shared/test/common/cmd_parse/cmd_parse_gpgpu_walker.inl"
#include "shared/test/common/cmd_parse/cmd_parse_sip.inl"
#include "shared/test/common/cmd_parse/gen_cmd_parse.h"

3
shared/test/common/gen9/cmd_parse_gen9.cpp
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2021-2022 Intel Corporation
* Copyright (C) 2021-2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -11,6 +11,7 @@ using GenGfxFamily = NEO::Gen9Family;
#include "shared/test/common/cmd_parse/cmd_parse_base.inl"
#include "shared/test/common/cmd_parse/cmd_parse_base_mi_arb.inl"
#include "shared/test/common/cmd_parse/cmd_parse_csr_base_address.inl"
#include "shared/test/common/cmd_parse/cmd_parse_gpgpu_walker.inl"
#include "shared/test/common/cmd_parse/cmd_parse_sip.inl"
#include "shared/test/common/cmd_parse/gen_cmd_parse.h"