Rename core family names to meet naming convention

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>

cmake/setup_platform_flags.cmake

@@ -48,7 +48,7 @@ endforeach()
 if(SUPPORT_GEN8)
   set(CORE_GEN8_REVISIONS 0)
   if(TESTS_GEN8)
-    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN8" "BDWFamily")
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN8" "Gen8Family")
   endif()
   if(SUPPORT_BDW)
     ADD_PRODUCT("SUPPORTED" "BDW" "IGFX_BROADWELL")
@@ -66,7 +66,7 @@ if(SUPPORT_GEN9)
   set(CORE_GEN9_REVISIONS 9)
   set(LP_GEN9_REVISIONS 0)
   if(TESTS_GEN9)
-    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN9" "SKLFamily")
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN9" "Gen9Family")
   endif()
   if(SUPPORT_SKL)
     ADD_PRODUCT("SUPPORTED" "SKL" "IGFX_SKYLAKE")
@@ -76,7 +76,7 @@ if(SUPPORT_GEN9)
     ADD_PLATFORM_FOR_CORE_TYPE("SUPPORTED_IMAGES" "GEN9" "SKL" "CORE")
     set(PREFERRED_PLATFORM "SKL")
     if(TESTS_SKL)
-      set(PREFERRED_FAMILY_NAME "SKLFamily")
+      set(PREFERRED_FAMILY_NAME "Gen9Family")
       ADD_ITEM_FOR_CORE_TYPE("PLATFORMS" "TESTED" "GEN9" "SKL")
       ADD_PRODUCT("TESTED" "SKL" "IGFX_SKYLAKE")
     endif()
@@ -133,7 +133,7 @@ if(SUPPORT_GEN11)
   set(CORE_GEN11_REVISIONS 0)
   set(LP_GEN11_REVISIONS 0)
   if(TESTS_GEN11)
-    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN11" "ICLFamily")
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN11" "Gen11Family")
   endif()
 
   if(SUPPORT_ICLLP)
@@ -172,7 +172,7 @@ endif()
 if(SUPPORT_GEN12LP)
   set(LP_GEN12LP_REVISIONS 0)
   if(TESTS_GEN12LP)
-    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN12LP" "TGLLPFamily")
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "GEN12LP" "Gen12LpFamily")
   endif()
   if(SUPPORT_TGLLP)
     ADD_PRODUCT("SUPPORTED" "TGLLP" "IGFX_TIGERLAKE_LP")
@@ -267,7 +267,7 @@ endif()
 if(SUPPORT_XE_HPG_CORE)
   set(CORE_XE_HPG_CORE_REVISIONS 0)
   if(TESTS_XE_HPG_CORE)
-    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "XE_HPG_CORE" "XE_HPG_COREFamily")
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "XE_HPG_CORE" "XeHpgCoreFamily")
   endif()
   if(SUPPORT_DG2)
     set(DG2_XE_HPG_CORE_REVISIONS 0)
@@ -285,7 +285,7 @@ endif()
 if(SUPPORT_XE_HPC_CORE)
   set(XE_HPC_CORE_TEST_KERNELS_BLOCKLIST "CopyBuffer_simd8.cl")
   if(TESTS_XE_HPC_CORE)
-    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "XE_HPC_CORE" "XE_HPC_COREFamily")
+    ADD_ITEM_FOR_CORE_TYPE("FAMILY_NAME" "TESTED" "XE_HPC_CORE" "XeHpcCoreFamily")
   endif()
 
   if(SUPPORT_PVC)

level_zero/core/source/gen11/enable_family_full_l0_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2021 Intel Corporation
+ * Copyright (C) 2020-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-using Family = ICLFamily;
+using Family = Gen11Family;
 
 struct EnableL0Gen11 {
     EnableL0Gen11() {

level_zero/core/source/gen11/l0_hw_helper_gen11.cpp

@@ -13,7 +13,7 @@
 
 namespace L0 {
 
-using Family = NEO::ICLFamily;
+using Family = NEO::Gen11Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 template <>

level_zero/core/source/gen12lp/enable_family_full_l0_gen12lp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2021 Intel Corporation
+ * Copyright (C) 2020-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-using Family = TGLLPFamily;
+using Family = Gen12LpFamily;
 
 struct EnableL0Gen12LP {
     EnableL0Gen12LP() {

level_zero/core/source/gen12lp/l0_hw_helper_gen12lp.cpp

@@ -14,7 +14,7 @@
 
 namespace L0 {
 
-using Family = NEO::TGLLPFamily;
+using Family = NEO::Gen12LpFamily;
 static auto gfxCore = IGFX_GEN12LP_CORE;
 
 template <>

level_zero/core/source/gen8/enable_family_full_l0_gen8.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2021 Intel Corporation
+ * Copyright (C) 2020-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -9,7 +9,7 @@
 
 namespace NEO {
 
-using Family = BDWFamily;
+using Family = Gen8Family;
 
 struct EnableL0Gen8 {
     EnableL0Gen8() {

level_zero/core/source/gen9/enable_family_full_l0_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2021 Intel Corporation
+ * Copyright (C) 2020-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-using Family = SKLFamily;
+using Family = Gen9Family;
 
 struct EnableL0Gen9 {
     EnableL0Gen9() {

level_zero/core/source/gen9/l0_hw_helper_gen9.cpp

@@ -13,7 +13,7 @@
 
 namespace L0 {
 
-using Family = NEO::SKLFamily;
+using Family = NEO::Gen9Family;
 static auto gfxCore = IGFX_GEN9_CORE;
 
 template <>

level_zero/core/source/xe_hpc_core/enable_family_full_l0_xe_hpc_core.cpp

@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 
 struct EnableL0XeHpcCore {
     EnableL0XeHpcCore() {

level_zero/core/source/xe_hpc_core/l0_hw_helper_xe_hpc_core.cpp

@@ -13,7 +13,7 @@
 
 namespace L0 {
 
-using Family = NEO::XE_HPC_COREFamily;
+using Family = NEO::XeHpcCoreFamily;
 static auto gfxCore = IGFX_XE_HPC_CORE;
 
 template <>

level_zero/core/source/xe_hpg_core/enable_family_full_l0_xe_hpg_core.cpp

@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-using Family = XE_HPG_COREFamily;
+using Family = XeHpgCoreFamily;
 
 struct EnableL0XeHpgCore {
     EnableL0XeHpgCore() {

level_zero/core/source/xe_hpg_core/l0_hw_helper_xe_hpg_core.cpp

@@ -13,7 +13,7 @@
 
 namespace L0 {
 
-using Family = NEO::XE_HPG_COREFamily;
+using Family = NEO::XeHpgCoreFamily;
 static auto gfxCore = IGFX_XE_HPG_CORE;
 
 template <>

level_zero/core/test/unit_tests/gen11/enable_l0_mocks_gen11.cpp

@@ -9,8 +9,8 @@
 
 namespace NEO {
 
-struct ICLFamily;
-using GfxFamily = ICLFamily;
+struct Gen11Family;
+using GfxFamily = Gen11Family;
 } // namespace NEO
 
 namespace L0 {

level_zero/core/test/unit_tests/gen12lp/enable_l0_mocks_gen12lp.cpp

@@ -9,8 +9,8 @@
 
 namespace NEO {
 
-struct TGLLPFamily;
-using GfxFamily = TGLLPFamily;
+struct Gen12LpFamily;
+using GfxFamily = Gen12LpFamily;
 
 } // namespace NEO
 

level_zero/core/test/unit_tests/gen9/enable_l0_mocks_gen9.cpp

@@ -8,8 +8,8 @@
 #include "shared/test/unit_test/mocks/mock_l0_debugger.h"
 
 namespace NEO {
-struct SKLFamily;
-using GfxFamily = SKLFamily;
+struct Gen9Family;
+using GfxFamily = Gen9Family;
 } // namespace NEO
 
 namespace L0 {

level_zero/core/test/unit_tests/xe_hpc_core/enable_l0_mocks_xe_hpc_core.cpp

@@ -8,8 +8,8 @@
 #include "shared/test/unit_test/mocks/mock_l0_debugger.h"
 
 namespace NEO {
-struct XE_HPC_COREFamily;
-using GfxFamily = XE_HPC_COREFamily;
+struct XeHpcCoreFamily;
+using GfxFamily = XeHpcCoreFamily;
 } // namespace NEO
 
 namespace L0 {

level_zero/core/test/unit_tests/xe_hpc_core/xe_hpc_core_test_l0_fixtures.cpp

@@ -29,7 +29,7 @@ void DeviceFixtureXeHpcTests::checkIfCallingGetMemoryPropertiesWithNonNullPtrThe
 }
 
 void CommandListStatePrefetchXeHpcCore::checkIfDebugFlagSetWhenPrefetchApiCalledAThenStatePrefetchProgrammed(HardwareInfo *hwInfo) {
-    using STATE_PREFETCH = typename XE_HPC_COREFamily::STATE_PREFETCH;
+    using STATE_PREFETCH = typename XeHpcCoreFamily::STATE_PREFETCH;
     DebugManagerStateRestore restore;
     auto pCommandList = std::make_unique<WhiteBox<::L0::CommandListCoreFamily<IGFX_XE_HPC_CORE>>>();
     auto result = pCommandList->initialize(device, NEO::EngineGroupType::Compute, 0u);
@@ -76,8 +76,8 @@ void CommandListStatePrefetchXeHpcCore::checkIfDebugFlagSetWhenPrefetchApiCalled
 }
 
 void CommandListStatePrefetchXeHpcCore::checkIfCommandBufferIsExhaustedWhenPrefetchApiCalledThenStatePrefetchProgrammed(HardwareInfo *hwInfo) {
-    using STATE_PREFETCH = typename XE_HPC_COREFamily::STATE_PREFETCH;
-    using MI_BATCH_BUFFER_END = typename XE_HPC_COREFamily::MI_BATCH_BUFFER_END;
+    using STATE_PREFETCH = typename XeHpcCoreFamily::STATE_PREFETCH;
+    using MI_BATCH_BUFFER_END = typename XeHpcCoreFamily::MI_BATCH_BUFFER_END;
 
     DebugManagerStateRestore restore;
 

level_zero/core/test/unit_tests/xe_hpg_core/dg2/test_sampler_dg2.cpp

@@ -18,7 +18,7 @@ namespace ult {
 using SamplerCreateTest = Test<DeviceFixture>;
 
 HWTEST2_F(SamplerCreateTest, givenDg2WhenInitializeSamplerAndForceSamplerLowFilteringPrecisionIsFalseThenLowQualityFilterIsDisabled, IsDG2) {
-    using SAMPLER_STATE = typename NEO::XE_HPG_COREFamily::SAMPLER_STATE;
+    using SAMPLER_STATE = typename NEO::XeHpgCoreFamily::SAMPLER_STATE;
     EXPECT_FALSE(DebugManager.flags.ForceSamplerLowFilteringPrecision.get());
     ze_sampler_address_mode_t addressMode = ZE_SAMPLER_ADDRESS_MODE_REPEAT;
     ze_sampler_filter_mode_t filterMode = ZE_SAMPLER_FILTER_MODE_NEAREST;
@@ -38,7 +38,7 @@ HWTEST2_F(SamplerCreateTest, givenDg2WhenInitializeSamplerAndForceSamplerLowFilt
 }
 
 HWTEST2_F(SamplerCreateTest, givenDg2WhenInitializeSamplerAndForceSamplerLowFilteringPrecisionIsTrueThenLowQualityFilterIsEnabled, IsDG2) {
-    using SAMPLER_STATE = typename NEO::XE_HPG_COREFamily::SAMPLER_STATE;
+    using SAMPLER_STATE = typename NEO::XeHpgCoreFamily::SAMPLER_STATE;
     DebugManagerStateRestore dbgRestore;
     DebugManager.flags.ForceSamplerLowFilteringPrecision.set(true);
     EXPECT_TRUE(DebugManager.flags.ForceSamplerLowFilteringPrecision.get());

level_zero/core/test/unit_tests/xe_hpg_core/enable_l0_mocks_xe_hpg_core.cpp

@@ -8,8 +8,8 @@
 #include "shared/test/unit_test/mocks/mock_l0_debugger.h"
 
 namespace NEO {
-struct XE_HPG_COREFamily;
-using GfxFamily = XE_HPG_COREFamily;
+struct XeHpgCoreFamily;
+using GfxFamily = XeHpgCoreFamily;
 } // namespace NEO
 
 namespace L0 {

opencl/source/gen11/buffer_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 #include "opencl/source/mem_obj/buffer_factory_init.inl"

opencl/source/gen11/cl_hw_helper_gen11.cpp

@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = ICLFamily;
+using Family = Gen11Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 template <>

opencl/source/gen11/command_queue_gen11.cpp

@@ -15,7 +15,7 @@
 
 namespace NEO {
 
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 template class CommandQueueHw<Family>;

opencl/source/gen11/enable_family_full_ocl_gen11.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = ICLFamily;
+using Family = Gen11Family;
 
 struct EnableOCLGen11 {
     EnableOCLGen11() {

opencl/source/gen11/gpgpu_walker_gen11.cpp

@@ -13,10 +13,10 @@
 
 namespace NEO {
 
-template class HardwareInterface<ICLFamily>;
+template class HardwareInterface<Gen11Family>;
 
-template class GpgpuWalkerHelper<ICLFamily>;
+template class GpgpuWalkerHelper<Gen11Family>;
 
-template struct EnqueueOperation<ICLFamily>;
+template struct EnqueueOperation<Gen11Family>;
 
 } // namespace NEO

opencl/source/gen11/gtpin_setup_gen11.cpp

@@ -17,7 +17,7 @@ namespace NEO {
 
 extern GTPinHwHelper *gtpinHwHelperFactory[IGFX_MAX_CORE];
 
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 static const auto gfxFamily = IGFX_GEN11_CORE;
 
 template <>

opencl/source/gen11/hardware_commands_helper_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -13,7 +13,7 @@
 #include "opencl/source/helpers/hardware_commands_helper_bdw_and_later.inl"
 
 namespace NEO {
-using FamilyType = ICLFamily;
+using FamilyType = Gen11Family;
 
 template struct HardwareCommandsHelper<FamilyType>;
 } // namespace NEO

opencl/source/gen11/image_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = ICLFamily;
+using Family = Gen11Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 template <>

opencl/source/gen11/sampler_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 #include "opencl/source/sampler/sampler_factory_init.inl"

opencl/source/gen12lp/buffer_gen12lp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2020 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-typedef TGLLPFamily Family;
+typedef Gen12LpFamily Family;
 static auto gfxCore = IGFX_GEN12LP_CORE;
 
 #include "opencl/source/mem_obj/buffer_factory_init.inl"

opencl/source/gen12lp/cl_hw_helper_gen12lp.cpp

@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = TGLLPFamily;
+using Family = Gen12LpFamily;
 static auto gfxCore = IGFX_GEN12LP_CORE;
 
 template <>

opencl/source/gen12lp/command_queue_gen12lp.cpp

@@ -15,7 +15,7 @@
 
 namespace NEO {
 
-typedef TGLLPFamily Family;
+typedef Gen12LpFamily Family;
 static auto gfxCore = IGFX_GEN12LP_CORE;
 
 template <>

opencl/source/gen12lp/enable_family_full_ocl_gen12lp.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = TGLLPFamily;
+using Family = Gen12LpFamily;
 
 struct EnableOCLGen12LP {
     EnableOCLGen12LP() {

opencl/source/gen12lp/gpgpu_walker_gen12lp.cpp

@@ -13,47 +13,47 @@
 namespace NEO {
 
 template <>
-void GpgpuWalkerHelper<TGLLPFamily>::adjustMiStoreRegMemMode(MI_STORE_REG_MEM<TGLLPFamily> *storeCmd) {
+void GpgpuWalkerHelper<Gen12LpFamily>::adjustMiStoreRegMemMode(MI_STORE_REG_MEM<Gen12LpFamily> *storeCmd) {
     storeCmd->setMmioRemapEnable(true);
 }
 
 template <>
-void HardwareInterface<TGLLPFamily>::dispatchWorkarounds(
+void HardwareInterface<Gen12LpFamily>::dispatchWorkarounds(
     LinearStream *commandStream,
     CommandQueue &commandQueue,
     Kernel &kernel,
     const bool &enable) {
 
-    using MI_LOAD_REGISTER_IMM = typename TGLLPFamily::MI_LOAD_REGISTER_IMM;
-    using PIPE_CONTROL = typename TGLLPFamily::PIPE_CONTROL;
+    using MI_LOAD_REGISTER_IMM = typename Gen12LpFamily::MI_LOAD_REGISTER_IMM;
+    using PIPE_CONTROL = typename Gen12LpFamily::PIPE_CONTROL;
 
     if (kernel.requiresWaDisableRccRhwoOptimization()) {
 
-        PIPE_CONTROL cmdPipeControl = TGLLPFamily::cmdInitPipeControl;
+        PIPE_CONTROL cmdPipeControl = Gen12LpFamily::cmdInitPipeControl;
         cmdPipeControl.setCommandStreamerStallEnable(true);
         auto pCmdPipeControl = commandStream->getSpaceForCmd<PIPE_CONTROL>();
         *pCmdPipeControl = cmdPipeControl;
 
         uint32_t value = enable ? 0x40004000 : 0x40000000;
-        NEO::LriHelper<TGLLPFamily>::program(commandStream,
-                                             0x7010,
-                                             value,
-                                             false);
+        NEO::LriHelper<Gen12LpFamily>::program(commandStream,
+                                               0x7010,
+                                               value,
+                                               false);
     }
 }
 
 template <>
-size_t GpgpuWalkerHelper<TGLLPFamily>::getSizeForWaDisableRccRhwoOptimization(const Kernel *pKernel) {
+size_t GpgpuWalkerHelper<Gen12LpFamily>::getSizeForWaDisableRccRhwoOptimization(const Kernel *pKernel) {
     if (pKernel->requiresWaDisableRccRhwoOptimization()) {
-        return (2 * (sizeof(TGLLPFamily::PIPE_CONTROL) + sizeof(TGLLPFamily::MI_LOAD_REGISTER_IMM)));
+        return (2 * (sizeof(Gen12LpFamily::PIPE_CONTROL) + sizeof(Gen12LpFamily::MI_LOAD_REGISTER_IMM)));
     }
     return 0u;
 }
 
-template class HardwareInterface<TGLLPFamily>;
+template class HardwareInterface<Gen12LpFamily>;
 
-template class GpgpuWalkerHelper<TGLLPFamily>;
+template class GpgpuWalkerHelper<Gen12LpFamily>;
 
-template struct EnqueueOperation<TGLLPFamily>;
+template struct EnqueueOperation<Gen12LpFamily>;
 
 } // namespace NEO

opencl/source/gen12lp/gtpin_setup_gen12lp.cpp

@@ -17,7 +17,7 @@ namespace NEO {
 
 extern GTPinHwHelper *gtpinHwHelperFactory[IGFX_MAX_CORE];
 
-typedef TGLLPFamily Family;
+typedef Gen12LpFamily Family;
 static const auto gfxFamily = IGFX_GEN12LP_CORE;
 
 template <>

opencl/source/gen12lp/hardware_commands_helper_gen12lp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -15,7 +15,7 @@
 #include "opencl/source/helpers/hardware_commands_helper_bdw_and_later.inl"
 
 namespace NEO {
-using FamilyType = TGLLPFamily;
+using FamilyType = Gen12LpFamily;
 
 template <>
 size_t HardwareCommandsHelper<FamilyType>::getSizeRequiredCS() {

opencl/source/gen12lp/image_gen12lp.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-using Family = TGLLPFamily;
+using Family = Gen12LpFamily;
 static auto gfxCore = IGFX_GEN12LP_CORE;
 } // namespace NEO
 #include "opencl/source/mem_obj/image_tgllp_and_later.inl"

opencl/source/gen12lp/sampler_gen12lp.cpp

@@ -1,11 +1,11 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
  */
 
 #include "shared/source/gen12lp/hw_cmds_base.h"
-using Family = NEO::TGLLPFamily;
+using Family = NEO::Gen12LpFamily;
 constexpr static auto gfxCore = IGFX_GEN12LP_CORE;
 #include "opencl/source/sampler/sampler_tgllp_and_later.inl"

opencl/source/gen8/buffer_gen8.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-typedef BDWFamily Family;
+typedef Gen8Family Family;
 static auto gfxCore = IGFX_GEN8_CORE;
 
 #include "opencl/source/mem_obj/buffer_factory_init.inl"

opencl/source/gen8/cl_hw_helper_gen8.cpp

@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = BDWFamily;
+using Family = Gen8Family;
 static auto gfxCore = IGFX_GEN8_CORE;
 
 template <>

opencl/source/gen8/command_queue_gen8.cpp

@@ -15,7 +15,7 @@
 
 namespace NEO {
 
-typedef BDWFamily Family;
+typedef Gen8Family Family;
 static auto gfxCore = IGFX_GEN8_CORE;
 
 template class CommandQueueHw<Family>;

opencl/source/gen8/enable_family_full_ocl_gen8.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = BDWFamily;
+using Family = Gen8Family;
 
 struct EnableOCLGen8 {
     EnableOCLGen8() {

opencl/source/gen8/gpgpu_walker_gen8.cpp

@@ -14,33 +14,33 @@
 namespace NEO {
 
 template <>
-void GpgpuWalkerHelper<BDWFamily>::applyWADisableLSQCROPERFforOCL(NEO::LinearStream *pCommandStream, const Kernel &kernel, bool disablePerfMode) {
+void GpgpuWalkerHelper<Gen8Family>::applyWADisableLSQCROPERFforOCL(NEO::LinearStream *pCommandStream, const Kernel &kernel, bool disablePerfMode) {
     if (disablePerfMode) {
         if (kernel.getKernelInfo().kernelDescriptor.kernelAttributes.flags.usesFencesForReadWriteImages) {
             // Set bit L3SQC_BIT_LQSC_RO_PERF_DIS in L3SQC_REG4
-            GpgpuWalkerHelper<BDWFamily>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_OR, L3SQC_BIT_LQSC_RO_PERF_DIS);
+            GpgpuWalkerHelper<Gen8Family>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_OR, L3SQC_BIT_LQSC_RO_PERF_DIS);
         }
     } else {
         if (kernel.getKernelInfo().kernelDescriptor.kernelAttributes.flags.usesFencesForReadWriteImages) {
             // Add PIPE_CONTROL with CS_Stall to wait till GPU finishes its work
-            typedef typename BDWFamily::PIPE_CONTROL PIPE_CONTROL;
+            typedef typename Gen8Family::PIPE_CONTROL PIPE_CONTROL;
             auto pipeControlSpace = reinterpret_cast<PIPE_CONTROL *>(pCommandStream->getSpace(sizeof(PIPE_CONTROL)));
-            auto pipeControl = BDWFamily::cmdInitPipeControl;
+            auto pipeControl = Gen8Family::cmdInitPipeControl;
             pipeControl.setCommandStreamerStallEnable(true);
             *pipeControlSpace = pipeControl;
             // Clear bit L3SQC_BIT_LQSC_RO_PERF_DIS in L3SQC_REG4
-            GpgpuWalkerHelper<BDWFamily>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_AND, ~L3SQC_BIT_LQSC_RO_PERF_DIS);
+            GpgpuWalkerHelper<Gen8Family>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_AND, ~L3SQC_BIT_LQSC_RO_PERF_DIS);
         }
     }
 }
 
 template <>
-size_t GpgpuWalkerHelper<BDWFamily>::getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel) {
-    typedef typename BDWFamily::MI_LOAD_REGISTER_REG MI_LOAD_REGISTER_REG;
-    typedef typename BDWFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
-    typedef typename BDWFamily::PIPE_CONTROL PIPE_CONTROL;
-    typedef typename BDWFamily::MI_MATH MI_MATH;
-    typedef typename BDWFamily::MI_MATH_ALU_INST_INLINE MI_MATH_ALU_INST_INLINE;
+size_t GpgpuWalkerHelper<Gen8Family>::getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel) {
+    typedef typename Gen8Family::MI_LOAD_REGISTER_REG MI_LOAD_REGISTER_REG;
+    typedef typename Gen8Family::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
+    typedef typename Gen8Family::PIPE_CONTROL PIPE_CONTROL;
+    typedef typename Gen8Family::MI_MATH MI_MATH;
+    typedef typename Gen8Family::MI_MATH_ALU_INST_INLINE MI_MATH_ALU_INST_INLINE;
     size_t n = 0;
     if (pKernel->getKernelInfo().kernelDescriptor.kernelAttributes.flags.usesFencesForReadWriteImages) {
         n += sizeof(PIPE_CONTROL) +
@@ -54,10 +54,10 @@ size_t GpgpuWalkerHelper<BDWFamily>::getSizeForWADisableLSQCROPERFforOCL(const K
     return n;
 }
 
-template class HardwareInterface<BDWFamily>;
+template class HardwareInterface<Gen8Family>;
 
-template class GpgpuWalkerHelper<BDWFamily>;
+template class GpgpuWalkerHelper<Gen8Family>;
 
-template struct EnqueueOperation<BDWFamily>;
+template struct EnqueueOperation<Gen8Family>;
 
 } // namespace NEO

opencl/source/gen8/gtpin_setup_gen8.cpp

@@ -17,7 +17,7 @@ namespace NEO {
 
 extern GTPinHwHelper *gtpinHwHelperFactory[IGFX_MAX_CORE];
 
-typedef BDWFamily Family;
+typedef Gen8Family Family;
 static const auto gfxFamily = IGFX_GEN8_CORE;
 
 template <>

opencl/source/gen8/hardware_commands_helper_gen8.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 #include "opencl/source/helpers/hardware_commands_helper_bdw_and_later.inl"
 
 namespace NEO {
-using FamilyType = BDWFamily;
+using FamilyType = Gen8Family;
 
 template struct HardwareCommandsHelper<FamilyType>;
 } // namespace NEO

opencl/source/gen8/image_gen8.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = BDWFamily;
+using Family = Gen8Family;
 static auto gfxCore = IGFX_GEN8_CORE;
 
 template <>

opencl/source/gen8/sampler_gen8.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-typedef BDWFamily Family;
+typedef Gen8Family Family;
 static auto gfxCore = IGFX_GEN8_CORE;
 
 #include "opencl/source/sampler/sampler_factory_init.inl"

opencl/source/gen9/buffer_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-typedef SKLFamily Family;
+typedef Gen9Family Family;
 static auto gfxCore = IGFX_GEN9_CORE;
 
 #include "opencl/source/mem_obj/buffer_factory_init.inl"

opencl/source/gen9/cl_hw_helper_gen9.cpp

@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = SKLFamily;
+using Family = Gen9Family;
 static auto gfxCore = IGFX_GEN9_CORE;
 
 template <>

opencl/source/gen9/command_queue_gen9.cpp

@@ -15,7 +15,7 @@
 
 namespace NEO {
 
-typedef SKLFamily Family;
+typedef Gen9Family Family;
 static auto gfxCore = IGFX_GEN9_CORE;
 
 template class CommandQueueHw<Family>;

opencl/source/gen9/enable_family_full_ocl_gen9.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = SKLFamily;
+using Family = Gen9Family;
 
 struct EnableOCLGen9 {
     EnableOCLGen9() {

opencl/source/gen9/gpgpu_walker_gen9.cpp

@@ -13,34 +13,34 @@
 namespace NEO {
 
 template <>
-void GpgpuWalkerHelper<SKLFamily>::applyWADisableLSQCROPERFforOCL(NEO::LinearStream *pCommandStream, const Kernel &kernel, bool disablePerfMode) {
+void GpgpuWalkerHelper<Gen9Family>::applyWADisableLSQCROPERFforOCL(NEO::LinearStream *pCommandStream, const Kernel &kernel, bool disablePerfMode) {
     if (disablePerfMode) {
         if (kernel.getKernelInfo().kernelDescriptor.kernelAttributes.flags.usesFencesForReadWriteImages) {
             // Set bit L3SQC_BIT_LQSC_RO_PERF_DIS in L3SQC_REG4
-            GpgpuWalkerHelper<SKLFamily>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_OR, L3SQC_BIT_LQSC_RO_PERF_DIS);
+            GpgpuWalkerHelper<Gen9Family>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_OR, L3SQC_BIT_LQSC_RO_PERF_DIS);
         }
     } else {
         if (kernel.getKernelInfo().kernelDescriptor.kernelAttributes.flags.usesFencesForReadWriteImages) {
             // Add PIPE_CONTROL with CS_Stall to wait till GPU finishes its work
-            typedef typename SKLFamily::PIPE_CONTROL PIPE_CONTROL;
+            typedef typename Gen9Family::PIPE_CONTROL PIPE_CONTROL;
             auto pipeControlSpace = reinterpret_cast<PIPE_CONTROL *>(pCommandStream->getSpace(sizeof(PIPE_CONTROL)));
-            auto pipeControl = SKLFamily::cmdInitPipeControl;
+            auto pipeControl = Gen9Family::cmdInitPipeControl;
             pipeControl.setCommandStreamerStallEnable(true);
             *pipeControlSpace = pipeControl;
 
             // Clear bit L3SQC_BIT_LQSC_RO_PERF_DIS in L3SQC_REG4
-            GpgpuWalkerHelper<SKLFamily>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_AND, ~L3SQC_BIT_LQSC_RO_PERF_DIS);
+            GpgpuWalkerHelper<Gen9Family>::addAluReadModifyWriteRegister(pCommandStream, L3SQC_REG4, AluRegisters::OPCODE_AND, ~L3SQC_BIT_LQSC_RO_PERF_DIS);
         }
     }
 }
 
 template <>
-size_t GpgpuWalkerHelper<SKLFamily>::getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel) {
-    typedef typename SKLFamily::MI_LOAD_REGISTER_REG MI_LOAD_REGISTER_REG;
-    typedef typename SKLFamily::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
-    typedef typename SKLFamily::PIPE_CONTROL PIPE_CONTROL;
-    typedef typename SKLFamily::MI_MATH MI_MATH;
-    typedef typename SKLFamily::MI_MATH_ALU_INST_INLINE MI_MATH_ALU_INST_INLINE;
+size_t GpgpuWalkerHelper<Gen9Family>::getSizeForWADisableLSQCROPERFforOCL(const Kernel *pKernel) {
+    typedef typename Gen9Family::MI_LOAD_REGISTER_REG MI_LOAD_REGISTER_REG;
+    typedef typename Gen9Family::MI_LOAD_REGISTER_IMM MI_LOAD_REGISTER_IMM;
+    typedef typename Gen9Family::PIPE_CONTROL PIPE_CONTROL;
+    typedef typename Gen9Family::MI_MATH MI_MATH;
+    typedef typename Gen9Family::MI_MATH_ALU_INST_INLINE MI_MATH_ALU_INST_INLINE;
     size_t n = 0;
     if (pKernel->getKernelInfo().kernelDescriptor.kernelAttributes.flags.usesFencesForReadWriteImages) {
         n += sizeof(PIPE_CONTROL) +
@@ -54,10 +54,10 @@ size_t GpgpuWalkerHelper<SKLFamily>::getSizeForWADisableLSQCROPERFforOCL(const K
     return n;
 }
 
-template class HardwareInterface<SKLFamily>;
+template class HardwareInterface<Gen9Family>;
 
-template class GpgpuWalkerHelper<SKLFamily>;
+template class GpgpuWalkerHelper<Gen9Family>;
 
-template struct EnqueueOperation<SKLFamily>;
+template struct EnqueueOperation<Gen9Family>;
 
 } // namespace NEO

opencl/source/gen9/gtpin_setup_gen9.cpp

@@ -17,7 +17,7 @@ namespace NEO {
 
 extern GTPinHwHelper *gtpinHwHelperFactory[IGFX_MAX_CORE];
 
-typedef SKLFamily Family;
+typedef Gen9Family Family;
 static const auto gfxFamily = IGFX_GEN9_CORE;
 
 template <>

opencl/source/gen9/hardware_commands_helper_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -14,7 +14,7 @@
 #include <cstdint>
 
 namespace NEO {
-using FamilyType = SKLFamily;
+using FamilyType = Gen9Family;
 
 template struct HardwareCommandsHelper<FamilyType>;
 } // namespace NEO

opencl/source/gen9/image_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-using Family = SKLFamily;
+using Family = Gen9Family;
 static auto gfxCore = IGFX_GEN9_CORE;
 } // namespace NEO
 

opencl/source/gen9/sampler_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-typedef SKLFamily Family;
+typedef Gen9Family Family;
 static auto gfxCore = IGFX_GEN9_CORE;
 
 #include "opencl/source/sampler/sampler_factory_init.inl"

opencl/source/xe_hpc_core/buffer_xe_hpc_core.cpp

@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 static auto gfxCore = IGFX_XE_HPC_CORE;
 
 template class BufferHw<Family>;

opencl/source/xe_hpc_core/cl_hw_helper_xe_hpc_core.cpp

@@ -13,7 +13,7 @@
 
 namespace NEO {
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 static auto gfxCore = IGFX_XE_HPC_CORE;
 
 #include "opencl/source/helpers/cl_hw_helper_pvc_and_later.inl"

opencl/source/xe_hpc_core/command_queue_xe_hpc_core.cpp

@@ -14,7 +14,7 @@
 
 namespace NEO {
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 static auto gfxCore = IGFX_XE_HPC_CORE;
 } // namespace NEO
 

opencl/source/xe_hpc_core/enable_family_full_ocl_xe_hpc_core.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 
 struct EnableOCLXeHpcCore {
     EnableOCLXeHpcCore() {

opencl/source/xe_hpc_core/gpgpu_walker_xe_hpc_core.cpp

@@ -12,10 +12,10 @@
 
 namespace NEO {
 
-template class GpgpuWalkerHelper<XE_HPC_COREFamily>;
+template class GpgpuWalkerHelper<XeHpcCoreFamily>;
 
-template class HardwareInterface<XE_HPC_COREFamily>;
+template class HardwareInterface<XeHpcCoreFamily>;
 
-template struct EnqueueOperation<XE_HPC_COREFamily>;
+template struct EnqueueOperation<XeHpcCoreFamily>;
 
 } // namespace NEO

opencl/source/xe_hpc_core/gtpin_setup_xe_hpc_core.cpp

@@ -16,7 +16,7 @@ namespace NEO {
 
 extern GTPinHwHelper *gtpinHwHelperFactory[IGFX_MAX_CORE];
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 static const auto gfxFamily = IGFX_XE_HPC_CORE;
 
 template class GTPinHwHelperHw<Family>;

opencl/source/xe_hpc_core/hardware_commands_helper_xe_hpc_core.cpp

@@ -13,7 +13,7 @@
 #include "opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl"
 
 namespace NEO {
-using FamilyType = XE_HPC_COREFamily;
+using FamilyType = XeHpcCoreFamily;
 
 template struct HardwareCommandsHelper<FamilyType>;
 } // namespace NEO

opencl/source/xe_hpc_core/image_xe_hpc_core.cpp

@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-using Family = XE_HPC_COREFamily;
+using Family = XeHpcCoreFamily;
 static auto gfxCore = IGFX_XE_HPC_CORE;
 } // namespace NEO
 #include "opencl/source/mem_obj/image_tgllp_and_later.inl"

opencl/source/xe_hpc_core/sampler_xe_hpc_core.cpp

@@ -6,6 +6,6 @@
  */
 
 #include "shared/source/xe_hpc_core/hw_cmds_xe_hpc_core_base.h"
-using Family = NEO::XE_HPC_COREFamily;
+using Family = NEO::XeHpcCoreFamily;
 constexpr static auto gfxCore = IGFX_XE_HPC_CORE;
 #include "opencl/source/sampler/sampler_tgllp_and_later.inl"

opencl/source/xe_hpg_core/buffer_xe_hpg_core.cpp

@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-typedef XE_HPG_COREFamily Family;
+typedef XeHpgCoreFamily Family;
 static auto gfxCore = IGFX_XE_HPG_CORE;
 
 template class BufferHw<Family>;

opencl/source/xe_hpg_core/cl_hw_helper_xe_hpg_core.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = XE_HPG_COREFamily;
+using Family = XeHpgCoreFamily;
 static auto gfxCore = IGFX_XE_HPG_CORE;
 
 template <>

opencl/source/xe_hpg_core/command_queue_xe_hpg_core.cpp

@@ -14,7 +14,7 @@
 
 namespace NEO {
 
-using Family = XE_HPG_COREFamily;
+using Family = XeHpgCoreFamily;
 static auto gfxCore = IGFX_XE_HPG_CORE;
 } // namespace NEO
 

opencl/source/xe_hpg_core/enable_family_full_ocl_xe_hpg_core.cpp

@@ -16,7 +16,7 @@
 
 namespace NEO {
 
-using Family = XE_HPG_COREFamily;
+using Family = XeHpgCoreFamily;
 
 struct EnableOCLXeHpgCore {
     EnableOCLXeHpgCore() {

opencl/source/xe_hpg_core/gpgpu_walker_xe_hpg_core.cpp

@@ -12,10 +12,10 @@
 
 namespace NEO {
 
-template class GpgpuWalkerHelper<XE_HPG_COREFamily>;
+template class GpgpuWalkerHelper<XeHpgCoreFamily>;
 
-template class HardwareInterface<XE_HPG_COREFamily>;
+template class HardwareInterface<XeHpgCoreFamily>;
 
-template struct EnqueueOperation<XE_HPG_COREFamily>;
+template struct EnqueueOperation<XeHpgCoreFamily>;
 
 } // namespace NEO

opencl/source/xe_hpg_core/gtpin_setup_xe_hpg_core.cpp

@@ -16,7 +16,7 @@ namespace NEO {
 
 extern GTPinHwHelper *gtpinHwHelperFactory[IGFX_MAX_CORE];
 
-typedef XE_HPG_COREFamily Family;
+typedef XeHpgCoreFamily Family;
 static const auto gfxFamily = IGFX_XE_HPG_CORE;
 
 template class GTPinHwHelperHw<Family>;

opencl/source/xe_hpg_core/hardware_commands_helper_xe_hpg_core.cpp

@@ -13,7 +13,7 @@
 #include "opencl/source/helpers/hardware_commands_helper_xehp_and_later.inl"
 
 namespace NEO {
-using FamilyType = XE_HPG_COREFamily;
+using FamilyType = XeHpgCoreFamily;
 
 template struct HardwareCommandsHelper<FamilyType>;
 } // namespace NEO

opencl/source/xe_hpg_core/image_xe_hpg_core.cpp

@@ -11,7 +11,7 @@
 
 namespace NEO {
 
-using Family = XE_HPG_COREFamily;
+using Family = XeHpgCoreFamily;
 static auto gfxCore = IGFX_XE_HPG_CORE;
 } // namespace NEO
 #include "opencl/source/mem_obj/image_tgllp_and_later.inl"

opencl/source/xe_hpg_core/sampler_xe_hpg_core.cpp

@@ -6,7 +6,7 @@
  */
 
 #include "shared/source/xe_hpg_core/hw_cmds_xe_hpg_core_base.h"
-using Family = NEO::XE_HPG_COREFamily;
+using Family = NEO::XeHpgCoreFamily;
 constexpr static auto gfxCore = IGFX_XE_HPG_CORE;
 
 #include "opencl/source/sampler/sampler.h"

opencl/test/unit_test/aub_tests/xe_hpc_core/copy_engine_aub_tests_xe_hpc_core.cpp

@@ -33,7 +33,7 @@ constexpr uint32_t allSupportedCopyEngines[] = {
     aub_stream::EngineType::ENGINE_BCS8,
 };
 
-using OneTileXeHpcTests = CopyEnginesXeHpcFixture<1, XE_HPC_COREFamily>;
+using OneTileXeHpcTests = CopyEnginesXeHpcFixture<1, XeHpcCoreFamily>;
 
 INSTANTIATE_TEST_CASE_P(
     MemCopyBcsCmd,
@@ -84,7 +84,7 @@ XE_HPC_CORETEST_P(OneTileXeHpcTests, givenCopyBufferRectWithBigSizesWhenHostPtrB
     givenCopyBufferRectWithBigSizesWhenHostPtrBlitCommandIsDispatchedToHostPtrThenDataIsCorrectlyCopiedImpl<FamilyType>();
 }
 
-using OneTileSystemMemoryXeHpcTests = CopyEnginesXeHpcFixture<1, XE_HPC_COREFamily, false>;
+using OneTileSystemMemoryXeHpcTests = CopyEnginesXeHpcFixture<1, XeHpcCoreFamily, false>;
 
 INSTANTIATE_TEST_CASE_P(
     MemCopyBcsCmd,

opencl/test/unit_test/gen11/command_stream_receiver_hw_tests_gen11.cpp

@@ -27,7 +27,7 @@ using namespace NEO;
 
 #include "opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests.inl"
 
-using CommandStreamReceiverHwTestGen11 = CommandStreamReceiverHwTest<ICLFamily>;
+using CommandStreamReceiverHwTestGen11 = CommandStreamReceiverHwTest<Gen11Family>;
 
 GEN11TEST_F(CommandStreamReceiverHwTestGen11, GivenKernelWithSlmWhenPreviousNOSLML3WasSentThenProgramL3WithSLML3Config) {
     givenKernelWithSlmWhenPreviousNOSLML3WasSentThenProgramL3WithSLML3ConfigImpl();

opencl/test/unit_test/gen11/enqueue_media_kernel_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -18,7 +18,7 @@ auto expectedMask = pipelineSelectEnablePipelineSelectMaskBits |
                     pipelineSelectMediaSamplerPowerClockGateMaskBits;
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueBlockedVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
 
     cl_uint workDim = 1;
     size_t globalWorkOffset[3] = {0, 0, 0};
@@ -40,7 +40,7 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueBlockedVmeKernelFirstTimeTh
 
     userEvent.setStatus(CL_COMPLETE);
 
-    parseCommands<ICLFamily>(*pCmdQ);
+    parseCommands<Gen11Family>(*pCmdQ);
     ASSERT_NE(cmdPipelineSelect, nullptr);
     auto *pCmd = genCmdCast<PIPELINE_SELECT *>(cmdPipelineSelect);
     auto expectedPipelineSelection = PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU;
@@ -50,7 +50,7 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueBlockedVmeKernelFirstTimeTh
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueBlockedNonVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
 
     cl_uint workDim = 1;
     size_t globalWorkOffset[3] = {0, 0, 0};
@@ -72,7 +72,7 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueBlockedNonVmeKernelFirstTim
 
     userEvent.setStatus(CL_COMPLETE);
 
-    parseCommands<ICLFamily>(*pCmdQ);
+    parseCommands<Gen11Family>(*pCmdQ);
     ASSERT_NE(cmdPipelineSelect, nullptr);
     auto *pCmd = genCmdCast<PIPELINE_SELECT *>(cmdPipelineSelect);
     auto expectedPipelineSelection = PIPELINE_SELECT::PIPELINE_SELECTION_GPGPU;
@@ -82,8 +82,8 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueBlockedNonVmeKernelFirstTim
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<ICLFamily>();
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen11Family>();
 
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
@@ -97,8 +97,8 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueVmeKernelFirstTimeThenProgr
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueNonVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueRegularKernel<ICLFamily>();
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueRegularKernel<Gen11Family>();
 
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
@@ -112,23 +112,23 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueNonVmeKernelFirstTimeThenPr
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueVmeKernelTwiceThenProgramPipelineSelectOnce) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<ICLFamily>();
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen11Family>();
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueNonVmeKernelTwiceThenProgramPipelineSelectOnce) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<ICLFamily>();
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen11Family>();
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueVmeKernelAfterNonVmeKernelThenProgramPipelineSelectionAndMediaSamplerTwice) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueRegularKernel<ICLFamily>();
-    enqueueVmeKernel<ICLFamily>();
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueRegularKernel<Gen11Family>();
+    enqueueVmeKernel<Gen11Family>();
 
     auto commands = getCommandsList<PIPELINE_SELECT>();
     EXPECT_EQ(2u, commands.size());
@@ -141,9 +141,9 @@ GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueVmeKernelAfterNonVmeKernelT
 }
 
 GEN11TEST_F(MediaKernelTest, givenGen11CsrWhenEnqueueNonVmeKernelAfterVmeKernelThenProgramProgramPipelineSelectionAndMediaSamplerTwice) {
-    typedef typename ICLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<ICLFamily>();
-    enqueueRegularKernel<ICLFamily>();
+    typedef typename Gen11Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen11Family>();
+    enqueueRegularKernel<Gen11Family>();
 
     auto commands = getCommandsList<PIPELINE_SELECT>();
     EXPECT_EQ(2u, commands.size());

opencl/test/unit_test/gen11/image_tests_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -14,11 +14,11 @@
 
 using namespace NEO;
 
-typedef ICLFamily::RENDER_SURFACE_STATE RENDER_SURFACE_STATE;
+typedef Gen11Family::RENDER_SURFACE_STATE RENDER_SURFACE_STATE;
 
 struct AppendSurfaceStateParamsTest : public ::testing::Test {
     void SetUp() override {
-        surfaceState = ICLFamily::cmdInitRenderSurfaceState;
+        surfaceState = Gen11Family::cmdInitRenderSurfaceState;
         EXPECT_EQ(RENDER_SURFACE_STATE::SAMPLE_TAP_DISCARD_DISABLE_DISABLE, surfaceState.getSampleTapDiscardDisable());
 
         imageDesc.image_width = 32;
@@ -58,7 +58,7 @@ GEN11TEST_F(AppendSurfaceStateParamsTest, givenImageFormatWithoutAlphaChannelWhe
     imageFormat.image_channel_order = CL_R;
     createImage();
 
-    auto imageHw = static_cast<ImageHw<ICLFamily> *>(image.get());
+    auto imageHw = static_cast<ImageHw<Gen11Family> *>(image.get());
     imageHw->appendSurfaceStateParams(&surfaceState, context.getDevice(0)->getRootDeviceIndex(), false);
 
     bool tapDiscardConfigChanged = RENDER_SURFACE_STATE::SAMPLE_TAP_DISCARD_DISABLE_DISABLE != surfaceState.getSampleTapDiscardDisable();
@@ -70,7 +70,7 @@ GEN11TEST_F(AppendSurfaceStateParamsTest, givenImageFormatWithAlphaChannelWhenAp
     imageFormat.image_channel_order = CL_RGBA;
     createImage();
 
-    auto imageHw = static_cast<ImageHw<ICLFamily> *>(image.get());
+    auto imageHw = static_cast<ImageHw<Gen11Family> *>(image.get());
     imageHw->appendSurfaceStateParams(&surfaceState, context.getDevice(0)->getRootDeviceIndex(), false);
 
     bool tapDiscardConfigChanged = RENDER_SURFACE_STATE::SAMPLE_TAP_DISCARD_DISABLE_DISABLE != surfaceState.getSampleTapDiscardDisable();

opencl/test/unit_test/gen12lp/coherency_tests_gen12lp.inl

@@ -17,14 +17,14 @@
 using namespace NEO;
 
 struct Gen12LpCoherencyRequirements : public ::testing::Test {
-    using STATE_COMPUTE_MODE = typename TGLLPFamily::STATE_COMPUTE_MODE;
-    using PIPE_CONTROL = typename TGLLPFamily::PIPE_CONTROL;
-    using PIPELINE_SELECT = typename TGLLPFamily::PIPELINE_SELECT;
+    using STATE_COMPUTE_MODE = typename Gen12LpFamily::STATE_COMPUTE_MODE;
+    using PIPE_CONTROL = typename Gen12LpFamily::PIPE_CONTROL;
+    using PIPELINE_SELECT = typename Gen12LpFamily::PIPELINE_SELECT;
 
-    struct myCsr : public CommandStreamReceiverHw<TGLLPFamily> {
+    struct myCsr : public CommandStreamReceiverHw<Gen12LpFamily> {
         using CommandStreamReceiver::commandStream;
         using CommandStreamReceiver::streamProperties;
-        myCsr(ExecutionEnvironment &executionEnvironment) : CommandStreamReceiverHw<TGLLPFamily>(executionEnvironment, 0, 1){};
+        myCsr(ExecutionEnvironment &executionEnvironment) : CommandStreamReceiverHw<Gen12LpFamily>(executionEnvironment, 0, 1){};
         CsrSizeRequestFlags *getCsrRequestFlags() { return &csrSizeRequestFlags; }
     };
 

opencl/test/unit_test/gen12lp/command_stream_receiver_hw_tests_gen12lp.inl

@@ -27,7 +27,7 @@ using namespace NEO;
 
 #include "opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests.inl"
 
-using CommandStreamReceiverHwTestGen12lp = CommandStreamReceiverHwTest<TGLLPFamily>;
+using CommandStreamReceiverHwTestGen12lp = CommandStreamReceiverHwTest<Gen12LpFamily>;
 
 GEN12LPTEST_F(CommandStreamReceiverHwTestGen12lp, givenPreambleSentWhenL3ConfigRequestChangedThenDontProgramL3Register) {
     size_t gws = 1;

opencl/test/unit_test/gen12lp/enqueue_media_kernel_gen12lp.inl

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -13,7 +13,7 @@ using namespace NEO;
 typedef MediaKernelFixture<HelloWorldFixtureFactory> MediaKernelTest;
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueBlockedVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
 
     cl_uint workDim = 1;
     size_t globalWorkOffset[3] = {0, 0, 0};
@@ -35,7 +35,7 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueBlockedVmeKernelFirstTi
 
     userEvent.setStatus(CL_COMPLETE);
 
-    parseCommands<TGLLPFamily>(*pCmdQ);
+    parseCommands<Gen12LpFamily>(*pCmdQ);
     ASSERT_NE(cmdPipelineSelect, nullptr);
     auto *pCmd = genCmdCast<PIPELINE_SELECT *>(cmdPipelineSelect);
 
@@ -47,7 +47,7 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueBlockedVmeKernelFirstTi
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueBlockedNonVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
 
     cl_uint workDim = 1;
     size_t globalWorkOffset[3] = {0, 0, 0};
@@ -69,7 +69,7 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueBlockedNonVmeKernelFirs
 
     userEvent.setStatus(CL_COMPLETE);
 
-    parseCommands<TGLLPFamily>(*pCmdQ);
+    parseCommands<Gen12LpFamily>(*pCmdQ);
     ASSERT_NE(cmdPipelineSelect, nullptr);
     auto *pCmd = genCmdCast<PIPELINE_SELECT *>(cmdPipelineSelect);
 
@@ -81,8 +81,8 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueBlockedNonVmeKernelFirs
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<TGLLPFamily>();
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen12LpFamily>();
 
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
@@ -96,8 +96,8 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueVmeKernelFirstTimeThenP
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueNonVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueRegularKernel<TGLLPFamily>();
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueRegularKernel<Gen12LpFamily>();
 
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
@@ -111,23 +111,23 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueNonVmeKernelFirstTimeTh
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueVmeKernelTwiceThenProgramPipelineSelectOnce) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<TGLLPFamily>();
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen12LpFamily>();
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueNonVmeKernelTwiceThenProgramPipelineSelectOnce) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<TGLLPFamily>();
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen12LpFamily>();
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueVmeKernelAfterNonVmeKernelThenProgramPipelineSelectionAndMediaSamplerTwice) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueRegularKernel<TGLLPFamily>();
-    enqueueVmeKernel<TGLLPFamily>();
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueRegularKernel<Gen12LpFamily>();
+    enqueueVmeKernel<Gen12LpFamily>();
 
     auto commands = getCommandsList<PIPELINE_SELECT>();
     EXPECT_EQ(2u, commands.size());
@@ -140,9 +140,9 @@ GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueVmeKernelAfterNonVmeKer
 }
 
 GEN12LPTEST_F(MediaKernelTest, givenGen12LpCsrWhenEnqueueNonVmeKernelAfterVmeKernelThenProgramProgramPipelineSelectionAndMediaSamplerTwice) {
-    typedef typename TGLLPFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<TGLLPFamily>();
-    enqueueRegularKernel<TGLLPFamily>();
+    typedef typename Gen12LpFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen12LpFamily>();
+    enqueueRegularKernel<Gen12LpFamily>();
 
     auto commands = getCommandsList<PIPELINE_SELECT>();
     EXPECT_EQ(2u, commands.size());

opencl/test/unit_test/gen8/command_stream_receiver_hw_tests_gen8.cpp

@@ -28,7 +28,7 @@ using namespace NEO;
 
 #include "opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests.inl"
 
-using CommandStreamReceiverHwTestGen8 = CommandStreamReceiverHwTest<BDWFamily>;
+using CommandStreamReceiverHwTestGen8 = CommandStreamReceiverHwTest<Gen8Family>;
 
 GEN8TEST_F(CommandStreamReceiverHwTestGen8, GivenKernelWithSlmWhenPreviousNOSLML3WasSentThenProgramL3WithSLML3Config) {
     givenKernelWithSlmWhenPreviousNOSLML3WasSentThenProgramL3WithSLML3ConfigImpl();

opencl/test/unit_test/gen8/enqueue_media_kernel_gen8.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -15,7 +15,7 @@ using namespace NEO;
 typedef MediaKernelFixture<HelloWorldFixtureFactory> MediaKernelTest;
 
 GEN8TEST_F(MediaKernelTest, givenGen8CSRWhenEnqueueVmeKernelThenProgramOnlyPipelineSelection) {
-    typedef typename BDWFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen8Family::PIPELINE_SELECT PIPELINE_SELECT;
     enqueueVmeKernel<FamilyType>();
     auto pCmd = getCommand<PIPELINE_SELECT>();
     auto expectedMask = pipelineSelectEnablePipelineSelectMaskBits;

opencl/test/unit_test/gen9/command_stream_receiver_hw_tests_gen9.cpp

@@ -31,7 +31,7 @@ using namespace NEO;
 
 #include "opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests.inl"
 
-using CommandStreamReceiverHwTestGen9 = CommandStreamReceiverHwTest<SKLFamily>;
+using CommandStreamReceiverHwTestGen9 = CommandStreamReceiverHwTest<Gen9Family>;
 
 GEN9TEST_F(UltCommandStreamReceiverTest, whenPreambleIsProgrammedThenStateSipCmdIsNotPresentInPreambleCmdStream) {
     using STATE_SIP = typename FamilyType::STATE_SIP;

opencl/test/unit_test/gen9/enqueue_kernel_gen9.cpp

@@ -22,7 +22,7 @@ namespace NEO {
 using Gen9EnqueueTest = Test<ClDeviceFixture>;
 GEN9TEST_F(Gen9EnqueueTest, givenKernelRequiringIndependentForwardProgressWhenKernelIsSubmittedThenRoundRobinPolicyIsProgrammed) {
     MockContext mc;
-    CommandQueueHw<SKLFamily> cmdQ{&mc, pClDevice, 0, false};
+    CommandQueueHw<Gen9Family> cmdQ{&mc, pClDevice, 0, false};
 
     SPatchExecutionEnvironment sPatchExecEnv = {};
     sPatchExecEnv.SubgroupIndependentForwardProgressRequired = true;
@@ -41,7 +41,7 @@ GEN9TEST_F(Gen9EnqueueTest, givenKernelRequiringIndependentForwardProgressWhenKe
 
 GEN9TEST_F(Gen9EnqueueTest, givenKernelNotRequiringIndependentForwardProgressWhenKernelIsSubmittedThenAgeBasedPolicyIsProgrammed) {
     MockContext mc;
-    CommandQueueHw<SKLFamily> cmdQ{&mc, pClDevice, 0, false};
+    CommandQueueHw<Gen9Family> cmdQ{&mc, pClDevice, 0, false};
 
     SPatchExecutionEnvironment sPatchExecEnv = {};
     sPatchExecEnv.SubgroupIndependentForwardProgressRequired = false;

opencl/test/unit_test/gen9/enqueue_media_kernel_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2018-2021 Intel Corporation
+ * Copyright (C) 2018-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -15,7 +15,7 @@ using namespace NEO;
 typedef MediaKernelFixture<HelloWorldFixtureFactory> MediaKernelTest;
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueBlockedVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
 
     cl_uint workDim = 1;
     size_t globalWorkOffset[3] = {0, 0, 0};
@@ -37,7 +37,7 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueBlockedVmeKernelFirstTimeThen
 
     userEvent.setStatus(CL_COMPLETE);
 
-    parseCommands<SKLFamily>(*pCmdQ);
+    parseCommands<Gen9Family>(*pCmdQ);
     ASSERT_NE(cmdPipelineSelect, nullptr);
     auto *pCmd = genCmdCast<PIPELINE_SELECT *>(cmdPipelineSelect);
 
@@ -49,7 +49,7 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueBlockedVmeKernelFirstTimeThen
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueBlockedNonVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
 
     cl_uint workDim = 1;
     size_t globalWorkOffset[3] = {0, 0, 0};
@@ -71,7 +71,7 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueBlockedNonVmeKernelFirstTimeT
 
     userEvent.setStatus(CL_COMPLETE);
 
-    parseCommands<SKLFamily>(*pCmdQ);
+    parseCommands<Gen9Family>(*pCmdQ);
     ASSERT_NE(cmdPipelineSelect, nullptr);
     auto *pCmd = genCmdCast<PIPELINE_SELECT *>(cmdPipelineSelect);
 
@@ -83,8 +83,8 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueBlockedNonVmeKernelFirstTimeT
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<SKLFamily>();
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen9Family>();
 
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
@@ -98,8 +98,8 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueVmeKernelFirstTimeThenProgram
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueNonVmeKernelFirstTimeThenProgramPipelineSelectionAndMediaSampler) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueRegularKernel<SKLFamily>();
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueRegularKernel<Gen9Family>();
 
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
@@ -113,23 +113,23 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueNonVmeKernelFirstTimeThenProg
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueVmeKernelTwiceThenProgramPipelineSelectOnce) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<SKLFamily>();
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen9Family>();
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueNonVmeKernelTwiceThenProgramPipelineSelectOnce) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<SKLFamily>();
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen9Family>();
     auto numCommands = getCommandsList<PIPELINE_SELECT>().size();
     EXPECT_EQ(1u, numCommands);
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueVmeKernelAfterNonVmeKernelThenProgramPipelineSelectionAndMediaSamplerTwice) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueRegularKernel<SKLFamily>();
-    enqueueVmeKernel<SKLFamily>();
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueRegularKernel<Gen9Family>();
+    enqueueVmeKernel<Gen9Family>();
 
     auto commands = getCommandsList<PIPELINE_SELECT>();
     EXPECT_EQ(2u, commands.size());
@@ -142,9 +142,9 @@ GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueVmeKernelAfterNonVmeKernelThe
 }
 
 GEN9TEST_F(MediaKernelTest, givenGen9CsrWhenEnqueueNonVmeKernelAfterVmeKernelThenProgramProgramPipelineSelectionAndMediaSamplerTwice) {
-    typedef typename SKLFamily::PIPELINE_SELECT PIPELINE_SELECT;
-    enqueueVmeKernel<SKLFamily>();
-    enqueueRegularKernel<SKLFamily>();
+    typedef typename Gen9Family::PIPELINE_SELECT PIPELINE_SELECT;
+    enqueueVmeKernel<Gen9Family>();
+    enqueueRegularKernel<Gen9Family>();
 
     auto commands = getCommandsList<PIPELINE_SELECT>();
     EXPECT_EQ(2u, commands.size());

opencl/test/unit_test/gen9/test_preemption_gen9.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2020-2021 Intel Corporation
+ * Copyright (C) 2020-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -17,8 +17,8 @@
 namespace NEO {
 
 template <>
-void HardwareParse::findCsrBaseAddress<SKLFamily>() {
-    typedef typename GEN9::GPGPU_CSR_BASE_ADDRESS GPGPU_CSR_BASE_ADDRESS;
+void HardwareParse::findCsrBaseAddress<Gen9Family>() {
+    typedef typename Gen9::GPGPU_CSR_BASE_ADDRESS GPGPU_CSR_BASE_ADDRESS;
     itorGpgpuCsrBaseAddress = find<GPGPU_CSR_BASE_ADDRESS *>(cmdList.begin(), itorWalker);
     if (itorGpgpuCsrBaseAddress != itorWalker) {
         cmdGpgpuCsrBaseAddress = *itorGpgpuCsrBaseAddress;

opencl/test/unit_test/xe_hpc_core/pvc/hw_helper_tests_pvc.cpp

@@ -76,17 +76,17 @@ PVCTEST_F(HwHelperTestsPvc, givenRevisionEnumAndPlatformFamilyTypeThenProperValu
 }
 
 PVCTEST_F(HwHelperTestsPvc, givenDefaultMemorySynchronizationCommandsWhenGettingSizeForAdditionalSynchronizationThenCorrectValueIsReturned) {
-    using MI_SEMAPHORE_WAIT = typename XE_HPC_COREFamily::MI_SEMAPHORE_WAIT;
+    using MI_SEMAPHORE_WAIT = typename XeHpcCoreFamily::MI_SEMAPHORE_WAIT;
 
-    EXPECT_EQ(sizeof(MI_SEMAPHORE_WAIT), MemorySynchronizationCommands<XE_HPC_COREFamily>::getSizeForAdditonalSynchronization(*defaultHwInfo));
+    EXPECT_EQ(sizeof(MI_SEMAPHORE_WAIT), MemorySynchronizationCommands<XeHpcCoreFamily>::getSizeForAdditonalSynchronization(*defaultHwInfo));
 }
 
 PVCTEST_F(HwHelperTestsPvc, givenDebugMemorySynchronizationCommandsWhenGettingSizeForAdditionalSynchronizationThenCorrectValueIsReturned) {
     DebugManagerStateRestore restorer;
     DebugManager.flags.DisablePipeControlPrecedingPostSyncCommand.set(1);
-    using MI_SEMAPHORE_WAIT = typename XE_HPC_COREFamily::MI_SEMAPHORE_WAIT;
+    using MI_SEMAPHORE_WAIT = typename XeHpcCoreFamily::MI_SEMAPHORE_WAIT;
 
-    EXPECT_EQ(2 * sizeof(MI_SEMAPHORE_WAIT), MemorySynchronizationCommands<XE_HPC_COREFamily>::getSizeForAdditonalSynchronization(*defaultHwInfo));
+    EXPECT_EQ(2 * sizeof(MI_SEMAPHORE_WAIT), MemorySynchronizationCommands<XeHpcCoreFamily>::getSizeForAdditonalSynchronization(*defaultHwInfo));
 }
 
 PVCTEST_F(HwHelperTestsPvc, givenRevisionIdWhenGetComputeUnitsUsedForScratchThenReturnValidValue) {

shared/source/gen11/aub_command_stream_receiver_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -12,7 +12,7 @@
 
 namespace NEO {
 
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 template <>

shared/source/gen11/aub_mapper.h

@@ -13,10 +13,10 @@
 #include "engine_node.h"
 
 namespace NEO {
-struct ICLFamily;
+struct Gen11Family;
 
 template <>
-struct AUBFamilyMapper<ICLFamily> {
+struct AUBFamilyMapper<Gen11Family> {
     enum { device = AubMemDump::DeviceValues::Icllp };
 
     using AubTraits = AubMemDump::Traits<device, MemoryConstants::GfxAddressBits>;

shared/source/gen11/aub_mem_dump_gen11.cpp

@@ -30,7 +30,7 @@ template struct AubPageTableHelper64<Traits<device, 48>>;
 } // namespace AubMemDump
 
 namespace NEO {
-using Family = ICLFamily;
+using Family = Gen11Family;
 
 static const AubMemDump::LrcaHelperRcs rcs(0x002000);
 static const AubMemDump::LrcaHelperBcs bcs(0x022000);

shared/source/gen11/command_encoder_gen11.cpp

@@ -11,7 +11,7 @@
 
 #include "reg_configs_common.h"
 
-using Family = NEO::ICLFamily;
+using Family = NEO::Gen11Family;
 
 #include "shared/source/command_container/command_encoder.inl"
 #include "shared/source/command_container/command_encoder_bdw_and_later.inl"

shared/source/gen11/command_stream_receiver_hw_gen11.cpp

@@ -15,7 +15,7 @@
 #include "shared/source/helpers/populate_factory.h"
 
 namespace NEO {
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 static auto gfxCore = IGFX_GEN11_CORE;
 
 template <>

shared/source/gen11/command_stream_receiver_simulated_common_hw_gen11.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2019-2021 Intel Corporation
+ * Copyright (C) 2019-2022 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -8,7 +8,7 @@
 #include "shared/source/command_stream/command_stream_receiver_simulated_common_hw_bdw_and_later.inl"
 
 namespace NEO {
-typedef ICLFamily Family;
+typedef Gen11Family Family;
 
 template <>
 void CommandStreamReceiverSimulatedCommonHw<Family>::submitLRCA(const MiContextDescriptorReg &contextDescriptor) {

shared/source/gen11/create_device_command_stream_receiver_gen11.cpp

@@ -13,11 +13,11 @@
 namespace NEO {
 
 template <>
-CommandStreamReceiver *createDeviceCommandStreamReceiver<ICLFamily>(bool withAubDump,
-                                                                    ExecutionEnvironment &executionEnvironment,
-                                                                    uint32_t rootDeviceIndex,
-                                                                    const DeviceBitfield deviceBitfield) {
-    return createCommandStreamReceiver<ICLFamily>(withAubDump, executionEnvironment, rootDeviceIndex, deviceBitfield);
+CommandStreamReceiver *createDeviceCommandStreamReceiver<Gen11Family>(bool withAubDump,
+                                                                      ExecutionEnvironment &executionEnvironment,
+                                                                      uint32_t rootDeviceIndex,
+                                                                      const DeviceBitfield deviceBitfield) {
+    return createCommandStreamReceiver<Gen11Family>(withAubDump, executionEnvironment, rootDeviceIndex, deviceBitfield);
 }
 
 } // namespace NEO

shared/source/gen11/debugger_gen11.cpp

@@ -11,8 +11,8 @@
 #include "shared/source/helpers/populate_factory.h"
 
 namespace NEO {
-struct ICLFamily;
-using GfxFamily = ICLFamily;
+struct Gen11Family;
+using GfxFamily = Gen11Family;
 static auto coreFamily = IGFX_GEN11_CORE;
 
 template <>

shared/source/gen11/enable_family_full_core_gen11.cpp

@@ -17,7 +17,7 @@ namespace NEO {
 
 extern HwHelper *hwHelperFactory[IGFX_MAX_CORE];
 
-using Family = ICLFamily;
+using Family = Gen11Family;
 static auto gfxFamily = IGFX_GEN11_CORE;
 
 struct EnableCoreGen11 {

shared/source/gen11/experimental_command_buffer_gen11.cpp

@@ -11,7 +11,7 @@
 #include "shared/source/helpers/hw_helper.h"
 
 namespace NEO {
-typedef ICLFamily GfxFamily;
+typedef Gen11Family GfxFamily;
 
 template void ExperimentalCommandBuffer::injectBufferStart<GfxFamily>(LinearStream &parentStream, size_t cmdBufferOffset);
 template size_t ExperimentalCommandBuffer::getRequiredInjectionSize<GfxFamily>() noexcept;

shared/source/gen11/hw_cmds_base.h

@@ -18,7 +18,7 @@ struct CmdParse;
 
 namespace NEO {
 class LogicalStateHelper;
-struct GEN11 {
+struct Gen11 {
 #include "shared/source/generated/gen11/hw_cmds_generated_gen11.inl"
 
     static constexpr bool supportsSampler = true;
@@ -50,9 +50,9 @@ struct GEN11 {
 
     static_assert(sizeof(DataPortBindlessSurfaceExtendedMessageDescriptor) == sizeof(DataPortBindlessSurfaceExtendedMessageDescriptor::packed), "");
 };
-struct ICLFamily : public GEN11 {
-    using PARSE = CmdParse<ICLFamily>;
-    using GfxFamily = ICLFamily;
+struct Gen11Family : public Gen11 {
+    using PARSE = CmdParse<Gen11Family>;
+    using GfxFamily = Gen11Family;
     using WALKER_TYPE = GPGPU_WALKER;
     using VFE_STATE_TYPE = MEDIA_VFE_STATE;
     using XY_BLOCK_COPY_BLT = typename GfxFamily::XY_SRC_COPY_BLT;

shared/source/gen11/hw_cmds_ehl.h

@@ -10,7 +10,7 @@
 
 namespace NEO {
 
-struct EHL : public ICLFamily {
+struct EHL : public Gen11Family {
     static const PLATFORM platform;
     static const HardwareInfo hwInfo;
     static const uint64_t defaultHardwareInfoConfig;

shared/source/gen11/hw_cmds_icllp.h

@@ -10,7 +10,7 @@
 
 namespace NEO {
 
-struct ICLLP : public ICLFamily {
+struct ICLLP : public Gen11Family {
     static const PLATFORM platform;
     static const HardwareInfo hwInfo;
     static const uint64_t defaultHardwareInfoConfig;