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Revert "feature: Enabling Blitter Remapping for REGISTER_REG"

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This reverts commit 4f2e61841f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
This commit is contained in:
Compute-Runtime-Validation
2024-09-12 04:11:41 +02:00
committed by Compute-Runtime-Automation
parent 18147e22f8
commit c0d9cb4d84
4 changed files with 12 additions and 55 deletions
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8
opencl/test/unit_test/command_stream/command_stream_receiver_hw_1_tests.cpp
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@@ -1068,12 +1068,12 @@ HWTEST2_F(RelaxedOrderingBcsTests, givenDependenciesWhenFlushingThenProgramCorre
EXPECT_TRUE(csr.latestFlushedBatchBuffer.hasRelaxedOrderingDependencies);
auto lrrCmd = reinterpret_cast<MI_LOAD_REGISTER_REG *>(ptrOffset(csr.commandStream.getCpuBase(), cmdsOffset));
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0);
lrrCmd++;
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR4 + 4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0 + 4);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR4 + 4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0 + 4);
auto eventNode = timestamp.peekNodes()[0];
auto compareAddress = eventNode->getGpuAddress() + eventNode->getContextEndOffset();

2
shared/source/command_container/command_encoder.inl
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@@ -387,8 +387,6 @@ void EncodeSetMMIO<Family>::encodeMEM(LinearStream &cmdStream, uint32_t offset,
template <typename Family>
void EncodeSetMMIO<Family>::encodeREG(LinearStream &cmdStream, uint32_t dstOffset, uint32_t srcOffset, bool isBcs) {
MI_LOAD_REGISTER_REG cmd = Family::cmdInitLoadRegisterReg;
srcOffset += (isBcs && isRemapApplicable(srcOffset)) ? RegisterOffsets::bcs0Base : 0x0;
dstOffset += (isBcs && isRemapApplicable(dstOffset)) ? RegisterOffsets::bcs0Base : 0x0;
cmd.setSourceRegisterAddress(srcOffset);
cmd.setDestinationRegisterAddress(dstOffset);
remapOffset(&cmd);

41
shared/test/unit_test/command_container/command_encoder_tests.cpp
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@@ -757,47 +757,6 @@ HWTEST2_F(CommandEncoderTests, givenMiLoadRegisterMemwhenRemapAndIsBcsThenRegist
EXPECT_EQ(loadRegMem->getRegisterAddress(), offset);
}
HWTEST2_F(CommandEncoderTests, givenMiLoadRegisterRegwhenRemapAndIsBcsThenRegisterOffsetsBcs0Base, IsAtLeastGen12lp) {
using MI_LOAD_REGISTER_REG = typename FamilyType::MI_LOAD_REGISTER_REG;
uint32_t srcOffset = 0x2000; // remapable
uint32_t dstOffset = 0x2000;
constexpr size_t bufferSize = 2100;
uint8_t buffer[bufferSize];
LinearStream cmdStream(buffer, bufferSize);
uint8_t *ptr = buffer;
bool isBcs = true;
EncodeSetMMIO<FamilyType>::encodeREG(cmdStream, srcOffset, dstOffset, isBcs);
auto storeRegReg = genCmdCast<MI_LOAD_REGISTER_REG *>(buffer);
ASSERT_NE(nullptr, storeRegReg);
EXPECT_EQ(storeRegReg->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + srcOffset);
EXPECT_EQ(storeRegReg->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + dstOffset);
isBcs = false;
ptr += sizeof(MI_LOAD_REGISTER_REG);
EncodeSetMMIO<FamilyType>::encodeREG(cmdStream, srcOffset, dstOffset, isBcs);
storeRegReg = genCmdCast<MI_LOAD_REGISTER_REG *>(ptr);
EXPECT_EQ(storeRegReg->getSourceRegisterAddress(), srcOffset);
EXPECT_EQ(storeRegReg->getDestinationRegisterAddress(), dstOffset);
srcOffset = 0x1900; // not remapable
dstOffset = 0x1900;
ptr += sizeof(MI_LOAD_REGISTER_REG);
EncodeSetMMIO<FamilyType>::encodeREG(cmdStream, srcOffset, dstOffset, isBcs);
storeRegReg = genCmdCast<MI_LOAD_REGISTER_REG *>(ptr);
EXPECT_EQ(storeRegReg->getSourceRegisterAddress(), srcOffset);
EXPECT_EQ(storeRegReg->getDestinationRegisterAddress(), dstOffset);
isBcs = true;
ptr += sizeof(MI_LOAD_REGISTER_REG);
EncodeSetMMIO<FamilyType>::encodeREG(cmdStream, srcOffset, dstOffset, isBcs);
storeRegReg = genCmdCast<MI_LOAD_REGISTER_REG *>(ptr);
EXPECT_EQ(storeRegReg->getSourceRegisterAddress(), srcOffset);
EXPECT_EQ(storeRegReg->getDestinationRegisterAddress(), dstOffset);
}
HWTEST2_F(CommandEncoderTests, whenForcingLowQualityFilteringAndAppendSamplerStateParamsThenEnableLowQualityFilter, IsAtLeastGen12lp) {
DebugManagerStateRestore dbgRestore;

16
shared/test/unit_test/direct_submission/direct_submission_tests_2.cpp
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@@ -2211,12 +2211,12 @@ HWTEST2_F(DirectSubmissionRelaxedOrderingTests, givenBcsRelaxedOrderingEnabledWh
auto lrrCmdIt = find<MI_LOAD_REGISTER_REG *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
auto lrrCmd = genCmdCast<MI_LOAD_REGISTER_REG *>(*lrrCmdIt);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0);
lrrCmd++;
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3 + 4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0 + 4);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3 + 4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0 + 4);
auto bbStartCmd = reinterpret_cast<MI_BATCH_BUFFER_START *>(++lrrCmd);
EXPECT_EQ(1u, bbStartCmd->getIndirectAddressEnable());
@@ -2276,12 +2276,12 @@ HWTEST2_F(DirectSubmissionRelaxedOrderingTests, whenProgrammingEndingCmdsThenSet
auto lrrCmdIt = find<MI_LOAD_REGISTER_REG *>(hwParser.cmdList.begin(), hwParser.cmdList.end());
auto lrrCmd = genCmdCast<MI_LOAD_REGISTER_REG *>(*lrrCmdIt);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0);
lrrCmd++;
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR3 + 4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::bcs0Base + RegisterOffsets::csGprR0 + 4);
EXPECT_EQ(lrrCmd->getSourceRegisterAddress(), RegisterOffsets::csGprR3 + 4);
EXPECT_EQ(lrrCmd->getDestinationRegisterAddress(), RegisterOffsets::csGprR0 + 4);
auto bbStartCmd = reinterpret_cast<MI_BATCH_BUFFER_START *>(++lrrCmd);
EXPECT_EQ(1u, bbStartCmd->getIndirectAddressEnable());