mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-03 23:03:02 +08:00
feature: Add heapless mode programming in ocl
Related-To: NEO-7621 Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
This commit is contained in:
Kamil Kopryk
committed by
Compute-Runtime-Automation
Compute-Runtime-Automation
parent
c35b13ccae
commit
ce7298d512
@@ -48,205 +48,6 @@ typedef struct tagBINDING_TABLE_STATE {
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} BINDING_TABLE_STATE;
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STATIC_ASSERT(4 == sizeof(BINDING_TABLE_STATE));
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typedef struct tagGPGPU_WALKER {
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union tagTheStructure {
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struct tagCommon {
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// DWORD 0
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uint32_t DwordLength : BITFIELD_RANGE(0, 7);
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uint32_t PredicateEnable : BITFIELD_RANGE(8, 8);
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uint32_t Reserved_9 : BITFIELD_RANGE(9, 9);
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uint32_t IndirectParameterEnable : BITFIELD_RANGE(10, 10);
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uint32_t Reserved_11 : BITFIELD_RANGE(11, 15);
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uint32_t Subopcode : BITFIELD_RANGE(16, 23);
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uint32_t MediaCommandOpcode : BITFIELD_RANGE(24, 26);
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uint32_t Pipeline : BITFIELD_RANGE(27, 28);
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uint32_t CommandType : BITFIELD_RANGE(29, 31);
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// DWORD 1
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uint32_t InterfaceDescriptorOffset : BITFIELD_RANGE(0, 5);
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uint32_t Reserved_38 : BITFIELD_RANGE(6, 31);
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// DWORD 2
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uint32_t IndirectDataLength : BITFIELD_RANGE(0, 16);
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uint32_t Reserved_81 : BITFIELD_RANGE(17, 31);
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// DWORD 3
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uint32_t Reserved_96 : BITFIELD_RANGE(0, 5);
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uint32_t IndirectDataStartAddress : BITFIELD_RANGE(6, 31);
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// DWORD 4
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uint32_t ThreadWidthCounterMaximum : BITFIELD_RANGE(0, 5);
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uint32_t Reserved_134 : BITFIELD_RANGE(6, 7);
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uint32_t ThreadHeightCounterMaximum : BITFIELD_RANGE(8, 13);
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uint32_t Reserved_142 : BITFIELD_RANGE(14, 15);
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uint32_t ThreadDepthCounterMaximum : BITFIELD_RANGE(16, 21);
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uint32_t Reserved_150 : BITFIELD_RANGE(22, 29);
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uint32_t SimdSize : BITFIELD_RANGE(30, 31);
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// DWORD 5
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uint32_t ThreadGroupIdStartingX;
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// DWORD 6
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uint32_t Reserved_192;
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// DWORD 7
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uint32_t ThreadGroupIdXDimension;
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// DWORD 8
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uint32_t ThreadGroupIdStartingY;
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// DWORD 9
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uint32_t Reserved_288;
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// DWORD 10
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uint32_t ThreadGroupIdYDimension;
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// DWORD 11
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uint32_t ThreadGroupIdStartingResumeZ;
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// DWORD 12
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uint32_t ThreadGroupIdZDimension;
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// DWORD 13
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uint32_t RightExecutionMask;
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// DWORD 14
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uint32_t BottomExecutionMask;
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} Common;
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uint32_t RawData[15];
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} TheStructure;
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typedef enum tagDWORD_LENGTH {
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DWORD_LENGTH_DWORD_COUNT_N = 0xd,
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} DWORD_LENGTH;
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typedef enum tagSUBOPCODE {
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SUBOPCODE_GPGPU_WALKER_SUBOP = 0x5,
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} SUBOPCODE;
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typedef enum tagMEDIA_COMMAND_OPCODE {
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MEDIA_COMMAND_OPCODE_GPGPU_WALKER = 0x1,
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} MEDIA_COMMAND_OPCODE;
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typedef enum tagPIPELINE {
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PIPELINE_MEDIA = 0x2,
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} PIPELINE;
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typedef enum tagCOMMAND_TYPE {
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COMMAND_TYPE_GFXPIPE = 0x3,
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} COMMAND_TYPE;
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typedef enum tagSIMD_SIZE {
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SIMD_SIZE_SIMD8 = 0x0,
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SIMD_SIZE_SIMD16 = 0x1,
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SIMD_SIZE_SIMD32 = 0x2,
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} SIMD_SIZE;
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inline void init() {
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memset(&TheStructure, 0, sizeof(TheStructure));
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TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N;
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TheStructure.Common.Subopcode = SUBOPCODE_GPGPU_WALKER_SUBOP;
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TheStructure.Common.MediaCommandOpcode = MEDIA_COMMAND_OPCODE_GPGPU_WALKER;
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TheStructure.Common.Pipeline = PIPELINE_MEDIA;
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TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE;
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TheStructure.Common.SimdSize = SIMD_SIZE_SIMD8;
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}
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static tagGPGPU_WALKER sInit() {
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GPGPU_WALKER state;
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state.init();
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return state;
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}
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inline uint32_t &getRawData(const uint32_t index) {
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return TheStructure.RawData[index];
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}
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inline void setPredicateEnable(const bool value) {
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TheStructure.Common.PredicateEnable = value;
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}
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inline bool getPredicateEnable() const {
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return TheStructure.Common.PredicateEnable;
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}
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inline void setIndirectParameterEnable(const bool value) {
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TheStructure.Common.IndirectParameterEnable = value;
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}
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inline bool getIndirectParameterEnable() const {
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return TheStructure.Common.IndirectParameterEnable;
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}
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inline void setInterfaceDescriptorOffset(const uint32_t value) {
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TheStructure.Common.InterfaceDescriptorOffset = value;
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}
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inline uint32_t getInterfaceDescriptorOffset() const {
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return TheStructure.Common.InterfaceDescriptorOffset;
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}
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inline void setIndirectDataLength(const uint32_t value) {
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TheStructure.Common.IndirectDataLength = value;
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}
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inline uint32_t getIndirectDataLength() const {
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return TheStructure.Common.IndirectDataLength;
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}
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typedef enum tagINDIRECTDATASTARTADDRESS {
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INDIRECTDATASTARTADDRESS_BIT_SHIFT = 0x6,
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INDIRECTDATASTARTADDRESS_ALIGN_SIZE = 0x40,
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} INDIRECTDATASTARTADDRESS;
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inline void setIndirectDataStartAddress(const uint32_t value) {
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TheStructure.Common.IndirectDataStartAddress = value >> INDIRECTDATASTARTADDRESS_BIT_SHIFT;
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}
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inline uint32_t getIndirectDataStartAddress() const {
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return TheStructure.Common.IndirectDataStartAddress << INDIRECTDATASTARTADDRESS_BIT_SHIFT;
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}
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inline void setThreadWidthCounterMaximum(const uint32_t value) {
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TheStructure.Common.ThreadWidthCounterMaximum = value - 1;
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}
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inline uint32_t getThreadWidthCounterMaximum() const {
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return TheStructure.Common.ThreadWidthCounterMaximum + 1;
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}
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inline void setThreadHeightCounterMaximum(const uint32_t value) {
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TheStructure.Common.ThreadHeightCounterMaximum = value - 1;
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}
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inline uint32_t getThreadHeightCounterMaximum() const {
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return TheStructure.Common.ThreadHeightCounterMaximum + 1;
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}
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inline void setThreadDepthCounterMaximum(const uint32_t value) {
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TheStructure.Common.ThreadDepthCounterMaximum = value;
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}
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inline uint32_t getThreadDepthCounterMaximum() const {
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return TheStructure.Common.ThreadDepthCounterMaximum;
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}
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inline void setSimdSize(const SIMD_SIZE value) {
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TheStructure.Common.SimdSize = value;
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}
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inline SIMD_SIZE getSimdSize() const {
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return static_cast<SIMD_SIZE>(TheStructure.Common.SimdSize);
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}
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inline void setThreadGroupIdStartingX(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdStartingX = value;
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}
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inline uint32_t getThreadGroupIdStartingX() const {
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return TheStructure.Common.ThreadGroupIdStartingX;
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}
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inline void setThreadGroupIdXDimension(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdXDimension = value;
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}
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inline uint32_t getThreadGroupIdXDimension() const {
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return TheStructure.Common.ThreadGroupIdXDimension;
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}
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inline void setThreadGroupIdStartingY(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdStartingY = value;
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}
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inline uint32_t getThreadGroupIdStartingY() const {
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return TheStructure.Common.ThreadGroupIdStartingY;
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}
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inline void setThreadGroupIdYDimension(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdYDimension = value;
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}
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inline uint32_t getThreadGroupIdYDimension() const {
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return TheStructure.Common.ThreadGroupIdYDimension;
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}
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inline void setThreadGroupIdStartingResumeZ(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdStartingResumeZ = value;
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}
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inline uint32_t getThreadGroupIdStartingResumeZ() const {
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return TheStructure.Common.ThreadGroupIdStartingResumeZ;
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}
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inline void setThreadGroupIdZDimension(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdZDimension = value;
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}
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inline uint32_t getThreadGroupIdZDimension() const {
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return TheStructure.Common.ThreadGroupIdZDimension;
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}
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inline void setRightExecutionMask(const uint32_t value) {
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TheStructure.Common.RightExecutionMask = value;
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}
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inline uint32_t getRightExecutionMask() const {
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return TheStructure.Common.RightExecutionMask;
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}
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inline void setBottomExecutionMask(const uint32_t value) {
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TheStructure.Common.BottomExecutionMask = value;
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}
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inline uint32_t getBottomExecutionMask() const {
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return TheStructure.Common.BottomExecutionMask;
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}
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} GPGPU_WALKER;
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STATIC_ASSERT(60 == sizeof(GPGPU_WALKER));
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typedef struct tagINTERFACE_DESCRIPTOR_DATA {
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union tagTheStructure {
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struct tagCommon {
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@@ -486,11 +287,11 @@ typedef struct tagINTERFACE_DESCRIPTOR_DATA {
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inline OVER_DISPATCH_CONTROL getOverDispatchControl() const {
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return static_cast<OVER_DISPATCH_CONTROL>(TheStructure.Common.OverDispatchControl);
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}
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inline void setSharedLocalMemorySize(const SHARED_LOCAL_MEMORY_SIZE value) {
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inline void setSharedLocalMemorySize(const uint32_t value) { // patched
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TheStructure.Common.SharedLocalMemorySize = value;
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}
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inline SHARED_LOCAL_MEMORY_SIZE getSharedLocalMemorySize() const {
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return static_cast<SHARED_LOCAL_MEMORY_SIZE>(TheStructure.Common.SharedLocalMemorySize);
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inline uint32_t getSharedLocalMemorySize() const { // patched
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return static_cast<uint32_t>(TheStructure.Common.SharedLocalMemorySize);
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}
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inline void setBarrierEnable(const uint32_t value) {
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TheStructure.Common.BarrierEnable = (value > 0u) ? 1u : 0u;
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@@ -513,6 +314,208 @@ typedef struct tagINTERFACE_DESCRIPTOR_DATA {
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} INTERFACE_DESCRIPTOR_DATA;
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STATIC_ASSERT(32 == sizeof(INTERFACE_DESCRIPTOR_DATA));
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typedef struct tagGPGPU_WALKER {
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union tagTheStructure {
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struct tagCommon {
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// DWORD 0
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uint32_t DwordLength : BITFIELD_RANGE(0, 7);
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uint32_t PredicateEnable : BITFIELD_RANGE(8, 8);
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uint32_t Reserved_9 : BITFIELD_RANGE(9, 9);
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uint32_t IndirectParameterEnable : BITFIELD_RANGE(10, 10);
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uint32_t Reserved_11 : BITFIELD_RANGE(11, 15);
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uint32_t Subopcode : BITFIELD_RANGE(16, 23);
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uint32_t MediaCommandOpcode : BITFIELD_RANGE(24, 26);
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uint32_t Pipeline : BITFIELD_RANGE(27, 28);
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uint32_t CommandType : BITFIELD_RANGE(29, 31);
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// DWORD 1
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uint32_t InterfaceDescriptorOffset : BITFIELD_RANGE(0, 5);
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uint32_t Reserved_38 : BITFIELD_RANGE(6, 31);
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// DWORD 2
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uint32_t IndirectDataLength : BITFIELD_RANGE(0, 16);
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uint32_t Reserved_81 : BITFIELD_RANGE(17, 31);
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// DWORD 3
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uint32_t Reserved_96 : BITFIELD_RANGE(0, 5);
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uint32_t IndirectDataStartAddress : BITFIELD_RANGE(6, 31);
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// DWORD 4
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uint32_t ThreadWidthCounterMaximum : BITFIELD_RANGE(0, 5);
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uint32_t Reserved_134 : BITFIELD_RANGE(6, 7);
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uint32_t ThreadHeightCounterMaximum : BITFIELD_RANGE(8, 13);
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uint32_t Reserved_142 : BITFIELD_RANGE(14, 15);
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uint32_t ThreadDepthCounterMaximum : BITFIELD_RANGE(16, 21);
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uint32_t Reserved_150 : BITFIELD_RANGE(22, 29);
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uint32_t SimdSize : BITFIELD_RANGE(30, 31);
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// DWORD 5
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uint32_t ThreadGroupIdStartingX;
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// DWORD 6
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uint32_t Reserved_192;
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// DWORD 7
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uint32_t ThreadGroupIdXDimension;
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// DWORD 8
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uint32_t ThreadGroupIdStartingY;
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// DWORD 9
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uint32_t Reserved_288;
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// DWORD 10
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uint32_t ThreadGroupIdYDimension;
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// DWORD 11
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uint32_t ThreadGroupIdStartingResumeZ;
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// DWORD 12
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uint32_t ThreadGroupIdZDimension;
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// DWORD 13
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uint32_t RightExecutionMask;
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// DWORD 14
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uint32_t BottomExecutionMask;
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} Common;
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uint32_t RawData[15];
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} TheStructure;
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typedef enum tagDWORD_LENGTH {
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DWORD_LENGTH_DWORD_COUNT_N = 0xd,
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} DWORD_LENGTH;
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typedef enum tagSUBOPCODE {
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SUBOPCODE_GPGPU_WALKER_SUBOP = 0x5,
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} SUBOPCODE;
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typedef enum tagMEDIA_COMMAND_OPCODE {
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MEDIA_COMMAND_OPCODE_GPGPU_WALKER = 0x1,
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} MEDIA_COMMAND_OPCODE;
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typedef enum tagPIPELINE {
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PIPELINE_MEDIA = 0x2,
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} PIPELINE;
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typedef enum tagCOMMAND_TYPE {
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COMMAND_TYPE_GFXPIPE = 0x3,
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} COMMAND_TYPE;
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typedef enum tagSIMD_SIZE {
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SIMD_SIZE_SIMD8 = 0x0,
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SIMD_SIZE_SIMD16 = 0x1,
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SIMD_SIZE_SIMD32 = 0x2,
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} SIMD_SIZE;
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inline void init() {
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memset(&TheStructure, 0, sizeof(TheStructure));
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TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N;
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TheStructure.Common.Subopcode = SUBOPCODE_GPGPU_WALKER_SUBOP;
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TheStructure.Common.MediaCommandOpcode = MEDIA_COMMAND_OPCODE_GPGPU_WALKER;
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TheStructure.Common.Pipeline = PIPELINE_MEDIA;
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TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE;
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TheStructure.Common.SimdSize = SIMD_SIZE_SIMD8;
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}
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static tagGPGPU_WALKER sInit() {
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GPGPU_WALKER state;
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state.init();
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return state;
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}
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inline uint32_t &getRawData(const uint32_t index) {
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return TheStructure.RawData[index];
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}
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inline void setPredicateEnable(const bool value) {
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TheStructure.Common.PredicateEnable = value;
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}
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inline bool getPredicateEnable() const {
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return TheStructure.Common.PredicateEnable;
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}
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inline void setIndirectParameterEnable(const bool value) {
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TheStructure.Common.IndirectParameterEnable = value;
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}
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inline bool getIndirectParameterEnable() const {
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return TheStructure.Common.IndirectParameterEnable;
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}
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inline void setInterfaceDescriptorOffset(const uint32_t value) {
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TheStructure.Common.InterfaceDescriptorOffset = value;
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}
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inline uint32_t getInterfaceDescriptorOffset() const {
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return TheStructure.Common.InterfaceDescriptorOffset;
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}
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inline void setIndirectDataLength(const uint32_t value) {
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TheStructure.Common.IndirectDataLength = value;
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}
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inline uint32_t getIndirectDataLength() const {
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return TheStructure.Common.IndirectDataLength;
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}
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typedef enum tagINDIRECTDATASTARTADDRESS {
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INDIRECTDATASTARTADDRESS_BIT_SHIFT = 0x6,
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INDIRECTDATASTARTADDRESS_ALIGN_SIZE = 0x40,
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} INDIRECTDATASTARTADDRESS;
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inline void setIndirectDataStartAddress(const uint32_t value) {
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TheStructure.Common.IndirectDataStartAddress = value >> INDIRECTDATASTARTADDRESS_BIT_SHIFT;
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}
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inline uint32_t getIndirectDataStartAddress() const {
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return TheStructure.Common.IndirectDataStartAddress << INDIRECTDATASTARTADDRESS_BIT_SHIFT;
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}
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inline void setThreadWidthCounterMaximum(const uint32_t value) {
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TheStructure.Common.ThreadWidthCounterMaximum = value - 1;
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}
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inline uint32_t getThreadWidthCounterMaximum() const {
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return TheStructure.Common.ThreadWidthCounterMaximum + 1;
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}
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inline void setThreadHeightCounterMaximum(const uint32_t value) {
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TheStructure.Common.ThreadHeightCounterMaximum = value - 1;
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}
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inline uint32_t getThreadHeightCounterMaximum() const {
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return TheStructure.Common.ThreadHeightCounterMaximum + 1;
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}
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inline void setThreadDepthCounterMaximum(const uint32_t value) {
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TheStructure.Common.ThreadDepthCounterMaximum = value;
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}
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inline uint32_t getThreadDepthCounterMaximum() const {
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return TheStructure.Common.ThreadDepthCounterMaximum;
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}
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inline void setSimdSize(const SIMD_SIZE value) {
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TheStructure.Common.SimdSize = value;
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}
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inline SIMD_SIZE getSimdSize() const {
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return static_cast<SIMD_SIZE>(TheStructure.Common.SimdSize);
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}
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inline void setThreadGroupIdStartingX(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdStartingX = value;
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}
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inline uint32_t getThreadGroupIdStartingX() const {
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return TheStructure.Common.ThreadGroupIdStartingX;
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}
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inline void setThreadGroupIdXDimension(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdXDimension = value;
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}
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inline uint32_t getThreadGroupIdXDimension() const {
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return TheStructure.Common.ThreadGroupIdXDimension;
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}
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inline void setThreadGroupIdStartingY(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdStartingY = value;
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}
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inline uint32_t getThreadGroupIdStartingY() const {
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return TheStructure.Common.ThreadGroupIdStartingY;
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}
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inline void setThreadGroupIdYDimension(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdYDimension = value;
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}
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inline uint32_t getThreadGroupIdYDimension() const {
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return TheStructure.Common.ThreadGroupIdYDimension;
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}
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inline void setThreadGroupIdStartingResumeZ(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdStartingResumeZ = value;
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}
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inline uint32_t getThreadGroupIdStartingResumeZ() const {
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return TheStructure.Common.ThreadGroupIdStartingResumeZ;
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}
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inline void setThreadGroupIdZDimension(const uint32_t value) {
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TheStructure.Common.ThreadGroupIdZDimension = value;
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}
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inline uint32_t getThreadGroupIdZDimension() const {
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return TheStructure.Common.ThreadGroupIdZDimension;
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}
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inline void setRightExecutionMask(const uint32_t value) {
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TheStructure.Common.RightExecutionMask = value;
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}
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inline uint32_t getRightExecutionMask() const {
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return TheStructure.Common.RightExecutionMask;
|
||||
}
|
||||
inline void setBottomExecutionMask(const uint32_t value) {
|
||||
TheStructure.Common.BottomExecutionMask = value;
|
||||
}
|
||||
inline uint32_t getBottomExecutionMask() const {
|
||||
return TheStructure.Common.BottomExecutionMask;
|
||||
}
|
||||
|
||||
using InterfaceDescriptorType = INTERFACE_DESCRIPTOR_DATA; // patched
|
||||
|
||||
} GPGPU_WALKER;
|
||||
STATIC_ASSERT(60 == sizeof(GPGPU_WALKER));
|
||||
|
||||
typedef struct tagMEDIA_INTERFACE_DESCRIPTOR_LOAD {
|
||||
union tagTheStructure {
|
||||
struct tagCommon {
|
||||
|
||||
Reference in New Issue
Block a user