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build: enable xehpc, xe2hpg, xe3core aub runners

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Signed-off-by: Jakub Nowacki <jakub.nowacki@intel.com>
This commit is contained in:
Jakub Nowacki
2025-03-19 12:24:57 +00:00
committed by Compute-Runtime-Automation
parent 35eae3f977
commit e0defcffaa
12 changed files with 117 additions and 2 deletions
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15
level_zero/core/test/common/test_modules/CMakeLists.txt
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@@ -9,6 +9,8 @@ include(gen_kernel.cmake)
add_custom_target(prepare_test_kernels_for_l0)
set_target_properties(prepare_test_kernels_for_l0 PROPERTIES FOLDER ${TARGET_NAME_L0})
set(GRF_SIZES 32 64 96 128 160 192 256)
set(TEST_MODULES
${CMAKE_CURRENT_SOURCE_DIR}/test_kernel.cl
${CMAKE_CURRENT_SOURCE_DIR}/simple_spill_fill_kernel.cl
@@ -22,11 +24,22 @@ set(TEST_KERNEL_BINDLESS
${CMAKE_CURRENT_SOURCE_DIR}/stateful_copy_buffer.cl
)
set(TEST_KERNEL_VRT
${CMAKE_CURRENT_SOURCE_DIR}/kernel_variable_register_per_thread.cl
)
macro(macro_for_each_platform)
foreach(REVISION_CONFIG ${${PLATFORM_IT}_${CORE_TYPE}_REVISIONS})
parse_revision_config(${REVISION_CONFIG} ${PLATFORM_IT_LOWER} DEVICE_ID REVISION_ID)
level_zero_generate_kernels(l0_test_kernel_outputs ${PLATFORM_IT_LOWER} ${DEVICE_ID} ${REVISION_ID} "-g" ${TEST_MODULES})
if("${CORE_TYPE_LOWER}" STREQUAL "xe3_core")
foreach(GRF_SIZE ${GRF_SIZES})
set(INTERNAL_OPTIONS "-cl-intel-exp-register-file-size ${GRF_SIZE}")
level_zero_generate_kernels_with_internal_options(l0_vrt_test_kernel_outputs ${PLATFORM_IT_LOWER} "grf_${GRF_SIZE}" ${DEVICE_ID} ${REVISION_ID} "-g" "${INTERNAL_OPTIONS}" ${TEST_KERNEL_VRT})
endforeach()
endif()
#skip Gen8 bindless kernel generation
if(NOT ("${CORE_TYPE_LOWER}" STREQUAL "gen8"))
level_zero_generate_kernels_with_internal_options(l0_bindless_test_kernel_outputs ${PLATFORM_IT_LOWER} "bindless" ${DEVICE_ID} ${REVISION_ID} "-g" ${TEST_KERNEL_BINDLESS_internal_options} ${TEST_KERNEL_BINDLESS})
@@ -40,7 +53,7 @@ endmacro()
set(PREVIOUS_KERNELS)
apply_macro_for_each_core_type("TESTED")
add_custom_target(l0_common_test_kernels DEPENDS ${l0_test_kernel_outputs} ${l0_bindless_test_kernel_outputs} copy_compiler_files)
add_custom_target(l0_common_test_kernels DEPENDS ${l0_test_kernel_outputs} ${l0_bindless_test_kernel_outputs} ${l0_vrt_test_kernel_outputs} copy_compiler_files)
set_target_properties(l0_common_test_kernels PROPERTIES FOLDER ${TARGET_NAME_L0})
add_dependencies(prepare_test_kernels_for_l0 l0_common_test_kernels)

12
level_zero/core/test/common/test_modules/kernel_variable_register_per_thread.cl Normal file
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@@ -0,0 +1,12 @@
/*
* Copyright (C) 2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
__kernel void kernelVariableRegisterPerThread(__global unsigned int *input,
__global unsigned int *output) {
int id = (int)get_global_id(0);
output[id] = input[id] + 1;
}

2
manifests/manifest.yml
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@@ -41,7 +41,7 @@ components:
dest_dir: kernels_bin
type: git
branch: kernels_bin
revision: 3361-3845
revision: 3361-3854
kmdaf:
branch: kmdaf
dest_dir: kmdaf

14
opencl/test/unit_test/test_files/system_memfence.xe_hpc_core Normal file
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@@ -0,0 +1,14 @@
/*
* Copyright (C) 2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
void system_memfence(char fence_typed_memory);
__kernel void SystemMemFence(__global unsigned int *src, __global unsigned int *dst) {
int id = (int)get_global_id(0);
dst[id] = src[id];
system_memfence(0);
}

9
target_aub_tests/xe2_hpg_core/CMakeLists.txt Normal file
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@@ -0,0 +1,9 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_XE2_HPG_CORE)
add_subdirectories()
endif()

10
target_aub_tests/xe2_hpg_core/bmg/CMakeLists.txt Normal file
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@@ -0,0 +1,10 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_BMG AND "${NEO_BITS}" STREQUAL "64")
set(aub_test_config ${BMG_CONFIG_STR})
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
endif()

10
target_aub_tests/xe2_hpg_core/lnl/CMakeLists.txt Normal file
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@@ -0,0 +1,10 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_LNL AND "${NEO_BITS}" STREQUAL "64")
set(aub_test_config ${LNL_CONFIG_STR})
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
endif()

9
target_aub_tests/xe3_core/CMakeLists.txt Normal file
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@@ -0,0 +1,9 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_XE3_CORE)
add_subdirectories()
endif()

10
target_aub_tests/xe3_core/ptl/CMakeLists.txt Normal file
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@@ -0,0 +1,10 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_PTL AND "${NEO_BITS}" STREQUAL "64")
set(aub_test_config ${PTL_CONFIG_STR})
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
endif()

9
target_aub_tests/xe_hpc_core/CMakeLists.txt Normal file
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@@ -0,0 +1,9 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_XE_HPC_CORE)
add_subdirectories()
endif()

10
target_aub_tests/xe_hpc_core/pvc/3/CMakeLists.txt Normal file
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@@ -0,0 +1,10 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_PVC AND "${NEO_BITS}" STREQUAL "64")
set(aub_test_config ${PVC_CONFIG_STR})
include(${NEO_SOURCE_DIR}/cmake/run_aub_test_target.cmake)
endif()

9
target_aub_tests/xe_hpc_core/pvc/CMakeLists.txt Normal file
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@@ -0,0 +1,9 @@
#
# Copyright (C) 2025 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
if(TESTS_PVC AND "${NEO_BITS}" STREQUAL "64")
add_subdirectories()
endif()