intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2026-01-05 17:41:26 +08:00
Code Issues Packages Projects Releases Wiki Activity

Unify core and product commandList structures

Browse Source 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
This commit is contained in:
Maciej Plewka
2021-12-28 17:07:39 +00:00
committed by Compute-Runtime-Automation
parent 4d165f4747
commit e39a09e6db
19 changed files with 187 additions and 129 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
level_zero/core/source/gen11/CMakeLists.txt
View File

@@ -1,5 +1,5 @@
#
# Copyright (C) 2020-2021 Intel Corporation
# Copyright (C) 2020-2022 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@@ -7,6 +7,8 @@
if(SUPPORT_GEN11)
set(HW_SOURCES_GEN11
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_gen11.cpp
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_gen11.h
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_gen11.inl
${CMAKE_CURRENT_SOURCE_DIR}/debugger_gen11.cpp
${CMAKE_CURRENT_SOURCE_DIR}/enable_family_full_l0_gen11.cpp

23
level_zero/core/source/gen11/cmdlist_gen11.cpp Normal file
View File

@@ -0,0 +1,23 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "level_zero/core/source/gen11/cmdlist_gen11.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "cmdlist_extended.inl"
namespace L0 {
template struct CommandListCoreFamily<IGFX_GEN11_CORE>;
template struct CommandListCoreFamilyImmediate<IGFX_GEN11_CORE>;
} // namespace L0

22
level_zero/core/source/gen11/cmdlist_gen11.h Normal file
View File

@@ -0,0 +1,22 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
namespace L0 {
template <PRODUCT_FAMILY productFamily>
struct CommandListProductFamily : public CommandListCoreFamily<IGFX_GEN11_CORE> {
using CommandListCoreFamily::CommandListCoreFamily;
};
template <PRODUCT_FAMILY gfxProductFamily>
struct CommandListImmediateProductFamily : public CommandListCoreFamilyImmediate<IGFX_GEN11_CORE> {
using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
};
} // namespace L0

4
level_zero/core/source/gen11/cmdlist_gen11.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -7,6 +7,8 @@
#include "shared/source/helpers/pipe_control_args.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
namespace L0 {
template <GFXCORE_FAMILY gfxCoreFamily>

27
level_zero/core/source/gen11/icllp/cmdlist_icllp.cpp
View File

@@ -1,39 +1,16 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen11/hw_cmds.h"
#include "shared/source/gen11/hw_info.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/gen11/cmdlist_gen11.inl"
#include "cmdlist_extended.inl"
#include "igfxfmid.h"
#include "level_zero/core/source/gen11/cmdlist_gen11.h"
namespace L0 {
template struct CommandListCoreFamily<IGFX_GEN11_CORE>;
template struct CommandListCoreFamilyImmediate<IGFX_GEN11_CORE>;
template <>
struct CommandListProductFamily<IGFX_ICELAKE_LP> : public CommandListCoreFamily<IGFX_GEN11_CORE> {
using CommandListCoreFamily::CommandListCoreFamily;
};
static CommandListPopulateFactory<IGFX_ICELAKE_LP, CommandListProductFamily<IGFX_ICELAKE_LP>>
populateICLLP;
template <>
struct CommandListImmediateProductFamily<IGFX_ICELAKE_LP> : public CommandListCoreFamilyImmediate<IGFX_GEN11_CORE> {
using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
};
static CommandListImmediatePopulateFactory<IGFX_ICELAKE_LP, CommandListImmediateProductFamily<IGFX_ICELAKE_LP>>
populateICLLPImmediate;

4
level_zero/core/source/gen9/CMakeLists.txt
View File

@@ -1,5 +1,5 @@
#
# Copyright (C) 2020-2021 Intel Corporation
# Copyright (C) 2020-2022 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@@ -7,6 +7,8 @@
if(SUPPORT_GEN9)
set(HW_SOURCES_GEN9
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_gen9.cpp
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_gen9.h
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_gen9.inl
${CMAKE_CURRENT_SOURCE_DIR}/debugger_gen9.cpp
${CMAKE_CURRENT_SOURCE_DIR}/enable_family_full_l0_gen9.cpp

12
level_zero/core/source/gen9/cfl/cmdlist_cfl.cpp
View File

@@ -1,21 +1,11 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen9/hw_cmds.h"
#include "shared/source/gen9/hw_info.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/gen9/cmdlist_gen9.h"
#include "level_zero/core/source/gen9/cmdlist_gen9.inl"
#include "cmdlist_extended.inl"
#include "igfxfmid.h"
namespace L0 {

21
level_zero/core/source/gen9/cmdlist_gen9.cpp Normal file
View File

@@ -0,0 +1,21 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "level_zero/core/source/gen9/cmdlist_gen9.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "cmdlist_extended.inl"
namespace L0 {
template struct CommandListCoreFamily<IGFX_GEN9_CORE>;
template struct CommandListCoreFamilyImmediate<IGFX_GEN9_CORE>;
} // namespace L0

6
level_zero/core/source/gen9/cmdlist_gen9.inl
View File

@@ -1,5 +1,5 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -14,10 +14,6 @@
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
namespace L0 {
template struct CommandListCoreFamily<IGFX_GEN9_CORE>;
template struct CommandListCoreFamilyImmediate<IGFX_GEN9_CORE>;
template <GFXCORE_FAMILY gfxCoreFamily>
void CommandListCoreFamily<gfxCoreFamily>::applyMemoryRangesBarrier(uint32_t numRanges,
const size_t *pRangeSizes,

12
level_zero/core/source/gen9/kbl/cmdlist_kbl.cpp
View File

@@ -1,21 +1,11 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen9/hw_cmds.h"
#include "shared/source/gen9/hw_info.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/gen9/cmdlist_gen9.h"
#include "level_zero/core/source/gen9/cmdlist_gen9.inl"
#include "cmdlist_extended.inl"
#include "igfxfmid.h"
namespace L0 {
static CommandListPopulateFactory<IGFX_KABYLAKE, CommandListProductFamily<IGFX_KABYLAKE>>

15
level_zero/core/source/gen9/skl/cmdlist_skl.cpp
View File

@@ -1,25 +1,16 @@
/*
* Copyright (C) 2020-2021 Intel Corporation
* Copyright (C) 2020-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "shared/source/gen9/hw_cmds.h"
#include "shared/source/gen9/hw_info.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_base.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/gen9/cmdlist_gen9.h"
#include "level_zero/core/source/gen9/cmdlist_gen9.inl"
#include "cmdlist_extended.inl"
#include "igfxfmid.h"
namespace L0 {
static CommandListPopulateFactory<IGFX_SKYLAKE, CommandListProductFamily<IGFX_SKYLAKE>> populateSKL;
static CommandListPopulateFactory<IGFX_SKYLAKE, CommandListProductFamily<IGFX_SKYLAKE>>
populateSKL;
static CommandListImmediatePopulateFactory<IGFX_SKYLAKE, CommandListImmediateProductFamily<IGFX_SKYLAKE>>
populateSKLImmediate;

4
level_zero/core/source/xe_hp_core/CMakeLists.txt
View File

@@ -1,5 +1,5 @@
#
# Copyright (C) 2021 Intel Corporation
# Copyright (C) 2021-2022 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@@ -7,6 +7,8 @@
if(SUPPORT_XE_HP_CORE)
set(HW_SOURCES_XE_HP_CORE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe_hp_core.cpp
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe_hp_core.h
${CMAKE_CURRENT_SOURCE_DIR}/debugger_xe_hp_core.cpp
${CMAKE_CURRENT_SOURCE_DIR}/image_xe_hp_core.inl
${CMAKE_CURRENT_SOURCE_DIR}/sampler_xe_hp_core.inl

26
level_zero/core/source/xe_hp_core/cmdlist_xe_hp_core.cpp Normal file
View File

@@ -0,0 +1,26 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl"
#include "cmdlist_extended.inl"
namespace L0 {
template <>
void CommandListCoreFamily<IGFX_XE_HP_CORE>::clearComputeModePropertiesIfNeeded(bool requiresCoherency, uint32_t numGrfRequired, uint32_t threadArbitrationPolicy) {
finalStreamState.stateComputeMode = {};
finalStreamState.stateComputeMode.setProperties(requiresCoherency, numGrfRequired, threadArbitrationPolicy);
}
template struct CommandListCoreFamily<IGFX_XE_HP_CORE>;
template struct CommandListCoreFamilyImmediate<IGFX_XE_HP_CORE>;
} // namespace L0

22
level_zero/core/source/xe_hp_core/cmdlist_xe_hp_core.h Normal file
View File

@@ -0,0 +1,22 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
namespace L0 {
template <PRODUCT_FAMILY productFamily>
struct CommandListProductFamily : public CommandListCoreFamily<IGFX_XE_HP_CORE> {
using CommandListCoreFamily::CommandListCoreFamily;
};
template <PRODUCT_FAMILY gfxProductFamily>
struct CommandListImmediateProductFamily : public CommandListCoreFamilyImmediate<IGFX_XE_HP_CORE> {
using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
};
} // namespace L0

27
level_zero/core/source/xe_hp_core/xehp/cmdlist_xehp.cpp
View File

@@ -1,39 +1,16 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl"
#include "cmdlist_extended.inl"
#include "level_zero/core/source/xe_hp_core/cmdlist_xe_hp_core.h"
namespace L0 {
template <>
void CommandListCoreFamily<IGFX_XE_HP_CORE>::clearComputeModePropertiesIfNeeded(bool requiresCoherency, uint32_t numGrfRequired, uint32_t threadArbitrationPolicy) {
finalStreamState.stateComputeMode = {};
finalStreamState.stateComputeMode.setProperties(requiresCoherency, numGrfRequired, threadArbitrationPolicy);
}
template struct CommandListCoreFamily<IGFX_XE_HP_CORE>;
template <>
struct CommandListProductFamily<IGFX_XE_HP_SDV> : public CommandListCoreFamily<IGFX_XE_HP_CORE> {
using CommandListCoreFamily::CommandListCoreFamily;
};
static CommandListPopulateFactory<IGFX_XE_HP_SDV, CommandListProductFamily<IGFX_XE_HP_SDV>>
populateXEHP;
template <>
struct CommandListImmediateProductFamily<IGFX_XE_HP_SDV> : public CommandListCoreFamilyImmediate<IGFX_XE_HP_CORE> {
using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
};
static CommandListImmediatePopulateFactory<IGFX_XE_HP_SDV, CommandListImmediateProductFamily<IGFX_XE_HP_SDV>>
populateXEHPImmediate;

5
level_zero/core/source/xe_hpc_core/CMakeLists.txt
View File

@@ -1,5 +1,5 @@
#
# Copyright (C) 2021 Intel Corporation
# Copyright (C) 2021-2022 Intel Corporation
#
# SPDX-License-Identifier: MIT
#
@@ -7,7 +7,8 @@
if(SUPPORT_XE_HPC_CORE)
set(HW_SOURCES_XE_HPC_CORE
${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe_hpc_core.inl
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe_hpc_core.cpp
${CMAKE_CURRENT_SOURCE_DIR}/cmdlist_xe_hpc_core.h
${CMAKE_CURRENT_SOURCE_DIR}/debugger_xe_hpc_core.cpp
${CMAKE_CURRENT_SOURCE_DIR}/enable_family_full_l0_xe_hpc_core.cpp
${CMAKE_CURRENT_SOURCE_DIR}/l0_hw_helper_xe_hpc_core.cpp

26
level_zero/core/source/xe_hpc_core/cmdlist_xe_hpc_core.inl → level_zero/core/source/xe_hpc_core/cmdlist_xe_hpc_core.cpp
View File

@@ -1,14 +1,19 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2021-2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl"
#include "cmdlist_extended.inl"
namespace L0 {
template <>
NEO::PipeControlArgs CommandListCoreFamily<IGFX_XE_HPC_CORE>::createBarrierFlags() {
NEO::PipeControlArgs args;
@@ -46,4 +51,21 @@ ze_result_t CommandListCoreFamily<IGFX_XE_HPC_CORE>::appendMemoryPrefetch(const
return ZE_RESULT_SUCCESS;
}
template <>
void CommandListCoreFamily<IGFX_XE_HPC_CORE>::applyMemoryRangesBarrier(uint32_t numRanges,
const size_t *pRangeSizes,
const void **pRanges) {
increaseCommandStreamSpace(NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForSinglePipeControl());
NEO::PipeControlArgs args;
args.hdcPipelineFlush = true;
args.unTypedDataPortCacheFlush = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
template struct CommandListCoreFamily<IGFX_XE_HPC_CORE>;
template struct CommandListCoreFamilyImmediate<IGFX_XE_HPC_CORE>;
} // namespace L0

22
level_zero/core/source/xe_hpc_core/cmdlist_xe_hpc_core.h Normal file
View File

@@ -0,0 +1,22 @@
/*
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "level_zero/core/source/cmdlist/cmdlist_hw.h"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.h"
namespace L0 {
template <PRODUCT_FAMILY productFamily>
struct CommandListProductFamily : public CommandListCoreFamily<IGFX_XE_HPC_CORE> {
using CommandListCoreFamily::CommandListCoreFamily;
};
template <PRODUCT_FAMILY gfxProductFamily>
struct CommandListImmediateProductFamily : public CommandListCoreFamilyImmediate<IGFX_XE_HPC_CORE> {
using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
};
} // namespace L0

34
level_zero/core/source/xe_hpc_core/pvc/cmdlist_pvc.cpp
View File

@@ -1,46 +1,16 @@
/*
* Copyright (C) 2021 Intel Corporation
* Copyright (C) 2022 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#include "level_zero/core/source/cmdlist/cmdlist_hw.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_immediate.inl"
#include "level_zero/core/source/cmdlist/cmdlist_hw_xehp_and_later.inl"
#include "level_zero/core/source/xe_hpc_core/cmdlist_xe_hpc_core.inl"
#include "cmdlist_extended.inl"
#include "level_zero/core/source/xe_hpc_core/cmdlist_xe_hpc_core.h"
namespace L0 {
template <>
void CommandListCoreFamily<IGFX_XE_HPC_CORE>::applyMemoryRangesBarrier(uint32_t numRanges,
const size_t *pRangeSizes,
const void **pRanges) {
increaseCommandStreamSpace(NEO::MemorySynchronizationCommands<GfxFamily>::getSizeForSinglePipeControl());
NEO::PipeControlArgs args;
args.hdcPipelineFlush = true;
args.unTypedDataPortCacheFlush = true;
NEO::MemorySynchronizationCommands<GfxFamily>::addPipeControl(*commandContainer.getCommandStream(), args);
}
template struct CommandListCoreFamily<IGFX_XE_HPC_CORE>;
template <>
struct CommandListProductFamily<IGFX_PVC> : public CommandListCoreFamily<IGFX_XE_HPC_CORE> {
using CommandListCoreFamily::CommandListCoreFamily;
};
static CommandListPopulateFactory<IGFX_PVC, CommandListProductFamily<IGFX_PVC>>
populatePVC;
template <>
struct CommandListImmediateProductFamily<IGFX_PVC> : public CommandListCoreFamilyImmediate<IGFX_XE_HPC_CORE> {
using CommandListCoreFamilyImmediate::CommandListCoreFamilyImmediate;
};
static CommandListImmediatePopulateFactory<IGFX_PVC, CommandListImmediateProductFamily<IGFX_PVC>>
populatePVCImmediate;
} // namespace L0