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fix: BCS MMIO programming
When remap is enabled, we must set different base offset for copy engines. Copy engines must use BCS0 base. Related-To: NEO-10678 Signed-off-by: Andrzej Koska <andrzej.koska@intel.com>
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Compute-Runtime-Automation
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4fd219cdbb
commit
e44c7f2627
@@ -18,6 +18,7 @@ inline bool GfxCoreHelperHw<GfxFamily>::isFusedEuDispatchEnabled(const HardwareI
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template <typename GfxFamily>
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void *LriHelper<GfxFamily>::program(MI_LOAD_REGISTER_IMM *lriCmd, uint32_t address, uint32_t value, bool remap, bool isBcs) {
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MI_LOAD_REGISTER_IMM cmd = GfxFamily::cmdInitLoadRegisterImm;
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address += (isBcs && remap) ? RegisterOffsets::bcs0Base : 0x0;
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cmd.setRegisterOffset(address);
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cmd.setDataDword(value);
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@@ -24,6 +24,7 @@ inline bool GfxCoreHelperHw<GfxFamily>::isFusedEuDispatchEnabled(const HardwareI
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template <typename GfxFamily>
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void *LriHelper<GfxFamily>::program(MI_LOAD_REGISTER_IMM *lriCmd, uint32_t address, uint32_t value, bool remap, bool isBcs) {
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MI_LOAD_REGISTER_IMM cmd = Family::cmdInitLoadRegisterImm;
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address += (isBcs && remap) ? RegisterOffsets::bcs0Base : 0x0;
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cmd.setRegisterOffset(address);
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cmd.setDataDword(value);
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cmd.setMmioRemapEnable(remap);
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@@ -40,6 +40,7 @@ inline constexpr uint32_t csGprR11 = 0x2658;
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inline constexpr uint32_t csGprR12 = 0x2660;
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inline constexpr uint32_t csGprR13 = 0x2668;
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inline constexpr uint32_t csGprR14 = 0x2670;
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inline constexpr uint32_t bcs0Base = 0x20000;
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inline constexpr uint32_t csPredicateResult = 0x2418;
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inline constexpr uint32_t csPredicateResult2 = 0x23BC;
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