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https://github.com/intel/compute-runtime.git
synced 2025-12-18 13:54:58 +08:00
refactor: use indirectDataAlignment from gen cmds
Related-To: NEO-10641 Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
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Compute-Runtime-Automation
parent
66d4d141e1
commit
fbc29bb43d
@@ -76,7 +76,7 @@ size_t HardwareCommandsHelper<GfxFamily>::getSizeRequiredIOH(const Kernel &kerne
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if (pImplicitArgs) {
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size += ImplicitArgsHelper::getSizeForImplicitArgsPatching(pImplicitArgs, kernelDescriptor, isHwLocalIdGeneration, rootDeviceEnvironment);
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}
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return alignUp(size, DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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return alignUp(size, GfxFamily::indirectDataAlignment);
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}
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template <typename GfxFamily>
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@@ -662,7 +662,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenAutoLocal
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EXPECT_EQ(1u, walker->getGenerateLocalId());
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EXPECT_EQ(1u, walker->getEmitLocalId());
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uint32_t expectedIndirectDataLength = alignUp(kernel->mockKernel->getCrossThreadDataSize(), DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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uint32_t expectedIndirectDataLength = alignUp(kernel->mockKernel->getCrossThreadDataSize(), FamilyType::indirectDataAlignment);
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EXPECT_EQ(expectedIndirectDataLength, walker->getIndirectDataLength());
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INTERFACE_DESCRIPTOR_DATA &idd = walker->getInterfaceDescriptor();
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@@ -732,7 +732,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenPassInlin
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sizePerThreadData = std::max(sizePerThreadData, sizeGrf);
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size_t perThreadTotalDataSize = getThreadsPerWG(simd, static_cast<uint32_t>(lws[0])) * sizePerThreadData;
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uint32_t expectedIndirectDataLength = alignUp(static_cast<uint32_t>(perThreadTotalDataSize), DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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uint32_t expectedIndirectDataLength = alignUp(static_cast<uint32_t>(perThreadTotalDataSize), FamilyType::indirectDataAlignment);
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EXPECT_EQ(expectedIndirectDataLength, walker->getIndirectDataLength());
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INTERFACE_DESCRIPTOR_DATA &idd = walker->getInterfaceDescriptor();
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@@ -840,7 +840,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenPassInlin
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// second GRF in indirect
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uint32_t expectedIndirectDataLength = sizePerThreadData + crossThreadDataSize;
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expectedIndirectDataLength = alignUp(expectedIndirectDataLength, DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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expectedIndirectDataLength = alignUp(expectedIndirectDataLength, FamilyType::indirectDataAlignment);
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EXPECT_EQ(expectedIndirectDataLength, walker->getIndirectDataLength());
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memoryManager->freeGraphicsMemory(kernel->kernelInfo.kernelAllocation);
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@@ -883,7 +883,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenKernelWit
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size_t perThreadTotalDataSize = 0U;
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uint32_t expectedIndirectDataLength = static_cast<uint32_t>(perThreadTotalDataSize);
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expectedIndirectDataLength = alignUp(expectedIndirectDataLength, DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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expectedIndirectDataLength = alignUp(expectedIndirectDataLength, FamilyType::indirectDataAlignment);
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EXPECT_EQ(expectedIndirectDataLength, walker->getIndirectDataLength());
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memoryManager->freeGraphicsMemory(kernel->kernelInfo.kernelAllocation);
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@@ -931,7 +931,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, XeHPAndLaterDispatchWalkerBasicTest, givenPassInlin
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// second GRF in indirect
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uint32_t expectedIndirectDataLength = static_cast<uint32_t>(perThreadTotalDataSize + sizeof(INLINE_DATA));
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expectedIndirectDataLength = alignUp(expectedIndirectDataLength, DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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expectedIndirectDataLength = alignUp(expectedIndirectDataLength, FamilyType::indirectDataAlignment);
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EXPECT_EQ(expectedIndirectDataLength, walker->getIndirectDataLength());
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memoryManager->freeGraphicsMemory(kernel->kernelInfo.kernelAllocation);
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@@ -102,7 +102,7 @@ HWTEST_F(GetSizeRequiredBufferTest, WhenFillingBufferThenHeapsAndCommandBufferCo
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auto expectedSizeIOH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredIOH(multiDispatchInfo);
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auto expectedSizeSSH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredSSH(multiDispatchInfo);
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EXPECT_EQ(0u, expectedSizeIOH % GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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EXPECT_EQ(0u, expectedSizeIOH % FamilyType::indirectDataAlignment);
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EXPECT_EQ(0u, expectedSizeDSH % 64);
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// Since each enqueue* may flush, we may see a MI_BATCH_BUFFER_END appended.
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@@ -155,7 +155,7 @@ HWTEST_F(GetSizeRequiredBufferTest, WhenCopyingBufferThenHeapsAndCommandBufferCo
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auto expectedSizeIOH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredIOH(multiDispatchInfo);
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auto expectedSizeSSH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredSSH(multiDispatchInfo);
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EXPECT_EQ(0u, expectedSizeIOH % GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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EXPECT_EQ(0u, expectedSizeIOH % FamilyType::indirectDataAlignment);
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EXPECT_EQ(0u, expectedSizeDSH % 64);
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// Since each enqueue* may flush, we may see a MI_BATCH_BUFFER_END appended.
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@@ -209,7 +209,7 @@ HWTEST_F(GetSizeRequiredBufferTest, WhenReadingBufferNonBlockingThenHeapsAndComm
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auto expectedSizeIOH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredIOH(multiDispatchInfo);
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auto expectedSizeSSH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredSSH(multiDispatchInfo);
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EXPECT_EQ(0u, expectedSizeIOH % GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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EXPECT_EQ(0u, expectedSizeIOH % FamilyType::indirectDataAlignment);
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EXPECT_EQ(0u, expectedSizeDSH % 64);
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// Since each enqueue* may flush, we may see a MI_BATCH_BUFFER_END appended.
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@@ -264,7 +264,7 @@ HWTEST_F(GetSizeRequiredBufferTest, WhenReadingBufferBlockingThenThenHeapsAndCom
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auto expectedSizeIOH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredIOH(multiDispatchInfo);
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auto expectedSizeSSH = HardwareCommandsHelper<FamilyType>::getTotalSizeRequiredSSH(multiDispatchInfo);
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EXPECT_EQ(0u, expectedSizeIOH % GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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EXPECT_EQ(0u, expectedSizeIOH % FamilyType::indirectDataAlignment);
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EXPECT_EQ(0u, expectedSizeDSH % 64);
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// Since each enqueue* may flush, we may see a MI_BATCH_BUFFER_END appended.
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@@ -543,7 +543,7 @@ HWTEST_F(GetSizeRequiredBufferTest, GivenKernelWithSimpleArgWhenEnqueingKernelTh
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auto expectedSizeIOH = HardwareCommandsHelper<FamilyType>::getSizeRequiredIOH(*KernelFixture::pKernel, localWorkSizes, pClDevice->getRootDeviceEnvironment());
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auto expectedSizeSSH = HardwareCommandsHelper<FamilyType>::getSizeRequiredSSH(*KernelFixture::pKernel);
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EXPECT_EQ(0u, expectedSizeIOH % GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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EXPECT_EQ(0u, expectedSizeIOH % FamilyType::indirectDataAlignment);
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EXPECT_EQ(0u, expectedSizeDSH % 64);
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// Since each enqueue* may flush, we may see a MI_BATCH_BUFFER_END appended.
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@@ -244,10 +244,10 @@ void EncodeDispatchKernel<Family>::encode(CommandContainer &container, EncodeDis
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{
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auto heap = container.getIndirectHeap(HeapType::indirectObject);
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UNRECOVERABLE_IF(!heap);
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heap->align(DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE);
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heap->align(Family::indirectDataAlignment);
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void *ptr = nullptr;
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if (args.isKernelDispatchedFromImmediateCmdList) {
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ptr = container.getHeapWithRequiredSizeAndAlignment(HeapType::indirectObject, iohRequiredSize, DefaultWalkerType::INDIRECTDATASTARTADDRESS_ALIGN_SIZE)->getSpace(iohRequiredSize);
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ptr = container.getHeapWithRequiredSizeAndAlignment(HeapType::indirectObject, iohRequiredSize, Family::indirectDataAlignment)->getSpace(iohRequiredSize);
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} else {
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ptr = container.getHeapSpaceAllowGrow(HeapType::indirectObject, iohRequiredSize);
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}
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@@ -133,6 +133,7 @@ struct Gen11Family : public Gen11 {
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static const XY_COLOR_BLT cmdInitXyColorBlt;
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static constexpr bool isQwordInOrderCounter = false;
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static constexpr bool walkerPostSyncSupport = false;
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static constexpr size_t indirectDataAlignment = GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
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static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
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return cmdSetBaseFamily == IGFX_GEN8_CORE;
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@@ -134,6 +134,7 @@ struct Gen12LpFamily : public Gen12Lp {
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static const XY_FAST_COLOR_BLT cmdInitXyColorBlt;
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static constexpr bool isQwordInOrderCounter = false;
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static constexpr bool walkerPostSyncSupport = false;
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static constexpr size_t indirectDataAlignment = GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
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static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
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return cmdSetBaseFamily == IGFX_GEN8_CORE;
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@@ -133,6 +133,7 @@ struct Gen8Family : public Gen8 {
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static const XY_COLOR_BLT cmdInitXyColorBlt;
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static constexpr bool isQwordInOrderCounter = false;
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static constexpr bool walkerPostSyncSupport = false;
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static constexpr size_t indirectDataAlignment = GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
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static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
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return cmdSetBaseFamily == IGFX_GEN8_CORE;
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@@ -133,6 +133,7 @@ struct Gen9Family : public Gen9 {
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static const XY_COLOR_BLT cmdInitXyColorBlt;
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static constexpr bool isQwordInOrderCounter = false;
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static constexpr bool walkerPostSyncSupport = false;
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static constexpr size_t indirectDataAlignment = GPGPU_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
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static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
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return cmdSetBaseFamily == IGFX_GEN8_CORE;
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