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Author SHA1 Message Date
Maciej Dziuban
0b5f810142 Do not print error messages from BinaryEncoder/BinaryDecoder in tests 
Change-Id: I45d339c233f9a45724db8d84bf5c5bd66233dcab
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-29 09:09:38 +01:00
Filip Hazubski
9bbf1daa0e Update CommandStreamReceiver::expectMemory() 
Change-Id: I3362f8beee2430f2bf5ff797ec804448682e41ea
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-29 08:52:02 +01:00
Mateusz Hoppe
916f1b2436 Cleanup linux_dll_tests 3 
- use correct deviceId in tests

Change-Id: Ifa4a0cd0ddd97870fdd5947e6cc71ad75b25cd0b
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-29 08:42:33 +01:00
Maciej Dziuban
fb47117895 Always program surfaceArray for nv12 images 
Change-Id: I14554bbf1bf4a73c392cc5d6bf9bccc32589dd7f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-29 08:35:50 +01:00
Mateusz Hoppe
84d25a9324 Cleanup linux dll tests 2 
- use TESTS_PLATFORM instead of SUPPORT_PLATFORM macros

Change-Id: I00b26c74ae90ee4b649d368ba01ccd2b3b00af3f
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-28 15:38:56 +01:00
Kamil Diedrich
3aee5eb5c2 fix buffer tests 
Change-Id: I98bf5160c4295d616d0f5dcbf4f014704feb653f
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2019-03-28 14:30:14 +01:00
Mateusz Hoppe
da3e483703 Cleanup linux dll tests 
- include headers from absolute paths
- restore changed global state in TearDown()

Change-Id: I81fab71aabc0df9d995928e75611681288951916
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-28 13:19:18 +01:00
Mateusz Jablonski
d4c8791359 Disable cpu access for KERNEL_ISA type 
Change-Id: I630668373ef162eca8f814b34ea014b3e86ea2b8
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-28 11:12:46 +01:00
Artur Harasimiuk
b17265cd3d cpack: install shared library into intel-opencl subfolder 
OpenCL runtime is referenced using ICD loader and path to shared library
is stored in icd file.

Change-Id: If3c2ff4552ee9d7615d3b4aba02d749beabd087e
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2019-03-28 10:12:58 +01:00
Milczarek, Slawomir
9f95e9b704 TBX with AUB dump to call open on aub manager 
Call open on aub manager to open file stream.

Change-Id: Id48ac4b3bdb212db4adc5912bacd28ccb895c9cf
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-27 23:59:57 +01:00
ocldev
4973204ae2 gmmlib revision update 
Change-Id: I026cabdc1cc0df2d3578d0beed3e81f6e37a4428
 2019-03-27 19:28:20 +01:00
Mrozek, Michal
21020d144b Remove some not needed code. 
Change-Id: I67b52bd7793bee05468efc40c76b40426c64d827
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-03-27 18:24:32 +01:00
Jacek Danecki
5124b92a2b Add build on Ubuntu 18.04 with llvm 7 
- Neo is built with clang 7
- IGC components are built using llvm7
- gmmlib is downloaded from launchpad ppa

Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>

https://github.com/intel/compute-runtime/pull/150

Change-Id: I6e7b9bd28088d6ca37ca6c86ccd2273c87e5a404
 2019-03-27 17:38:07 +01:00
Jacek Danecki
f32ced094d Add build with clang 8 on Travis 
Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>

https://github.com/intel/compute-runtime/pull/148

Change-Id: I45cfa45a226cfa8af5b2a9a6876713f7aa918d38
 2019-03-27 17:31:48 +01:00
Jacek Danecki
a0eb780e2a Build Neo components on Arch 
- Build Arch Aur packages (opencl-clang, igc) and then build Neo
- Build opencl-clang, igc without packaging and then build Neo
- Limit number of make jobs to 1 for IGC build

Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>

https://github.com/intel/compute-runtime/pull/146

Change-Id: I7af5ea10fd76fe6906c87d895d7d92853386e2f5
 2019-03-27 17:17:39 +01:00
Piotr Fusik
8cf7cea1e9 Simplify bit operations. 
Change-Id: If1401f32df5ebcb3abf614832152abf029a9c5e6
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-27 17:11:29 +01:00
Filip Hazubski
6d2e92cf20 Fix typo in variable name 
Change-Id: Ic9c4e0af7c886223cfc7dda53aaf49512ecd59f2
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-27 16:55:44 +01:00
Zdunowski, Piotr
74a02adabe Spectre mitigation. 
Change-Id: I70aec73e7c3f6e7bfbc4042142ce8a5ec33e51b6
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-03-27 15:58:38 +01:00
Mrozek, Michal
883a830636 Fix --tbx mode. 
- There was a problem in make non resident function when AUB CSR was not
present in CSR with AUB dump , surfaces were not made not resident
properly
- For subsequent submissions they were not discovered as resources requiring
residency and were not made resident
- update task count can only be called when aub csr is actually present.

Change-Id: I12a4c1c14a8a7ecf63a0b0f8d633d35c4bf15b05
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-03-27 15:44:22 +01:00
Pawel Wilma
af64a54a88 Fail AUB tests execution if AUB file cannot be created 
Change-Id: Id0474cc5c00be90e69d498ec5674089086a82350
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2019-03-27 15:40:48 +01:00
Milczarek, Slawomir
96db96fcb4 Add support for buffer dumps in BIN and TRE format 
Change-Id: Ib7e59fd6812ca6adcb2dfc1defa74008fee17ec9
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-27 13:04:30 +01:00
Kamil Diedrich
4501d985a9 Add buffer compression preference method to the tests 
Change-Id: I7236a534120034f674897d7abcc104de69717310
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2019-03-27 11:28:06 +01:00
Piotr Fusik
d4a0c4852b Move EngineType to aub_stream. 
Change-Id: Ieaa75aaf4aca4487833754eb38ff709adcbf0f11
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-27 10:06:29 +01:00
Mateusz Hoppe
4296588aa9 Use GPU address to compare with SurfaceBaseAddress in ULTs 
- remove redundant casts

Change-Id: I175801869f24be47dc6703b61bf26c0f8a1c77c6
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 20:49:54 +01:00
Maciej Plewka
9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Mateusz Jablonski
31e6005fa3 Move getNumHandles method to GraphicsAllocation class 
Change-Id: Id03e93d1f2558b0c2b740e199e335c8e6f00842a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-26 14:41:40 +01:00
Maciej Dziuban
6cf2a8a53b Fix parameter name 
Change-Id: I310da669db6a1f7b6a3abec35391233a5cf2108c
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-26 13:18:42 +01:00
Mrozek, Michal
c269e97163 Add query for kernel ISA GPU address. 
Change-Id: I70974b4f73b82461eb854e4b8b400887b9977f15
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-03-26 12:54:32 +01:00
Filip Hazubski
cdd46679c8 Add getIntelQueueInfo helper function 
Change-Id: I5daed24c36db8f5da143db8665b4353582dbc94b
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-26 11:31:35 +01:00
Jobczyk, Lukasz
e42e952d21 Reverse logic of creating Memory Manager - part 5 
-Remove a Drm* parameter from the DrmMemoryManager constructor

Change-Id: Idb6faccdbb512691a8b14f86cdd935d1a8374a23
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-26 10:47:03 +01:00
Mateusz Hoppe
047f2bec87 Program correct addresses in EnqueueReadWriteBufferRect scenarios 
- SurfaceBaseAddress should be programmed with aligned address
this was not the case for certain origin and region values
- offset from aligned address added to operationParams

Change-Id: I0742b826dd0b70f0a6dedf436b850734fa015688
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 10:37:46 +01:00
Mateusz Hoppe
5ff521d6b9 Use GPU address in MediaImageSetArgTest 
Change-Id: I22477674c4551a8ec2ee0a46942fa7ec764bad02
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 08:49:49 +01:00
Mateusz Hoppe
c5ddf11e78 Use GPU address in EnqueueCopyBufferToImageTest 
Change-Id: I2724fb9f2cac9222cacfff913e648df1d1531ccd
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-26 08:38:04 +01:00
Mateusz Hoppe
a040e3f008 Use GPU address in image_set_arg_tests.cpp 
- while comparing against SurfaceBaseAddress programmed
in SurfaceState

Change-Id: Ibe1e08beeef34af7c554e4d1ea36d1f4e11cbd04
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2019-03-25 19:30:17 +01:00
Maciej Dziuban
0420c2948f Delete addDcFlushToPipeControl 
Change-Id: Idd1af397a302755484f60e910929c2fe7d52857d
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-25 16:31:32 +01:00
Jobczyk, Lukasz
ee1854bfe8 Reverse logic of creating Memory Manager - part 4 
-Remove a redundant parameter from WddmMemoryManager constructor

Change-Id: Ied9118d136e7d1f3e93b1bb6ce0e29d748bdbe01
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-25 16:14:51 +01:00
Zdunowski, Piotr
14824f1dff Add support for device specific extensions. 
Change-Id: I3ffd125875067b00bc225556c09fbe2d02f11022
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-03-25 16:02:11 +01:00
Maciej Dziuban
11a1b27399 Do not program surfaceArray for images with image_array_size == 1 
Change-Id: I1e0bd7c3ef7b7edea2f19fb4635b18bff513d264
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-25 15:58:38 +01:00
Jobczyk, Lukasz
9ecb3193af Reverse logic of creating Memory Manager - part 3 
-Move a Device::getEnabled64kbPages method's logic
 to the Memory Manager constructor

Change-Id: Ide88898000e5817a79f9a6ad5dfc9d680bec0533
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-25 14:42:16 +01:00
Piotr Fusik
cc13045ddd Move definitions out of engine_node.h. 
Change-Id: I18692a444663c11103f8991415b38000c633f24a
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-25 13:22:55 +01:00
Dunajski, Bartosz
83aa28e294 Add unit test for maxOsContextCount 
Change-Id: I3e2ec2dba101123689248904406dc2fe3785160c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-25 13:19:29 +01:00
Maciej Dziuban
9bd4efbadf Enable dcFlush in addPipeControl 
Change-Id: I429009d8a8b1a5e209b7de7de30d69193fb7ef45
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-25 11:26:49 +01:00
Dunajski, Bartosz
cbe4e06165 Improve waiting for MemObj completion 
Change-Id: I62078224daa21ee1d6f58f1e6dc59e306ae420b6
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-25 10:51:32 +01:00
Dunajski, Bartosz
a8db48dbca Refactor Device::getEngine to get Engine by its type 
Change-Id: I640b32c0d226686e6648d39dd62404f5d507c98f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-03-25 10:49:37 +01:00
Piotr Fusik
6f84496e78 Move duplicate code to the base class. 
Change-Id: I117a6e55fc51bf3ede3a69dbb8a874e71e74ddf9
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-22 13:23:02 +01:00
Zdunowski, Piotr
9dfa1b353a CL_PROGRAM_SOURCE information for SPIR-V program should be null string. 
Change-Id: I73e6d4b6a52cb337cb4f7e7de3264981f5bee9e7
Signed-off-by: Zdunowski, Piotr <piotr.zdunowski@intel.com>
 2019-03-22 12:42:21 +01:00
Maciej Dziuban
33c07c875f Do not insert PipeControl WA or DC Flush when not needed 
Change-Id: I71030273708f243324a566232528bce00a0361df
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-22 12:37:27 +01:00
Mateusz Jablonski
ee9eb8df83 Release all Gmms 
Change-Id: I2227b6a1014fea59053893c9d6330f1c386bbcd2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-03-22 12:19:44 +01:00
Stefanowski, Adam
16aee8cc46 [2/n] Move Hardware Info to Execution Environment 
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-22 10:08:26 +01:00
Liwei Wang
ca4b47f7f4 Add support of GPU preemption (v1.00). 
https://github.com/intel/compute-runtime/pull/119

Change-Id: I3134d62b66751c8621b80002373a7a9b198e044e
 2019-03-22 08:49:11 +01:00