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Author SHA1 Message Date
Mateusz Jablonski
10dbfc0d19 Reduce usage of global gfx core helper getter [3/n] 
Related-To: NEO-6853
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-13 11:13:11 +01:00
nyanmisaka
ac802931b3 Brand string update for Arc platforms 
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
 2022-12-13 09:20:25 +01:00
Dunajski, Bartosz
bcecd069b4 Add additional kernel flag + capability to pull extra patch tokens 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-12-13 09:04:39 +01:00
Mateusz Jablonski
470c6d4660 Extend compiler interface, 
add mocks for Platform version 2
create wrapper to populate IGC platform depending on interface version

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-13 07:53:59 +01:00
Yates, Brandon
66581a0a1d L0 Debug - Avoid SSAH lookup when no threads are stopped 
During async thread event processing, it was possible to
read SSAH before any threads stopped and before it was
resident resulting in an assert. This is both a fix for
assertion and minor optimization.

Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
 2022-12-13 03:07:22 +01:00
ocldev
cc61e2d997 igc revision update 
Signed-off-by: ocldev <ocldev@intel.com>
 2022-12-13 00:29:02 +01:00
Mateusz Jablonski
2cb1a908a0 Add missing includes 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-12 23:18:30 +01:00
Spruit, Neil R
a93b3a321b Update Level Zero to v1.8.12 for multi driver support 
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
 2022-12-12 21:09:47 +01:00
Artur Harasimiuk
55177cbb2a infra update 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-12-12 20:01:26 +01:00
Baj, Tomasz
122338c290 Return 0 from fp64 queries when fp64 is unsupported 
Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
Related-To: NEO-7542
 2022-12-12 19:47:09 +01:00
Jitendra Sharma
391941c447 Sysman: Enhance Scheduler compute unit debug mode implementation 
This change helps in achieving the following:
- Moves the OS specific code from scheduler_imp.cpp to os specific
files.
- Frees any drm resource, including level zero's before enabling/dis
-abling Debug mode. And once Debug mode is toggled, reinitialize of
level zero occurs.
- If current mode is Debug mode and any other mode is requested by user,
then new mode will be made effective by unsetting debug mode.

Related-To: LOCI-866

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2022-12-12 17:58:28 +01:00
Zbigniew Zdanowicz
6a6e17d48a Use shared event pools as default in immediate command list black box test 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-12-12 15:40:15 +01:00
Mateusz Jablonski
ecea487cf0 Reduce usage of global gfx core helper getter [2/n] 
Related-To: NEO-6853
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-12 13:43:21 +01:00
Szymon Morek
ca14e411e4 Disable CPU memcpy for DG2 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-12-12 13:32:25 +01:00
ocldev
ef0923272b dependencies update 
Signed-off-by: ocldev <ocldev@intel.com>
 2022-12-12 13:04:41 +01:00
Mateusz Jablonski
faeb0c878b ULT clang-tidy fix: correct class naming 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-12 09:46:45 +01:00
Compute-Runtime-Validation
c54c3d796c Revert "Set isLockable if size small enough for cpu memcpy" 
This reverts commit 41a80072b9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-12-12 09:24:14 +01:00
Dominik Dabek
8468d6c4b0 Prepare for pool buffer enabling 2/n 
Use correct offset for subBuffer created with clCreateSubBuffer

Make calls to clGetMemObjectInfo for CL_MEM_OFFSET and
CL_MEM_ASSOCIATED_MEMOBJECT return values like with pool buffer disabled

Related-To: NEO-7332

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-12-09 21:58:05 +01:00
Zbigniew Zdanowicz
4fbd2fcc51 Fix issue in signal all event packets 3/n 
Fix in copy only command lists for reset event call.
First fix is to perform reset on all active events.
Second is to add signal all packets call for copy only branch

Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-12-09 21:01:19 +01:00
Mateusz Jablonski
8f308f24e5 Reduce usage of global gfx core helper getter [1/n] 
Related-To: NEO-6853
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-09 17:27:37 +01:00
Szymon Morek
637c4e5621 Disable state caching if used on regular cmd list 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-12-09 16:47:39 +01:00
Szymon Morek
41a80072b9 Set isLockable if size small enough for cpu memcpy 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-12-09 16:33:32 +01:00
Rafal Maziejuk
336c8c10d5 Add adjustHwInfoForIgc support 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-12-09 15:58:54 +01:00
Mateusz Jablonski
fba5e99c48 Add gfx core helper getters to device and command stream receiver 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-09 15:47:02 +01:00
Zbigniew Zdanowicz
0ee5310033 Fix issue with signal all event packets 2/n 
This fix reposition signal commands before possible staling commands
like post sync pipe control or multi tile barrier

Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-12-09 12:11:07 +01:00
Mateusz Jablonski
53399e6b01 ULT fix: use fixed address instead of address from malloc 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-09 11:48:07 +01:00
Tratnack, Geoffrey
d2c218efe3 Add a patch to command encoder for samplers when DSH is dirty. 
Signed-off-by: Tratnack, Geoffrey geoffrey.tratnack@intel.com
Related-To: LOCI-3365
 2022-12-09 11:08:23 +01:00
Kamil Kopryk
03b687881f Rename HwHelper -> GfxCoreHelper 
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-12-09 10:29:06 +01:00
Kamil Diedrich
15b6d94555 Add wddm ult for wsl build [4/n] 
Related-To: NEO-6066
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-12-09 09:53:50 +01:00
ocldev
21a1e51012 igc revision update 
Signed-off-by: ocldev <ocldev@intel.com>
 2022-12-09 09:48:47 +01:00
Aravind Gopalakrishnan
a7e80b4225 Update immediate command list programmers guide 
to specify optimization availability

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-12-09 09:15:15 +01:00
Raiyan Latif
574c9ef06e Fix shared cross device capabilities support 
Require KMD migration support for concurrent & atomic memory
access between multiple devices for shared allocations.

Related-To: LOCI-3457

Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
 2022-12-09 07:36:24 +01:00
Spruit, Neil R
4fce3ede9b Enable NodeMask Generation thru L0 LUID Extension 
Related-To: LOCI-3250

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
 2022-12-09 07:22:36 +01:00
Bari, Pratik
aafe562bce Added Fabric Port ULTs 
Related-To: LOCI-3650

Signed-off-by: Bari, Pratik <pratik.bari@intel.com>
 2022-12-09 07:15:05 +01:00
Jaime Arteaga
675272a32c Return a unique pointer for multiple calls to openIpcHandles 
This to make zexMemOpenIpcHandles and zeMemOpenIpcHandle
behave similarly.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-12-08 21:56:21 +01:00
Compute-Runtime-Validation
d46a9dd347 Revert "Return 0 from fp64 queries when fp64 is unsupported" 
This reverts commit 92df163d8e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-12-08 17:14:02 +01:00
Tratnack, Geoffrey
818db03a68 LOCI-3365: Cleanup MediaInterfaceDescriptorLoad logic in command encoder 
Add a patch to command encoder when DSH is dirty.

Signed-off-by: Tratnack, Geoffrey <geoffrey.tratnack@intel.com>
Related-To: LOCI-3365
 2022-12-08 17:07:53 +01:00
Kamil Diedrich
db24428cd3 Add wddm ult for wsl build [3/n] 
Related-To: NEO-6066
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-12-08 16:50:02 +01:00
Zbigniew Zdanowicz
c1ecba0c4c Fix two issues at signaling all event packets 1/n 
First fix is to calculate remaining packets only when available.
Second fix is to use multi-tile signal when number of remaining packets
does match partition count - this is to resolve subdevice - root device
possible conflicts.

Related-To: NEO-7490

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-12-08 16:28:54 +01:00
Dunajski, Bartosz
61544f13cf RelaxedOrdering: Dont apply optimization for barrier calls 
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-12-08 16:21:16 +01:00
Kamil Kopryk
6993ed5c52 Reduce binaries sizes 2/n 
Observed about 50MB reduction in overall binaries size (directory build))
when building all targets
with MSVC (Visual Studio 2022 17.3.0 preview 6)
using Debug 64 configuration.

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-12-08 16:14:38 +01:00
Mateusz Jablonski
75c0a2f7ee Move preemption helper tests to shared 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-08 16:02:20 +01:00
Kamil Kopryk
1961842601 Disable Zebin on pre-Gen12 platforms with debugger active and spirv 
Related-To: NEO-7328
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-12-08 14:14:47 +01:00
Mateusz Jablonski
b6c51c6793 Add helper method to get support for MidThread preemption for RT kernels 
Move raii hw info config helper to shared

Related-To: NEO-7547, NEO-7548

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-08 13:55:06 +01:00
Szymon Morek
be5a1c3d08 Check for nullptr before make resident 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-12-08 12:55:57 +01:00
Dunajski, Bartosz
3b91cc1b50 Enable RelaxedOrdering for XE_HPC Immediate cmd lists 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>

Related-To: NEO-7458
 2022-12-08 10:12:40 +01:00
Yates, Brandon
43ddabd8e6 L0 Debug - Change interrupt return code to match linux 
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
 2022-12-08 09:42:08 +01:00
Jaime Arteaga
3bf416212b Disable SET_PAIR by default. 
To use, applications need to set EnableSetPair=1 explicitly.

When disabled, implicit scaling allocations require two IPC handles
to be exchanged with other processes using the zexMemGetIpcHandles
APIs.

When enabled, implicit scaling allocations only require one IPC
handle to be exchanged with other process using the zeMemGetIpcHandle
APIs. This is only available when allocation is imported in a different
device than the one in the exporter.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-12-08 01:52:39 +01:00
Mateusz Jablonski
e1900c240e Dont return success when peeking internal handle and no handle is returned 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-12-07 21:39:13 +01:00
Yates, Brandon
668149ab81 [L0 Debug] Add additional log messages to gfxmem r/w 
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
 2022-12-07 21:08:10 +01:00