Commit Graph

1403 Commits

Author SHA1 Message Date
Szymon Morek
f3c9362fc5 fix: check for gpu hang during wait for ring completion
Related-To: NEO-13490

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2025-01-09 18:44:25 +01:00
Semenov Herman (Семенов Герман)
9f07f56f7f performance: align structures for 64-bit platforms
Signed-off-by: Semenov Herman (Семенов Герман) <GermanAizek@yandex.ru>
2025-01-09 06:03:39 +01:00
Dominik Dabek
8d4721d613 performance: update igc indirect detection version
Update required indirect detection versions to 9 for pvc vector compiler
and non-pvc non-vector compiler.

Related-To: NEO-12491

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2025-01-07 13:25:12 +01:00
Mateusz Jablonski
bb1a125f0c feature: add support for Panther Lake platform
Related-To: NEO-12803

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2025-01-07 11:39:56 +01:00
Mateusz Jablonski
c867a5ed5d refactor: remove redundant flag levelZeroSupported
all platforms are supported by L0

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2025-01-03 11:28:11 +01:00
Mateusz Hoppe
c08c9b7f86 refactor: change test to HWTEST
- move Heapful matcher to test macros
- check alignment in patchWithRequiredSize


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-12-31 10:37:37 +01:00
Lukasz Jobczyk
b5f3b0eba9 performance: Signal inOrder counter with pipe control, part 3
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-12-27 11:52:35 +01:00
Lukasz Jobczyk
83ebbb01d3 performance: Add flag to mitigate host visible signal in CB events
Related-To: NEO-13441

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-12-24 12:35:55 +01:00
Vysochyn, Illia
83b7143485 refactor: Standardize DESTINATION_SURFACE_TYPE
Standardizes DESTINATION_SURFACE_TYPE to align with the latest
specification.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
2024-12-23 16:39:25 +01:00
Vysochyn, Illia
2951f8a411 refactor: Update CFE_STATE
Refactors the CFE_STATE to align with the latest specification.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
2024-12-23 14:31:20 +01:00
Maciej Plewka
54e62da553 fix: use release helper to get ftrXe2Compression value
Related-To: NEO-13381, NEO-13526
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-12-23 13:28:06 +01:00
Bartosz Dunajski
b1dea19fbd refactor: move tag initialization to allocator [1/n]
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-12-17 17:53:13 +01:00
Compute-Runtime-Validation
6c5d9a6ed7 Revert "feature: extend TBX page fault manager from CPU implementation"
This reverts commit 51c0e80299.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-12-12 12:30:22 +01:00
Jack Myers
51c0e80299 feature: extend TBX page fault manager from CPU implementation
In TBX mode, the host could not write to host buffers after access from device
code due to the lack of a migration mechanism post-initial TBX upload.
Migration is unnecessary with real hardware, but required for TBX.

This patch introduces a new page fault manager type that extends the original
CPU fault manager, enabling automatic migration of host buffers in TBX mode.

Refactoring was necessary to avoid diamond inheritance, achieved by using a
template parameter as the base class for OS-specific fault managers.

Related-To: NEO-12268
Signed-off-by: Jack Myers <jack.myers@intel.com>
2024-12-11 09:09:50 +01:00
Maciej Bielski
c9726dbb10 refactor: simplify tracking CacheRegion reservations
Leverage features of the mechanism to simplify implementation:
- The maximum number of possible cache-region reservations is a small
value known at compile-time
- Each reservation is unique (described by `CacheRegion`) so can have
a dedicated entry with either zero (free) or non-zero (reserved) value

So, there is no need for a dynamic collection (unordered_map here) to
keep track of reservations. A simple array is enough for that purpose.

Also, add some helper-code to enable array-indexing with the values of
`CacheRegion` enum.

Related-To: NEO-12837
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2024-12-09 16:50:28 +01:00
Vysochyn, Illia
0b7367ed5f refactor: Update STATE_BASE_ADDRESS
Refactors the STATE_BASE_ADDRESS to align with the latest specification.

Removes redundant functionality for multiple GPU partial writes and
atomics.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
2024-12-09 08:50:59 +01:00
Fabian Zwoliński
d2ce3badfc fix: bindlessHeapsHelper handle unavailable external heap
This PR handles the situation in which a component
has reserved a front window space for itself in the external heap,
so that the Compute Runtime cannot access this area.

In such a situation, we perform the following steps:
1. reserve 4GB chunk in heapStandard
2. split our chunk into 2 parts: heapFrontWindow, heapRegular
3. from this point on, map all linearStream allocations in reserved 4GB
chunk

Patch applies to Windows and WSL.
Patch only applies when the bindless global allocator is enabled.

Related-To: HSD-16025889919
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
2024-12-05 14:18:01 +01:00
Dominik Dabek
819ffea90f fix: reenable indirect detection for non-VC, PVC
Issue is limited to detection in VC, can reenable for other kernels.

Related-To: NEO-13372

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-12-04 14:59:02 +01:00
Dominik Dabek
5167f34a8a fix: disable indirect detection, PVC
Related-To: NEO-13372, GSD-10403

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2024-12-03 13:53:47 +01:00
Bartosz Dunajski
0ecbc627bd refactor: remove not used dispatch walk order param
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-12-03 09:58:03 +01:00
Zbigniew Zdanowicz
56b15f17f7 refactor: unify further calculation to get max work group count
- move available device calculcation into common helper
- change interface to have code available where no descriptor is available
- expand unit test for implementation of new inteface

Related-To: NEO-13350

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-11-29 17:51:05 +01:00
Zbigniew Zdanowicz
c5ed6bf73c refactor: split sync buffer and region allocation creation code
- split the allocation code from command list or kernel
- allow to call allocation code in all parts of the driver

Related-To: NEO-13350

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-11-29 11:41:39 +01:00
Bartosz Dunajski
5e1fa75676 refactor: adjust code to compile with c++20
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-11-29 10:27:29 +01:00
Vysochyn, Illia
afd22999cc refactor: Adjust RENDER_SURFACE_STATE structures naming
Performs minor renaming (mostly capitalization) in order to align with
specification.

Renames L1_CACHE_POLICY to L1_CACHE_CONTROL.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
2024-11-29 09:43:11 +01:00
Mateusz Jablonski
fa58073095 refactor: remove not used usings/typedefs/variables
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-11-28 16:19:39 +01:00
Mateusz Jablonski
2039b1c41b refactor: remove not needed code
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-11-28 16:16:30 +01:00
Zbigniew Zdanowicz
6b7235cd6c refactor: change parameter names into more meaningful
- change additional size into local region size
- change walk order into dispatch walk order to distinguish for local id walk

Related-To: NEO-13350

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2024-11-27 16:15:02 +01:00
Maciej Plewka
fccca2dba7 refactor: unify getGpgpuEngineInstances for xe2+
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-11-22 14:45:58 +01:00
Wenbin Lu
47383d752f fix: report correct number of XeCore per Cluster
Related-To: NEO-10060

Signed-off-by: Wenbin Lu <wenbin.lu@intel.com>
2024-11-22 09:40:28 +01:00
Alicja Lukaszewicz
789efc8909 fix: remove number of RT stacks from capability table
Related-To: NEO-10830

Signed-off-by: Alicja Lukaszewicz <alicja.lukaszewicz@intel.com>
2024-11-21 14:46:50 +01:00
Katarzyna Cencelewska
4ad8c17db9 feature: add debug flags for timestamps
PrintCalculatedTimestamps - print ts in level zero paths
PrintTimestampPacketContents - add logging also to level zero paths
ForceUseOnlyGlobalTimestamps - force using a global ts

Related-To: HSD-14023527252
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-11-21 11:28:08 +01:00
Maciej Plewka
62d8e3e4b0 fix: Align thread group count to dss on all platforms
Related-To: NEO-13263, GSD-10327
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-11-18 16:55:20 +01:00
Alicja Lukaszewicz
68dc7fb33b feature: add calculation of stack count for sync RT
Related-To: NEO-10830

Signed-off-by: Alicja Lukaszewicz <alicja.lukaszewicz@intel.com>
2024-11-18 14:52:00 +01:00
Filip Hazubski
8797c326b6 refactor: Move isDummyBlitWaRequired function to release helper
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2024-11-15 13:22:00 +01:00
Mateusz Jablonski
f55ad93baf fix: remove L3 config from release helper
L3 bank count should be queried from KMD
L3 bank size should be queried from device blob

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-11-12 14:28:36 +01:00
Marcel Skierkowski
49d999abe6 fix: remove defaultProfilingTimerResolution from RuntimeCapabilityTable
Related-To: NEO-12275
Signed-off-by: Marcel Skierkowski <marcel.skierkowski@intel.com>
2024-11-04 12:02:11 +01:00
Chodor, Jaroslaw
5f908ce092 feature: adding support for custom compiler backends
This adds abbility to load different versions of the backend
compiler based on underlying device.

Related-To: NEO-12747

Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
2024-10-23 19:55:36 +02:00
Bartosz Dunajski
ff80a02fcb refactor: parse extra zebin params
Related-To: NEO-12591

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-10-21 09:59:33 +02:00
Maciej Plewka
9d6d6e85f1 fix: align thread group to dss size if kernel uses slm
Related-To: NEO-12133
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-10-17 15:30:19 +02:00
Tomasz Biernacik
c982981dde feature: add number of rt stacks to capability table
Related-To: NEO-12138

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
2024-10-17 14:46:19 +02:00
Maciej Plewka
deb27d0363 fix: align thread group count to fit within dss
Related-To: NEO-12133
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2024-10-16 18:34:39 +02:00
Bartosz Dunajski
52e9a6e07f feature: Initial CB events IPC support
Related-To: NEO-11925

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-10-16 13:33:59 +02:00
Compute-Runtime-Validation
2098e64dc1 Revert "feature: adding support for custom compiler backends"
This reverts commit 8098bcc48d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-10-16 02:07:25 +02:00
Jitendra Sharma
9bd4878841 feature: update GRF register implementation
Related-To: NEO-8314
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
2024-10-15 13:47:34 +02:00
Bartosz Dunajski
acef3a1e71 feature: pass external device allocation to CB event
Related-To: NEO-11925

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2024-10-15 09:37:59 +02:00
Chodor, Jaroslaw
8098bcc48d feature: adding support for custom compiler backends
This adds abbility to load different versions of the backend
compiler based on underlying device.

Related-To: NEO-12747

Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
2024-10-14 18:23:11 +02:00
Szymon Morek
7f2b806413 fix: Override timestamp width from KMD
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2024-10-14 13:38:33 +02:00
Wojciech Konior
8a6626da23 refactor: two engineInstanced-methods removed
Related-To: NEO-12594

Signed-off-by: Wojciech Konior <wojciech.konior@intel.com>
2024-10-11 18:34:06 +02:00
Mateusz Jablonski
3c06b316e6 refactor: remove legacy code
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-10-10 09:54:22 +02:00
Mateusz Hoppe
31265edfee fix: program RenderTargetCacheFlush in PC prior to PIPELINE_SELECT
- fix code by removing csStallOnly that skipped seeting RTCF flag

Related-To: NEO-9194

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2024-10-09 16:59:43 +02:00