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Author SHA1 Message Date
Cetnerowski, Adam
3bdfe2ebb7 ULT renaming: SVM mapping tests 
Change-Id: I34f77f4c243abee2400a5fc3a8fe5faf1a0d92d4
 2019-02-08 15:32:52 +01:00
Venevtsev, Igor
66e3f3c16c Remove OCL Events concept from command stream receiver 
Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
 2019-02-08 15:02:40 +01:00
Koska, Andrzej
e8771e8c2a Preparing the correct signature of WaitForSynchronizationObject 
Change-Id: I3689791ab0335009d79a3484379945f8741ba32b
 2019-02-08 14:38:31 +01:00
Mateusz Jablonski
0e55fe0801 Fix lock usage in wddm 
Change-Id: I3532b97a1b57747621e106b03263bfb070b7b05a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-08 13:05:09 +01:00
Kamil Diedrich
371eef3895 Lock csr instead of device 
- replace device lock to csr lock
- add missing lock CSR in event

Change-Id: I869e46232c919a80da619c44c08e9cd78188afac
 2019-02-08 12:33:37 +01:00
Hoppe, Mateusz
cb37f2a779 Add /we4189 switch to CMAKE_CXX_FLAGS for MSVC. 
- treat unused local variables warnings as error in Debug

Change-Id: I2da08b72e0f0083d3cdf932fbf92ef4981a88615
19.06.12357 		2019-02-08 12:06:04 +01:00
Chodor, Jaroslaw
6e0d04e25a Adding debug flag to disable DC flush in epilogue 
Change-Id: I1784be279ee9f837a0994997bec49c1925a68390
 2019-02-08 11:04:25 +01:00
Pawel Wilma
947794f166 Fix for setting context flags in AubDump 
Change-Id: Ia5fba17aac19fbcbfa6676557d1af0889f538b90
 2019-02-07 16:28:53 +01:00
Hoppe, Mateusz
9ba8f18196 Remove expectations on genIsa for kernels compiled with debug flag 
Change-Id: Id47f7bd9f611b1ed167d7053a5ac61589f44edd8
 2019-02-07 16:03:43 +01:00
Hoppe, Mateusz
4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump 
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
 2019-02-07 15:05:54 +01:00
Dunajski, Bartosz
e1e139fe76 Manifest update 
Change-Id: Ic8d3b85c2e24e2f5f5e1f26db8339fd80a5b2ed0
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-07 14:13:54 +01:00
Cetnerowski, Adam
d1998e6dce ULT renaming: SVM free tests 
Change-Id: Ie385cf80866706d719a20235f38197c81df30f63
 2019-02-07 13:36:04 +01:00
Dunajski, Bartosz
bc62b385a0 Allow to disable AubStream 
Change-Id: I442e0f14d65099d245b54ec29cb3c7c7098f6cef
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-07 12:23:12 +01:00
Dunajski, Bartosz
30c57fd507 Simplify Device creation 
Change-Id: Iac07194db73d7f0a6914bc3550c6cba67135c24c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-07 10:41:00 +01:00
Maciej Dziuban
0ec6ef1533 Move AubHelper tests to inl file 
Change-Id: I2a535b2ff46be6f9a695dde934b981d58267b2d1
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-07 10:23:24 +01:00
Zdanowicz, Zbigniew
44491a111c Use MemoryManager retrieved from ExecutionEnvironment in Kernel dtor 
Change-Id: I5f3880e1a95b3cbd262847d97776b0b92a580181
 2019-02-06 17:08:51 +01:00
Kamil Diedrich
62e56d2398 Disable L3cache when resolve argument 
Change-Id: I4bb3a18d67254eef8aa4a0ce6b29401726f0b47e
 2019-02-06 15:51:31 +01:00
Cetnerowski, Adam
43a66ad976 ULT renaming: Read image tests 
Change-Id: I2da8976c37fc01539080413498ce7f0435e5dceb
 2019-02-06 12:10:59 +01:00
Dunajski, Bartosz
4733ce32cf Move pollForCompletionMask for TBX to new method 
Change-Id: I1ce760ea185064ec9122eb5bf11d9b99c9c700e2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-06 11:18:33 +01:00
Chodor, Jaroslaw
048098ce66 Refactor around cache flush after walker 
Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
 2019-02-06 11:12:55 +01:00
Katarzyna Cencelewska
b36bcf62e7 Documentation regarding CL_CACHE 
Change-Id: I8ea845d927057ed066bc8ca1159c84edffb2d172
 2019-02-06 10:04:30 +01:00
Jablonski, Mateusz
3a9531201a Add missing tests for internal heap index 
Change-Id: If3705ef86c54504c930888829f6e38f88cdbd1ef
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-06 08:33:08 +01:00
Jablonski, Mateusz
e095ac834d Windows: use HEAP_INTERNAL in 32bit scenarios 
Change-Id: I652727303eec45cd3547bd98bec42f276000d9b4
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-05 19:04:06 +01:00
Hoppe, Mateusz
4943c102cd Add streamMode parameter passed to AubManager 
Change-Id: If074579fdf17c7709c33d08ccdfbf9dc80e3adc8
 2019-02-05 18:31:16 +01:00
Cetnerowski, Adam
c9f75d3f71 ULT renaming: Read buffer tests 
Change-Id: I41b9d97bf3913236121c4e0c0705c465a59f65eb
 2019-02-05 15:31:32 +01:00
Maciej Dziuban
ea8aa29e12 Change pollForCompletion() insertion locations 
Poll is done on:
- Aub CSR destruction
- expectMemory
- blocking calls

Poll is not done on flush

Change-Id: I1a776a932cb608c01f0de249e7cef26b00147f31
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-05 14:33:42 +01:00
Kamil Diedrich
e1eab521e7 use release for cl-objects instead of delete 
- fix for data race in events
- modification of the addition child event

Change-Id: I6ea3a413f13f13a91d37d20d8b9fad37d0ffafb9
 2019-02-05 14:09:32 +01:00
Cetnerowski, Adam
3820a5e8e5 ULT renaming: Read Buffer Rect tests 
Change-Id: I143e3a00b96e01c3f094af3c34dcd1efb5c00d95
 2019-02-05 12:57:07 +01:00
Maciej Plewka
d58b9840b8 Fix surfaceState for multisample images 
Change-Id: I2d4b17e162f61892ca1a86c241a722ef0c51ee42
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-02-05 12:44:57 +01:00
Mrozek, Michal
fe85c1d974 Do not allocate Linear Stream in system memory. 
Change-Id: I2d9abaab3358907037265214cec80cc84d6b9c0a
 2019-02-05 12:07:09 +01:00
Mateusz Jablonski
16c3117b09 Fix test for internal heap base address of wddm memory manager 
Change-Id: Ia6879ad9637ad38b3d641b0b4522dd1e85b0fb50
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-04 19:05:20 +01:00
Hoppe, Mateusz
3c47c418a9 Refactor HardwareParse::getSurfaceState() to return CPU memory 
- if SSH indirectHeap is passed, use CPU address instead of GPU
address programed in SBA command

Change-Id: Id2c8973db0dfe2d9562ee835a27c4d3c28ea3351
 2019-02-04 17:49:00 +01:00
ocldev
eb65521057 dependencies update 
Change-Id: I8b5ed9a463fe124a4c717968a6cc373b566ab9e3
 2019-02-04 17:42:28 +01:00
Hoppe, Mateusz
509ed273c4 Refactor Ults finding hardware commands 
- use CPU address for found dynamicStateHeap address in
StateBaseAddress command

Change-Id: I2d857c5a069f5a8f46169d2047cdb27efd3502b8
 2019-02-04 17:26:37 +01:00
Zdanowicz, Zbigniew
eaa241fd6a Update HW commands programming of MOCS setting 
Change-Id: Ib54a2c8d5024e39251bec35ee443ea8a507d2d3f
 2019-02-02 19:45:31 +01:00
Mateusz Jablonski
fff8be32f4 Dont force system memory for internal allocations 
use HEAP_INTERNAL_DEVICE_MEMORY for internal allocations

Change-Id: Id70caa30cd1e9c79df60773227d72b09541e4b77
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:31:34 +01:00
Mateusz Jablonski
ce4a75e121 Require same allocation type when obtaining reusable allocation 
Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:10:28 +01:00
Koska, Andrzej
395d053f02 Limiting the value of LWS to the value of GWS 
Change-Id: I24e89125e586ed77d396ba9e40dd039f1ab213fe
 2019-02-01 12:49:54 +01:00
Filip Hazubski
d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Dunajski, Bartosz
32ecd91401 Add parameters to HardwareContext read call 
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-01 10:22:15 +01:00
Zdunowski, Piotr
47091c7cfa [3/n] Log allocation placement. 
Change-Id: I35936fdb1e49a5f93f499ef23cc8bb747d0a9d88
 2019-02-01 09:57:43 +01:00
Hoppe, Mateusz
c59bf5a6ea Do not debugBreak when createAllocation fails with GRAPHICS_NO_VIDEO_MEMORY 
- this path is handled with host_ptr copy

Change-Id: If3f2c49f3c43262e018a43aff9f1b538daefc577
 2019-02-01 09:33:22 +01:00
Hoppe, Mateusz
758d91f406 Set TbxServerIp and TbxServerPort from DebugVariables 
Change-Id: Ib9ba3efb3a196c1bdf5f4345b36fe35da159c29c
 2019-02-01 09:07:47 +01:00
Chodor, Jaroslaw
7d04159f76 Refactor around cache flush 
Change-Id: Iff32af0111375f4ffc804c82e6d753d57fe94e80
 2019-01-31 22:19:06 +01:00
Milczarek, Slawomir
6ef2822643 TBX CSR to call writeMemory on aubManager 
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
 2019-01-31 16:18:57 +01:00
Jobczyk, Lukasz
fb0424bc5a Distinction between calcProfilingData functions 
Change-Id: I6f9e646d2442870e9c0345996970409b953b4d42
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-01-31 15:19:17 +01:00
Filip Hazubski
a86c215f00 Infrastructure update 
Change-Id: Ie951d209f90fe45800fde7a8c42df315de2673cd
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-31 14:28:55 +01:00
ocldev
5d7eebb75d dependencies update 
Change-Id: Iea9332b1abb118587ebd8e7f0603d780d04e45a5
 2019-01-31 13:46:03 +01:00
Jobczyk, Lukasz
c1cb1f9be6 Add profiling calculation from timestamp packets 
Change-Id: Ie7f8c703ca5ea5eb1f5207871ef94cbc7ece18b7
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-01-31 13:32:52 +01:00
Filip Hazubski
3fe78d263b Update getGraphicsAllocationType 
Change-Id: I7613d0d5550d8032b960f86aa117b4baf6b9216f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-31 11:02:35 +01:00