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4c1e3c60fa7948da93aa3200cc5055f90ba08495
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Author SHA1 Message Date
Mrozek, Michal
4c1e3c60fa Infrastructure update.. 
Change-Id: I53f8e33fabad671352409ec8ae9ca2237cb1d3ed
 2018-11-27 10:34:16 +01:00
Pawel Wilma
86ecd1a4b8 Memory leak reported for long string debug variables in ULTs 
This commit eliminates ULTs memory leaks reported for string debug variables
exceeding small string optimization size by calling shrink_to_fit() method
on string debug variables in DebugManagerStateRestore destructor.

Change-Id: I304c5c5c23c80f01fdf13f38cea5b4eceb18a94f
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-27 10:07:42 +01:00
Cetnerowski, Adam
4f28f7a647 ULT renaming: clCreateSampler tests 
Change-Id: I32975e6ea3125bfd67454318f1089e7a4c01a73d
 2018-11-27 09:44:50 +01:00
Mrozek, Michal
e0956d4ae5 Mode debug restorer to fixture. 
- disable timestamp in scenario fixture

Change-Id: I5d1e5d2251b95561197d93aee94774472e0b236c
 2018-11-27 09:29:38 +01:00
Adam Cetnerowski
0a9ea8fbfd Don't call source level debugger, when kernel doesn't contain debug info 
Change-Id: I0cc0eb35d16fb7f46584781362886aaa44bde3ec
 2018-11-27 09:28:29 +01:00
Milczarek, Slawomir
3b8ff44d55 AUB CSR with a separate function to write memory 
Move common code related to writing memory to dedicated function

Change-Id: I4ac8ec779cb40146bd27b8e40728d81d3b5b4276
 2018-11-26 20:21:19 -08:00
Mrozek, Michal
cc414b0530 Disable timestamp packet in callback tests. 
Change-Id: I6be2089e951eb437b50fcc73af506f5abdef306b
 2018-11-26 10:42:16 +01:00
Dunajski, Bartosz
7781089740 Allow Device creating multiple CSRs [4/n] 
- Introduce additional RCS engine
- Set fixed size for Engines array

Change-Id: I06533a425684b64214f956783b07877e6157935b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-26 09:40:44 +01:00
Milczarek, Slawomir
cd5f85052e AUB CSR with a separate function to submit batch buffer 
Move code related to batch buffer submission from flush to dedicated function
Add parameter to pass aub file name from AubCenter to AubManager

Change-Id: I20abb3c8bd92114b3bc9caa2a6291dc1bbddad2a
 2018-11-25 18:02:25 -08:00
Cetnerowski, Adam
360c107b41 ULT renaming: clCreateProgramWithBuiltInKernels 
Change-Id: I4146d1bc38f6ffe676bbd2c35612d46581a0c690
 2018-11-23 20:22:10 +01:00
Maciej Plewka
82e3b1e146 Move igcInfo for gtpin to kernelInfo 
Change-Id: I952facac33e759ce81982f69a4ce05ffe545cea0
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2018-11-23 16:38:10 +01:00
Mateusz Jablonski
f877d4254b Revert "Implement deferrable allocation deletion" 
This reverts commit d961bd8354.

Change-Id: Ie7d772d57199ea2897e238b2ac289bd60a89e6c6
 2018-11-23 14:59:02 +01:00
Artur Harasimiuk
6714fe84b8 fix debug message when creating Drm 
Change-Id: I1b7a1f65d0e9b7371a171bc1b14c226ec5ae6b08
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-11-23 14:15:31 +01:00
Mrozek, Michal
a1348f2f94 Remove not needed method. 
Change-Id: Id06991b374b063470a2f69daada23098c1c487d5
 2018-11-23 14:09:30 +01:00
Dunajski, Bartosz
7e72b16aa4 Add processProperties method to CommandQueue constructor 
Change-Id: If5b88de5311e3ab3973e47e70a1027cd7e0e791c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 13:08:42 +01:00
Kowalczuk, Jakub
344e92acfa Add source level debugger header from SDK 
Change-Id: I9898ec8892798facb71ccae0547c894b6b5a0288
 2018-11-23 12:22:08 +01:00
Mrozek, Michal
61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Mateusz Jablonski
d961bd8354 Implement deferrable allocation deletion 
Change-Id: I5e99d1bbb920619f63b71573335dc76f19c796a6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-23 11:28:52 +01:00
Dunajski, Bartosz
3ad33bf1b8 Allow Device creating multiple CSRs [3/n] 
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 10:51:34 +01:00
Mrozek, Michal
fbf0d44fff Initialize tag to 0 in tbx mode. 
Change-Id: Ic85984384446cb75bdcebe1ec50fa4cc1dd69600
 2018-11-23 08:09:42 +01:00
Dunajski, Bartosz
706d9f8070 Allow Device creating multiple CSRs [2/n] 
Create new OsContext per CSR

Change-Id: I8dad7fc1ab450e560f78eba3152b5913791e59a3
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-22 14:29:44 +01:00
Filip Hazubski
3cb8683fb4 Process extra properties for Context 
Change-Id: Ic4b3af368a734109188dcd725f1fcf8c17fbb59e
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
18.47.11882 		2018-11-22 13:28:58 +01:00
Mateusz Jablonski
352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma
2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Cetnerowski, Adam
469fe40072 Revert "Expose spirv extensions" 
This reverts commit bbc7afc952.

Change-Id: I103c55707b81745822bf355a1df011e0d0802e17
 2018-11-21 15:51:37 +01:00
Mrozek, Michal
e2c9a25d03 Add concept of chunks into timestamp packets. 
Change-Id: Ic9a978224862e237a7268525f05b059756da06e7
 2018-11-21 15:22:49 +01:00
Mrozek, Michal
7488d7971e Add expectNotEqualMemory to AUB fixture. 
Change-Id: Ibb7d59124915ed56b9eb2d9b5b25faa497312060
 2018-11-21 14:23:47 +01:00
Filip Hazubski
ad7765f010 Infrastructure update 
Change-Id: Ib1c1faea2b1324de15e37bdaba70067ed15dce19
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-11-21 14:09:46 +01:00
Cetnerowski, Adam
d46969a7f2 Rename offline compiler: cloc -> ocloc 
Change-Id: I0595bac4c7266e77bd2ee17588694233547c8315
 2018-11-21 13:31:47 +01:00
Dunajski, Bartosz
af46d88fc1 Allow Device creating multiple CSRs [1/n] 
Change-Id: Ie5d8d89aa388c608d5464919059c28a054ac9b1e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-21 12:37:25 +01:00
Maciej Dziuban
c4239dcd3d Refactor WddmResidencyController methods implementations 
- trimResidency
- trimResidencyToBudget
- makeResidentResidencyAllocations

Change-Id: Ibf81e31966c8d8347fd5caf2f6a4bf8fe75fab5f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-21 12:05:37 +01:00
Krystian
546afdf7f0 OCL Encoder retVal fix 
Change-Id: I679ca3b12b5472b58358d89ead53c0889ed01234
 2018-11-21 10:00:43 +01:00
Artur Harasimiuk
8d4808045b don't check for vaGetLibFunc function when libva not found 
also, check whether libva requires adding of extra include directories
to build properly.

Change-Id: I4274a0b80725c1b4305a465db344b12f234ec359
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-11-21 09:15:54 +01:00
Kai Chen
5f8209af4f Recover some needed test cases in drm_memory_manager_test 
Recover some test code in drm_memory_manager_test for checking
MMAP_ALLOCATOR allocation type, mmMockCallCount and munmapMockCallCount.

Change-Id: I043f4f118be7e6bf2334efbbb6f5d8e0d620421a
Signed-off-by: Kai Chen <kai.chen@intel.com>
 2018-11-21 08:07:18 +01:00
Artur Harasimiuk
ebfba1dc4a add libva to manifest 
Change-Id: I13f93a57754662a5f2d94a55fe23af0082b42de6
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-11-20 19:49:53 +01:00
Venevtsev, Igor
c2e9002d22 Generate only 2 AUBs for unaligned Read/WriteBuffer tests 
Change-Id: I9843d8bbec0a8a12e4cce97ca3cfbc91527de9bc
 2018-11-20 15:41:28 +01:00
Dunajski, Bartosz
1ff92d51dc Initial implementation of PCH for Windows 
Change-Id: Ib083e3dac003a75ae67d2e2747dde6dd0e6ff92d
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 13:42:49 +01:00
Mrozek, Michal
3f63aeeb74 Remove redundant code. 
Change-Id: I3754c94671605db2545897d22b68b6c8e8aae9d1
 2018-11-20 12:25:24 +01:00
Adam Cetnerowski
bbc7afc952 Expose spirv extensions 
Change-Id: I64d05ed2bcc4c3ae005c39b9c22d0f67d7ca6a7e
 2018-11-20 11:52:02 +01:00
Dunajski, Bartosz
d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Stefanowski, Adam
96d07db545 Move wddm->init from wddmCSR to getDevices 
Change-Id: If88f526792596108e038ec05c1d305e9452506f2
 2018-11-20 09:40:57 +01:00
Venevtsev, Igor
6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Artur Harasimiuk
bc211a7103 infrastructure update 
Change-Id: I68d7ed0f0d81580f56334a99d0bf5d54bb7b6795
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-11-19 22:58:26 +01:00
Mrozek, Michal
1c6fb9def4 Return pointer to clCreateBufferWithPropertiesINTEL. 
Change-Id: I36c5e1e0ed9a9032e7f5d3653b413ad1911c37a5
 2018-11-19 15:13:32 +01:00
Mrozek, Michal
c0f6af1df3 Use maxOsContextCount to initialize trimCandidateList for WDDM allocations. 
Change-Id: Icc65d19ed45bb1aa1a3dba4de536cf85ab9b906b
 2018-11-19 11:24:16 +01:00
Dunajski, Bartosz
ac15e7f3ac Unify expectMemory in Aubs and introduce expectMemoryNotEqual 
Change-Id: Ifd52f2d3ad3badf6ea9dac2c2b9873a40efa8482
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-19 10:39:45 +01:00
Kai Chen
85b60dff0f Linux GPU address allocator for devices with reduced address space 
Code implementation of GPU address allocator for devices with reduced
address space.

Change-Id: Ieb0412c5930fdd71f90741055cf89c0338b01133
Signed-off-by: Kai Chen <kai.chen@intel.com>
 2018-11-19 10:20:25 +01:00
Milczarek, Slawomir
48562c1d79 Add the BRANCH_TYPE definition to cmake 
Change-Id: I8091f0e31eae88eb3ebf8152dd5114baed9d1c8e
 2018-11-16 19:33:02 -08:00
Jacek Danecki
9edafd4acf update Arch builds 
Use igc and gmmlib packages versions from fedora.spec.in to download
deb packages from launchpad.net.

Signed-off-by: Jacek Danecki <jacek.danecki@intel.com>

https://github.com/intel/compute-runtime/pull/114

Change-Id: Ifb83a12a1fb5d1bb07e6b695db4257d76b8316bf
 2018-11-16 22:53:31 +01:00
Krystian
5b9f5a6d9e OCLDecoder PatchListSize fix 
Change-Id: I8e4f809464b88d06ff4b5611888f1e6965aa4f19
 2018-11-16 21:01:28 +01:00