intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2025-12-28 08:37:12 +08:00
Code Issues Packages Projects Releases Wiki Activity
1,786 Commits 42 Branches 655 Tags
84d35c8951e9650eb74f8db7f7604fbafbf0416e
Commit Graph

279 Commits

Author SHA1 Message Date
Zdanowicz, Zbigniew
84d35c8951 Add media programming call at the end of command buffer 
Change-Id: Ie60bc384c9385071aa77d2516e1d3649298a1233
 2019-01-15 11:35:58 +01:00
Filip Hazubski
ec03210687 Update clEnqueueVerifyMemory 
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-14 14:37:09 +01:00
Dunajski, Bartosz
8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Dunajski, Bartosz
6ea2d8c2a9 Extract creating aub file name to separate function 
Change-Id: Ie0506f1847684cc3aabd8bee153c944b2f49bdb8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-09 20:45:04 +01:00
Milczarek, Slawomir
ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR 
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
 2019-01-08 09:39:28 +01:00
Mateusz Jablonski
aee69779fa Minor renaming in a scope of multi os context allocations: 
shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext

Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-07 11:42:43 +01:00
Milczarek, Slawomir
9083761dce Add AUBFillBuffer test with concurrent execution on CS 
Change-Id: Ia01614a9763ff67d27ed68c46a5ae1b9f7dd0ee8
 2019-01-04 17:04:55 +01:00
Filip Hazubski
7e3884e22d Add clEnqueueVerifyMemory API 
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-04 08:30:02 +01:00
Venevtsev, Igor
73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Hoppe, Mateusz
e195b0e380 Initialize TBX stream only when hardwareContext is not created 
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
 2018-12-31 12:14:55 +01:00
Artur Harasimiuk
b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00
Venevtsev, Igor
f6757c02a4 Revert "Revert "Fix Read/WriteBuffer for unaligned offsets"" 
This reverts commit 71f6524197.

Change-Id: I4f31fb6fa14fb5e3b8d8bf0a1745429bcdacd5af
 2018-12-20 14:16:07 +01:00
Milczarek, Slawomir
541ab5af50 TBX CSR with an option to create and operate on hardware context 
Change-Id: Ib5febc8e36e61195a5fcce91e1783117717ff6cb
 2018-12-20 10:59:53 +01:00
Kowalczuk, Jakub
d3ac1be3aa Replacing typedef with using in common csr 
Change-Id: Idc4e7b1b0ffe577627feac4072888080decbd41b
 2018-12-19 14:31:35 +01:00
Kowalczuk, Jakub
53fb222fe7 Unify AUB and TBX CSRs part 3 
Move:
- getCsTraits
- initEngineMMIO
- submitLRCA
to common CSR

Change-Id: I8f172b017be2e8f7c54efc8420edd2671d99a927
 2018-12-19 12:02:24 +01:00
Mateusz Jablonski
b138ff5750 Minor refactoring related to residency task count 
Change-Id: I49c9a5b37637e19fa12b7e6d91c352fb78bb117a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-19 11:38:49 +01:00
Pawel Wilma
068582445d Move physical address allocator to CommandStreamReceiverSimulatedHw 
Change-Id: Ic3c397fe1a93eccae9235f1315a26ae31a3f5b60
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-19 09:26:31 +01:00
Dunajski, Bartosz
403fedfb7b Improve EngineInstance usage in Aub CSR 
Change-Id: I9097f7cc8c930fcf531744af9bddfa38b2c5e1da
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-18 12:11:00 +01:00
Mateusz Jablonski
8ec072d39c Simplify Memory Manager API [3/4] 
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-17 10:42:16 +01:00
Zdunowski, Piotr
0ca8ee7f30 Additional programming for source level debugger. 
- always program STATE_BASE_ADDRESS and STATE_SIP

Change-Id: Iea6327d062b4efdddd3b0060d3105b29745b9cba
 2018-12-14 11:30:54 +01:00
Dunajski, Bartosz
010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Mateusz Jablonski
a6be6533ea Simplify Memory Manager API [2/n] 
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-11 13:12:00 +01:00
Kowalczuk, Jakub
9e53740130 Unify AUB and TBX CSRs part 2 
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
 2018-12-10 12:23:27 +01:00
Hoppe, Mateusz
e88548a251 Do not call submit on HardwareContext with zero-sized command buffer 
Change-Id: I53b9233b30f58e2fcb354142eb1186a20c834d62
 2018-12-10 10:02:46 +01:00
Dunajski, Bartosz
7f7808fb71 Select RCS1 for low priority CommandQueue 
Change-Id: I1f86b0afedb8f6e76fee896c2751a0bf196996d7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-07 13:18:13 +01:00
Kowalczuk, Jakub
2dd71c2e25 Unify AUB and TBX CSRs part 1 
Move:
- getPPGTTAdditionalBits
- getGTTData
- getMemoryBankForGtt
to common CSR

Change-Id: I7c9616bc18a4cffb0673d7964af168ea3ddad2dd
 2018-12-07 09:24:54 +01:00
Mrozek, Michal
3719c7a767 Limit AUB SSH size to 64KB. 
Change-Id: I1a23aa2a253a93ed9633ab7fda0a6180050add83
 2018-12-06 17:36:49 +01:00
Mateusz Jablonski
c8748b77a0 Simplify memory manager API [1/n] 
pass struct with properties to allocate graphics memory methods:
for protected methods use AllocationData
for public methods use AllocationProperties

Change-Id: Ie1c3cb6b5e330bc4adac2ca8b0bf02d30ec76065
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-06 15:09:25 +01:00
Maciej Dziuban
43fd32b3ad Enable aggregating command buffers with multiple osContexts 
- Store inspectionId for each osContext in GraphicsAllocation
- Pass osContextId to aggregateCommandBuffer and use it to select inspectionId

Change-Id: I2c377ad7577a8c882cc89c1205430cb581c2c0d5
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-12-06 10:11:07 +01:00
Pawel Wilma
fe228ea5f7 Use GPU address in calculateNewGSH() 
Change-Id: I82add7aab4b26444f288a9c4dbce6328578a03d2
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-05 10:33:35 +01:00
Milczarek, Slawomir
1bf98c7f80 Added support for expectMemory call from aub stream 
Change-Id: I8acf27eff8b2f38dcb8d9873e03c35bfab6f3298
 2018-12-04 12:03:36 -08:00
Dunajski, Bartosz
b728526c4e Allow Device creating multiple CSRs [8/n] 
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
 2018-12-04 15:36:59 +01:00
Mrozek, Michal
38fb8cd9c3 Refactor mmio programming. 
Change-Id: I2ec9294b800adcd537f03d69fd4ba4e015e8db7a
 2018-12-03 14:40:00 +01:00
Milczarek, Slawomir
80fa9d0260 Decouple aub stream memoryFree from makeNonResident 
Change-Id: Ic4614441aff131356ce3ec03330d7dc42b5b0ecb
 2018-11-29 08:28:21 -08:00
Zdanowicz, Zbigniew
7dbd0ea4f3 Move Scratch Space functionality to dedicated class 
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
 2018-11-29 11:55:56 +01:00
Dunajski, Bartosz
d39309adf2 Use const values instead of constexpr from std::array::size() 
Change-Id: I705888b77801cd32487c4d53fc320cf839ec9079
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 22:57:33 +01:00
Milczarek, Slawomir
42ba6c10fc AUB CSR with an option to create and operate on hardware context 
Change-Id: If8e060ef184d6c077e09741144ef870c96360645
 2018-11-28 09:24:18 -08:00
Dunajski, Bartosz
3e7fa3754c Replicate OsContext to CommandStreamReceiverWithAUBDump 
Change-Id: If2f83d01d58891209c6cf82f47e5634f8d348de4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 13:11:52 +01:00
Dunajski, Bartosz
b0de2a11d2 Set OsContext as reference 
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 15:32:14 +01:00
Piotr Fusik
87bb6afa56 Move stamps allocators from memory manager to CSR. 
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
 2018-11-27 14:52:06 +01:00
Dunajski, Bartosz
2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Pawel Wilma
71f6524197 Revert "Fix Read/WriteBuffer for unaligned offsets" 
This reverts commit 6ea863e440.

Change-Id: Ib58cfe4cffc022b1514c42131914eb2fe64fcbe0
 2018-11-27 12:35:03 +01:00
Milczarek, Slawomir
3b8ff44d55 AUB CSR with a separate function to write memory 
Move common code related to writing memory to dedicated function

Change-Id: I4ac8ec779cb40146bd27b8e40728d81d3b5b4276
 2018-11-26 20:21:19 -08:00
Dunajski, Bartosz
7781089740 Allow Device creating multiple CSRs [4/n] 
- Introduce additional RCS engine
- Set fixed size for Engines array

Change-Id: I06533a425684b64214f956783b07877e6157935b
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-26 09:40:44 +01:00
Milczarek, Slawomir
cd5f85052e AUB CSR with a separate function to submit batch buffer 
Move code related to batch buffer submission from flush to dedicated function
Add parameter to pass aub file name from AubCenter to AubManager

Change-Id: I20abb3c8bd92114b3bc9caa2a6291dc1bbddad2a
 2018-11-25 18:02:25 -08:00
Mrozek, Michal
61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Mateusz Jablonski
352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma
2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Dunajski, Bartosz
d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Venevtsev, Igor
6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00