- when CSR is set to AUB or TBX (with AubDump) Device should
return true in isSimulation(). This method is used to set flag
m_IsSimulation in deviceQueue which is used by scheduler kernel
Change-Id: Ibdf07d4c940335fb0bb8448071b66d47e9391d71
- Change dirty state helpers to work on IndirectHeaps.
- Instead of comparing size in bytes and cpu pointers, compare gpu base
address and size of the heap in pages
- That allows to not have dirty flag for heaps that are coming from 4GB
allocator.
Change-Id: I0ff81e3c0945b32e4f872a100cd10b332b27ed24
- Rename misnamed test function
- Adjust 2 tests, so they use CSR size getters instead of hardcoded values
- Move getSizeRequiredPreambleCS() into CommandStreamReceiverHw class
- Improve PreambleHelper size estimating
Change-Id: I3f292d50e08f3d10d190c9f8722e1f0498481154
-This is required to enable N:1 submission model.
-If heaps are coming from different command queues that always
mean that STATE_BASE_ADDRESS needs to be reloaded
-In order to not emit any non pipelined state in CSR, this change
moves the ownership of IndirectHeap to one centralized place which is
CommandStreamReceiver
-This way when there are submissions from multiple command queues then
they reuse the same heaps, therefore preventing SBA reload
Change-Id: I5caf5dc5cb05d7a2d8766883d9bc51c29062e980
- Internal allocations may now coexists with non internal on reusable list.
- Caller now specifies if internal allocation is needed.
- If criteria are not met , then allocation is not returned.
Change-Id: I7da3a4f944768b7c8a873e44fd47248f1d76bf9e
Refactoring in ULTs around preemption:
-refactoring ULTS to not fail with default preemption mode
-fixing ULT memory leaks observed after enabling preemption
-mocking getSipKernel in ULTs (to minimize ULT execution time)
Change-Id: I194b56173d7cb23aae94eeeca60051759c817e10
- program SIP_STATE when either MidThread preemption is enabled
or kernel debugging is active
- device creates correct sip based on preemption mode and
active kernel debugging
Change-Id: I3e43b66ad00d24c2389fa4fc766dd47044b6af80
- Decission about timeout enabling and value moved out of CSR
- Timeout multiplier is no longer Linux specific
Change-Id: I6858fe2f811ef13802b95e0470e310210a9dea8b
- cpu virtual address was used instead of gpu va
- this caused incorrect behaviour of TBX server when
special heap allocator assigning GPU addresses was used
Change-Id: I2328cf2441be797311fd6a3c7b331b0fff79d4fc
Any CPU related updates such as clEnqueueMapBuffer or similar
need to trigger a re-dump of memory prior to the next clEnqueue call.
Change-Id: I7b31e559278e92ff55b6ebab8ef4190caef1ebc0
- Switch to internal heap for kernel ISA allocations.
- remove IH from various functions
- remove IHState from CSR , IH is never dirty
- ISA is no longer copied on enqueue calls.
Change-Id: I0099cf2a9ebab6192ea03a74dd35f7da963fd5a5
- Measure time between wait calls. If delay is exeeded use QuickKmdSleep
- Kmd Notify helper functions
- Refactor overriding from debug variables
- Refactor Kmd Notify tests
Change-Id: I123c31f492d98fd304184f99ee0bf7d733d06f04
This commit introduces a software controlled HW Tag
in the configuration of AUB CSR in standalone mode
(i.e. with no execution on real HW).
Change-Id: Ic470957d58e6568b13dda3d61cb230498d8f2691
New debug option FlattenBatchBufferForAUBDump has been added. When set it
modifies AUB dump in such way that commands from main and chained batch
buffer are dumped as single allocation. Commands from chained batch buffer are
dumped directly after commands from main batch buffer without
MI_BATCH_BUFFER_START. This feature also requires ImmediateDispatch mode which
can be forced using debug option CsrDispatchMode = 1.
Change-Id: I730760791693a748e7f4e1463ce8e7af94287b93
This commit eliminates redundancy in calling processResidency() for AUB CSR
twice in the HW CSR with AUB dump configuration.
Change-Id: Ib49c80fa9d81a495dfb7261ff76e0b9b1422e42d
