Aleksandra Nizio
c9ebf91271
fix: Add -emit-lib-compile-errors flag when library compilation is enabled
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Related-To: NEO-8608
Signed-off-by: Aleksandra Nizio <aleksandra.nizio@intel.com >
2025-07-10 10:48:21 +02:00
Mateusz Hoppe
703497b067
fix: read ONEAPI_PVC_SEND_WAR_WA env
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- disable optimization with compiler internal option when env is set to
zero
Related-To: NEO-15378, GSD-10884
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-07-09 16:22:18 +02:00
Mateusz Hoppe
e6ed42d056
fix: apply relocations in isa segments for builtin kernels
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- use correct patched isa segments when transferring isa for builtins to
preserve applied relocations
- do not set requiresImplicitArgs to false for builtins, zebin defines
is implicit arg buffer is required
Related-To: NEO-14667, NEO-15276
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-06-16 17:51:55 +02:00
Chodor, Jaroslaw
46c60290b9
refactor: introducing igfxfmid_wrapper
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Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com >
2025-05-30 19:26:04 +02:00
Katarzyna Cencelewska
828d6bafa7
fix: return proper value for zeKernelSuggestGroupSize
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Resolves: HSD-18042274687
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-05-30 16:35:21 +02:00
Filip Hazubski
504440fc4d
feature: Add ftrHeaplessMode flag
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Pass hwInfo to isHeaplessModeEnabled and isForceBindlessRequired functions.
Related-To: NEO-14526
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2025-04-02 21:06:05 +02:00
Fabian Zwoliński
7ef3880793
feature: implement pool allocator for gpuTimestampDeviceBuffer
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The patch applies to Level Zero.
Only allocations < 2MB will be fetched from the pool.
Allocations are shared and reused within a given device.
Additionally, I added a new debug flag to control the allocator:
EnableTimestampPoolAllocator
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com >
2025-04-02 14:28:56 +02:00
Mateusz Jablonski
2394f9fd91
feature: update base layout of L0 handles to match ze_handle_t layout
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this layout is required by L0 DDI Handle extension
Related-To: NEO-13121, NEO-13917
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-03-28 14:40:20 +01:00
Szymon Morek
ead0842763
feature: add L0 API to query kernel argument info
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Related-To: NEO-14358
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-03-27 16:43:33 +01:00
Fabian Zwoliński
f5e37e725c
Revert "fix: configure ISA Pool params based on productHelper"
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This reverts commit bf20ae7ae8 .
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com >
2025-03-10 22:41:13 +01:00
Chodor, Jaroslaw
aa0075a845
refactor: L0 module input handling refactor
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Related-To: NEO-14135
Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com >
2025-02-26 14:32:23 +01:00
Compute-Runtime-Validation
9785e5c11e
Revert "feature: update base layout of L0 handles to match ze_handle_t layout"
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This reverts commit 276c606329 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-02-26 02:37:14 +01:00
Mateusz Jablonski
276c606329
feature: update base layout of L0 handles to match ze_handle_t layout
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this layout is required by L0 DDI Handle extension
Related-To: NEO-13121, NEO-13917
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-02-25 01:23:43 +01:00
Kamil Kopryk
7c3468794e
fix: add option to enable/disable heapless in ocloc
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Related-To: GSD-10681
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-02-24 17:06:26 +01:00
Fabian Zwoliński
bf20ae7ae8
fix: configure ISA Pool params based on productHelper
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When is2MBLocalMemAlignmentEnabled returns true,
increase pool size for builtins from 64k to 2MB.
Additionally, set appropriate alignment for kernel ISA heap allocations.
Additionally, configure isaAllocationPageSize based on productHelper
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com >
2025-02-20 08:42:35 +01:00
Filip Hazubski
6b2b42972a
fix: Add asserts to ensure NonCopyable and NonMovable 1/n
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2025-02-18 09:41:20 +01:00
Chandio, Bibrak Qamar
7149743162
fix: Set vmbind user fence when makeMemoryResident
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Related-To: NEO-11977, GSD-10293
Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com >
2025-02-10 14:20:09 +01:00
Compute-Runtime-Validation
d23249b061
Revert "fix: Set vmbind user fence when makeMemoryResident"
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This reverts commit 80dc4fb43a .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-01-31 11:36:29 +01:00
Chandio, Bibrak Qamar
80dc4fb43a
fix: Set vmbind user fence when makeMemoryResident
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Related-To: NEO-11977, GSD-10293
Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com >
2025-01-28 22:04:37 +01:00
Lukasz Jobczyk
2dd9940f60
Revert "fix: count active modules for enabling per-dispatch private memory"
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This reverts commit a483b361f9 .
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-01-15 15:03:37 +01:00
Wenbin Lu
a483b361f9
fix: count active modules for enabling per-dispatch private memory
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Related-To: NEO-13086
Signed-off-by: Wenbin Lu <wenbin.lu@intel.com >
2025-01-10 15:03:34 +01:00
Zbigniew Zdanowicz
a744aa07bc
refactor: add private property logging in test and kernel class
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Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2025-01-02 15:26:07 +01:00
Compute-Runtime-Validation
37eeef5ba4
Revert "fix: Remove the check for ze-take-global-address and update errors"
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This reverts commit 156e219e7f .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2024-12-14 04:50:41 +01:00
Neil R. Spruit
156e219e7f
fix: Remove the check for ze-take-global-address and update errors
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Related-to: NEO-13458
- With new IGC, ze-take-global-address is not needed to ensure global
pointers are allowed. Updates the error message to provide the
correct information on why the query failed and remove the requirement
check for the flag.
Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com >
2024-12-13 15:52:36 +01:00
Mateusz Hoppe
e240dca7cd
refactor: remove inactive code
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- verifyDebugCapabilities() did not fail build when debug_env did not have
systemThreadSurfaceAddress defined
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2024-10-04 11:50:30 +02:00
Mateusz Hoppe
46b78812cc
fix: use internal options when native binary is rebuilt from spirv
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Resolves: NEO-12838
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2024-09-30 19:19:31 +02:00
Maciej Plewka
80f75ceace
fix: submit dummy exec to pin memory during zeContextMakeMemoryResident call
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2024-09-23 14:43:59 +02:00
Filip Hazubski
ebc19b4a70
feature: Add logic to disable bindless addressing via AIL
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Add mockable Device functions to get ReleaseHelper and AILConfiguration.
Resolves: NEO-12699
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2024-09-18 13:49:51 +02:00
Bartosz Dunajski
b8fb16c603
fix: initialize kernel members at the beginning
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2024-09-18 11:13:35 +02:00
Compute-Runtime-Validation
d842f65cf1
Revert "fix: submit dummy exec to pin memory during zeContextMakeMemoryReside...
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This reverts commit f9b87d53e6 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2024-09-05 03:28:03 +02:00
Maciej Plewka
f9b87d53e6
fix: submit dummy exec to pin memory during zeContextMakeMemoryResident call
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Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
Related-To: NEO-11879
2024-09-04 14:07:29 +02:00
Mateusz Hoppe
37b7caa137
fix: correct program header generation for shared isa allocation
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- when kernels share single allocation, LOAD address in program headers
should point to correct virtual address including kernel offset
Related-To: NEO-7788, GSD-9836
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2024-09-03 17:50:29 +02:00
Winston Zhang
0590b34cfa
feature: refactor and rewrite setErrorDescription
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Related-To: NEO-8379
Signed-off-by: Winston Zhang <winston.zhang@intel.com >
2024-08-21 17:26:25 +02:00
Bartosz Dunajski
5ccfd6f2be
fix: add missing AlignLocalMemoryVaTo2MB flag support
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Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2024-08-01 13:54:51 +02:00
Filip Hazubski
5ae2709e6e
fix: Remove allow-zebin and enable-zebin compile options
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Zebin is enabled by default.
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2024-06-10 14:08:40 +02:00
Mateusz Hoppe
11667bd853
fix: write ISA memory once for simulation csr types
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Related-To: NEO-11408
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2024-05-23 14:42:12 +02:00
Fabian Zwoliński
465330ee6f
fix: add nullptr dereference check in module destroy
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Related-To: GSD-9058
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com >
2024-05-16 07:54:46 +02:00
Szymon Morek
9989829487
fix: call writeMemory after shared ISA transfer
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Related-To: NEO-11408
If downloadAllocation happens before makeResident,
such transfer might become outdated (zeroed out).
This commit fixes that by writing memory immediately
to tbx.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2024-05-15 16:59:18 +02:00
Compute-Runtime-Validation
de789ac7e5
Revert "performance: remove page size limit for sharing ISAs"
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This reverts commit e7c036a91b .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2024-05-12 09:00:32 +02:00
Szymon Morek
e7c036a91b
performance: remove page size limit for sharing ISAs
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Related-To: NEO-9403
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2024-05-10 08:56:49 +02:00
Szymon Morek
10ed479b16
performance: share inter-module ISA allocations
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Related-To: NEO-10258
Currently each module has it's own GA
for kernel ISA's. This change allows new modules to
reuse existing allocation.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2024-05-09 08:43:55 +02:00
Mateusz Jablonski
959333d9bf
fix: respect number of tiles when getting total private memory size of module
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Related-To: GSD-8374
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2024-04-23 17:33:15 +02:00
Jitendra Sharma
0d53b21d3c
refactor: correct variable naming
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Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com >
2024-04-11 11:12:56 +02:00
Zbigniew Zdanowicz
b3be51fc35
refactor: add checker for stateless only kernels
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Related-To: NEO-10381
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2024-03-21 21:54:55 +01:00
Michal Mrozek
0edb025cf7
performance: apply padding only for last kernel.
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not needed for all kernels, only for last one.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2024-02-20 14:30:14 +01:00
Kamil Kopryk
9b7d54ef66
fix: fix exported function address for heapless mode in L0
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Related-To: NEO-7621
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2024-02-08 09:45:42 +01:00
Fabian Zwolinski
c51b656d2c
fix: request instruction cache invalidation on module destroy
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Invalidation is requested on both linux and windows,
on Csr's that used Isa allocation.
Related-To: NEO-10045
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com >
2024-01-29 16:00:34 +01:00
Kamil Kopryk
bf4cf57001
fix: fix exported function address when heapless mode is enabled in L0
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Related-To: IGC-8472
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2024-01-24 17:12:21 +01:00
Maciej Bielski
f7b3b21efe
fix: update build log when program build fails
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Regression fix.
Resolves: GSD-7621
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com >
2024-01-22 17:35:29 +01:00
Mateusz Jablonski
a6458433dc
refactor: correct naming of enum class constants 9/n
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2023-12-19 10:36:25 +01:00