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498 Commits

Author SHA1 Message Date
Kamil Kopryk
775b14a7f6 fix: add ioh alignment in heapless 
Related-To: NEO-11871

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-08-09 12:20:00 +02:00
Kamil Kopryk
38a194eee6 fix: scratch address from implicit args in ocl 
Related-To: NEO-12237
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-08-07 09:40:27 +02:00
Kamil Kopryk
2a9bcdeb83 refactor: pass outImplicitArgs to patchImplicitArgs function 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-08-05 17:31:47 +02:00
Fabian Zwoliński
674c4a15ad fix: use correct gpu address when bindless heaps helper is enabled 
Related-To: NEO-7063
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2024-08-05 15:09:57 +02:00
Szymon Morek
ace883ca55 performance: don't flush gpgpu if not required 
Related-To: NEO-12124

If queue is OOQ and there are no cross-engine dependencies,
don't flush CCS before submitting copy on BCS.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-07-26 06:49:45 +02:00
Maciej Plewka
1cd00b5b89 fix: use per product cache line size to align heaps 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-07-24 17:29:20 +02:00
Maciej Plewka
afee8814ef refactor: get ioh alignment from static function 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-07-24 14:43:31 +02:00
Dominik Dabek
c1c9ac634b performance(ocl): enable host usm alloc recycle 
Enable at threshold of 2% system memory.

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-07-17 19:33:56 +02:00
Bartosz Dunajski
90d1a210d8 refactor: remove not needed check 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-07-09 16:11:33 +02:00
Lukasz Jobczyk
bbeb5224d8 fix: Add IOH alignment to estimation 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-07-08 12:29:54 +02:00
Mateusz Jablonski
4f4b8fed15 refactor: remove not needed code related to deprecated device ip version 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-07-05 09:54:48 +02:00
Morek, Szymon
aed96cede4 fix: flush barrier when profiling enabled 
Related-To: NEO-10615

Signed-off-by: Morek, Szymon <szymon.morek@intel.com>
 2024-07-02 13:25:07 +02:00
Kamil Kopryk
70e52ce4d8 refactor: add seperate enablers for compute walker and gpgpu walker 
Related-To: NEO-10641
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-06-27 10:27:48 +02:00
Szymon Morek
8ee92b840f fix: don't set start timestamp on cpu for bcs 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-06-26 13:30:58 +02:00
Kamil Kopryk
fbc29bb43d refactor: use indirectDataAlignment from gen cmds 
Related-To: NEO-10641
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-06-25 21:02:36 +02:00
Kamil Kopryk
2ec2f8c085 refactor: add heaplessStateInitEnabled bool to dispatch walker args 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-06-25 15:53:19 +02:00
Kamil Kopryk
78c7d8878d refactor: change method to get indirect data address 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-06-20 14:24:51 +02:00
Maciej Plewka
90df4b298b fix: cache flush dependency for queue blocked 
Related-to: NEO-9872, HSD-18038461954
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-05-20 11:55:24 +02:00
Dominik Dabek
a236171f0d performance(ocl): enable device usm alloc reuse 
Enabling on MTL+
Limited to use max 2% of global device memory.

Related-To: NEO-6893, NEO-11463

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-05-17 13:32:45 +02:00
Dominik Dabek
b4d839fe29 performance(usm): l0, add usm host memory pooling 
Disabled by default.

Related-To: NEO-11356

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-05-15 15:20:51 +02:00
Maciej Plewka
e39893485c fix: add cache flush as dependency for bcs ccs synchronization 
Related-to: NEO-9872
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-05-09 13:43:39 +02:00
Weronika Kapusta
d6c16c1640 fix: remove compiler cache legacy implementation 
Related-To: NEO-10679

Signed-off-by: Weronika Kapusta <weronika.kapusta@intel.com>
 2024-05-06 18:28:35 +02:00
Compute-Runtime-Validation
8342c0ae2f Revert "fix: add cache flush as dependency for bcs ccs synchronization" 
This reverts commit 5e57bb2a32.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-05-01 03:05:47 +02:00
Fabian Zwoliński
ee71157f7f fix: opencl support for bindless kernels 
Related-To: NEO-11156
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2024-04-30 12:02:17 +02:00
Maciej Plewka
5e57bb2a32 fix: add cache flush as dependency for bcs ccs synchronization 
Related-to: NEO-9872
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-04-30 11:57:49 +02:00
Katarzyna Cencelewska
ce3bb1327e feature: add method to switch enable/disable mid thread preemption 
Resolves: NEO-8089

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-04-15 16:26:52 +02:00
Compute-Runtime-Validation
9568ee47e7 Revert "fix: remove compiler cache legacy implementation" 
This reverts commit 864f42116c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-04-09 02:06:51 +02:00
Weronika Kapusta
864f42116c fix: remove compiler cache legacy implementation 
Related-To: NEO-10679
Signed-off-by: Kapusta, Weronika <weronika.kapusta@intel.com>
 2024-04-08 16:40:57 +02:00
Katarzyna Cencelewska
da7b03dd15 fix: to always use grfs count in calculateNumThreadsPerThreadGroup 
grf size != grf count

Related-To: GSD-8437
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-03-22 11:03:18 +01:00
Katarzyna Cencelewska
dd1d52259e refactor: add param rootDeviceEnvironment to calculateNumThreadsPerThreadGroup 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-03-21 22:25:14 +01:00
Mateusz Hoppe
0cec5ccc32 fix: check if any of devices has BindlessHeapHelper enabled 
- report Bindless_images extension in driver only when at least one
device has global bindless heaps enabled

Related-To: NEO-10352

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2024-03-20 20:50:58 +01:00
Mrozek, Michal
f71f6d2b72 refactor: remove not needed code 
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2024-03-08 18:18:55 +01:00
Kamil Kopryk
168445784e feature: introduce states programming at driver init heapless ocl 
Related-To: NEO-7824
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-03-08 12:29:44 +01:00
Fabian Zwolinski
52430762ac fix: cl_cache L0 env vars + refactor code structure 
Added support for new Compiler Cache
environment variables in Level Zero.

Moved
`opencl/source/compiler_interface/default_cache_config.cpp`
`level_zero/core/source/compiler_interface/default_cache_config.cpp`
to shared directory
`source/compiler_interface/default_cache_config.cpp`

Switched enabling cache by default from per OS to per API.
Changed default state of cl_cache in Level Zero to disabled.

Related-To: NEO-10045
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2024-03-01 17:35:08 +01:00
Sylvain Munaut
e2c511bc00 feature(ocl): Improve Linux CL/GL sharing support 
This commit is aimed at drastically improving the support for the CL/GL
sharing
extension on linux. The current support is not really usable as it only
supports a few texture format, and only on EGL contexts. It is also
pretty
buggy since it requires the texture to be bound when placing the CL call
to
share it which is just plain wrong and will not work in many
applications.
This new version makes used of the "official" interop extension from
MESA
which is available for GLX and EGL contexts, allows sharing of buffers
and
not just texture and supports many more formats.
This is still far from being a fully compliant / full featured version
of
the extension, but it's a big step forward in my opinion and allows to
run
some real applications.
I've tested gr-fosphor (SDR spectrum display) and Davinci Resolve as
examples.
Both of theses don't work without theses improvements.

Fixes: https://github.com/intel/compute-runtime/issues/659
Fixes: https://github.com/intel/compute-runtime/issues/667

https://github.com/intel/compute-runtime/pull/673

Related-To: NEO-3599

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-03-01 13:38:56 +01:00
Lukasz Jobczyk
cfd3edfb2c fix: Align IOH entry 
Related-To: NEO-10036

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-02-26 14:36:31 +01:00
Kamil Kopryk
0c5cba8ebd refactor: use common indirectDataAlignment static constexpr value 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-02-16 13:55:00 +01:00
Compute-Runtime-Validation
57c946b61c Revert "fix: align indirect data pointer to cacheline size in heapless mode" 
This reverts commit 004e6e647f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-02-15 05:49:19 +01:00
Kamil Kopryk
004e6e647f fix: align indirect data pointer to cacheline size in heapless mode 
Align indirect data pointer to cacheline size in heapless mode,
restore debug_break_if if avx2 load/store operation
gets unaligned pointer,
remove fallback to mm256 loadu/storeu unaligned operation

Related-To: NEO-7621
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-02-14 10:00:15 +01:00
Dominik Dabek
2cad595a0d performance: debug flag for usm host alloc recycle 
set ExperimentalEnableHostAllocationCache=1 to recycle host usm
allocations

Related-To: GSD-7497

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-02-01 16:47:59 +01:00
Mateusz Jablonski
d2c6283879 fix(ocl): add support for deprecated value of CL_MEM_DEVICE_ID_INTEL 
Resolves: NEO-10184, NEO-10195, NEO-10196
Resolves: NEO-10200, NEO-10205, NEO-10207
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-01-29 17:07:26 +01:00
Mateusz Jablonski
327d4c4d48 fix: update OpenCL headers to v2023.12.14 
https://github.com/KhronosGroup/OpenCL-Headers/releases/tag/v2023.12.14
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-01-25 16:42:14 +01:00
Mateusz Jablonski
a697a3f718 refactor: create new members for storing spill and private memory in scratch 
rename private scratch space into scratch space slot 1 as it can be generic

Related-To: NEO-9944
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-01-23 12:42:25 +01:00
Compute-Runtime-Validation
f9f9035b95 Revert "refactor: create new members for storing spill and private memory in ... 
This reverts commit 87eb5f554a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-01-23 09:13:00 +01:00
Mateusz Jablonski
87eb5f554a refactor: create new members for storing spill and private memory in scratch 
rename private scratch space into scratch space slot 1 as it can be generic

Related-To: NEO-9944
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-01-22 19:48:48 +01:00
Kamil Kopryk
f99edf72e1 refactor: Add common HardwareCommandsHelper enablers 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-01-12 09:39:12 +01:00
Mateusz Jablonski
a73fb4d2fe fix: correct reporing kernel private size on L0 
unify the logic across APIs

Related-To: NEO-9944
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-01-09 09:54:05 +01:00
Kamil Kopryk
2a46350ba3 fix: fix programming indirect data pointer in heapless mode 
Indirect data pointer should be offsetted by used offset.

Related-To: NEO-7621

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-01-04 07:51:31 +01:00
Dunajski, Bartosz
df66a0276f refactor: remove not used logic to check dynamic postsync layout 
Related-To: NEO-8210

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-12-27 13:12:11 +01:00
Mateusz Jablonski
a4888b39c6 build: add clang-tidy restriction for Enum case 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-12-21 08:58:51 +01:00